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1; RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1250 <%s | FileCheck %s --check-prefixes=CHECK2 3; CHECK-LABEL: {{^}}_amdgpu_cs_main:4; CHECK: ; TotalNumSgprs: 45; CHECK: ; NumVgprs: 26; CHECK: .amdgpu_pal_metadata7; CHECK-NEXT: ---8; CHECK-NEXT: amdpal.pipelines:9; CHECK-NEXT: - .api: Vulkan10; CHECK-NEXT: .compute_registers:11; CHECK-NEXT: .tg_size_en: true12; CHECK-NEXT: .tgid_x_en: false13; CHECK-NEXT: .tgid_y_en: false14; CHECK-NEXT: .tgid_z_en: false15; CHECK-NEXT: .tidig_comp_cnt: 0x116; CHECK-NEXT: .graphics_registers:17; CHECK-NEXT: .ps_extra_lds_size: 018; CHECK-NEXT: .spi_ps_input_addr:19; CHECK-NEXT: .ancillary_ena: false20; CHECK-NEXT: .front_face_ena: true21; CHECK-NEXT: .line_stipple_tex_ena: false22; CHECK-NEXT: .linear_center_ena: true23; CHECK-NEXT: .linear_centroid_ena: true24; CHECK-NEXT: .linear_sample_ena: true25; CHECK-NEXT: .persp_center_ena: true26; CHECK-NEXT: .persp_centroid_ena: true27; CHECK-NEXT: .persp_pull_model_ena: false28; CHECK-NEXT: .persp_sample_ena: true29; CHECK-NEXT: .pos_fixed_pt_ena: true30; CHECK-NEXT: .pos_w_float_ena: false31; CHECK-NEXT: .pos_x_float_ena: false32; CHECK-NEXT: .pos_y_float_ena: false33; CHECK-NEXT: .pos_z_float_ena: false34; CHECK-NEXT: .sample_coverage_ena: false35; CHECK-NEXT: .spi_ps_input_ena:36; CHECK-NEXT: .ancillary_ena: false37; CHECK-NEXT: .front_face_ena: false38; CHECK-NEXT: .line_stipple_tex_ena: false39; CHECK-NEXT: .linear_center_ena: false40; CHECK-NEXT: .linear_centroid_ena: false41; CHECK-NEXT: .linear_sample_ena: false42; CHECK-NEXT: .persp_center_ena: false43; CHECK-NEXT: .persp_centroid_ena: false44; CHECK-NEXT: .persp_pull_model_ena: false45; CHECK-NEXT: .persp_sample_ena: true46; CHECK-NEXT: .pos_fixed_pt_ena: false47; CHECK-NEXT: .pos_w_float_ena: false48; CHECK-NEXT: .pos_x_float_ena: false49; CHECK-NEXT: .pos_y_float_ena: false50; CHECK-NEXT: .pos_z_float_ena: false51; CHECK-NEXT: .sample_coverage_ena: false52; CHECK-NEXT: .hardware_stages:53; CHECK-NEXT: .cs:54; CHECK-NEXT: .checksum_value: 0x9444d7d055; CHECK-NEXT: .debug_mode: false56; CHECK-NEXT: .entry_point: _amdgpu_cs57; CHECK-NEXT: .entry_point_symbol: _amdgpu_cs_main58; CHECK-NEXT: .excp_en: 059; CHECK-NEXT: .float_mode: 0xc060; CHECK-NEXT: .forward_progress: true61; GFX11-NEXT: .ieee_mode: false62; CHECK-NEXT: .image_op: false63; CHECK-NEXT: .lds_size: 064; CHECK-NEXT: .mem_ordered: true65; CHECK-NEXT: .scratch_en: false66; CHECK-NEXT: .scratch_memory_size: 067; CHECK-NEXT: .sgpr_count: 0x468; CHECK-NEXT: .sgpr_limit: 0x6a69; CHECK-NEXT: .threadgroup_dimensions:70; CHECK-NEXT: - 0x171; CHECK-NEXT: - 0x40072; CHECK-NEXT: - 0x173; CHECK-NEXT: .trap_present: false74; CHECK-NEXT: .user_data_reg_map:75; CHECK-NEXT: - 0x1000000076; CHECK-NEXT: - 0xffffffff77; CHECK-NEXT: - 078; CHECK-NEXT: - 0xffffffff79; CHECK-NEXT: - 0xffffffff80; CHECK-NEXT: - 0xffffffff81; CHECK-NEXT: - 0xffffffff82; CHECK-NEXT: - 0xffffffff83; CHECK-NEXT: - 0xffffffff84; CHECK-NEXT: - 0xffffffff85; CHECK-NEXT: - 0xffffffff86; CHECK-NEXT: - 0xffffffff87; CHECK-NEXT: - 0xffffffff88; CHECK-NEXT: - 0xffffffff89; CHECK-NEXT: - 0xffffffff90; CHECK-NEXT: - 0xffffffff91; CHECK-NEXT: - 0xffffffff92; CHECK-NEXT: - 0xffffffff93; CHECK-NEXT: - 0xffffffff94; CHECK-NEXT: - 0xffffffff95; CHECK-NEXT: - 0xffffffff96; CHECK-NEXT: - 0xffffffff97; CHECK-NEXT: - 0xffffffff98; CHECK-NEXT: - 0xffffffff99; CHECK-NEXT: - 0xffffffff100; CHECK-NEXT: - 0xffffffff101; CHECK-NEXT: - 0xffffffff102; CHECK-NEXT: - 0xffffffff103; CHECK-NEXT: - 0xffffffff104; CHECK-NEXT: - 0xffffffff105; CHECK-NEXT: - 0xffffffff106; CHECK-NEXT: - 0xffffffff107; CHECK-NEXT: .user_sgprs: 0x3108; CHECK-NEXT: .vgpr_count: 0x2109; CHECK-NEXT: .vgpr_limit: 0x100110; CHECK-NEXT: .wavefront_size: 0x20111; CHECK-NEXT: .wgp_mode: false112; CHECK-NEXT: .gs:113; CHECK-NEXT: .debug_mode: false114; CHECK-NEXT: .entry_point: _amdgpu_gs115; CHECK-NEXT: .entry_point_symbol: gs_shader116; CHECK-NEXT: .forward_progress: true117; CHECK-NEXT: .lds_size: 0x800118; CHECK-NEXT: .mem_ordered: true119; CHECK-NEXT: .scratch_en: false120; CHECK-NEXT: .scratch_memory_size: 0121; CHECK-NEXT: .sgpr_count: 0x1122; CHECK-NEXT: .vgpr_count: 0x1123; CHECK-NEXT: .wgp_mode: false124; CHECK-NEXT: .hs:125; CHECK-NEXT: .debug_mode: false126; CHECK-NEXT: .entry_point: _amdgpu_hs127; CHECK-NEXT: .entry_point_symbol: hs_shader128; CHECK-NEXT: .forward_progress: true129; CHECK-NEXT: .lds_size: 0x1000130; CHECK-NEXT: .mem_ordered: true131; CHECK-NEXT: .scratch_en: false132; CHECK-NEXT: .scratch_memory_size: 0133; CHECK-NEXT: .sgpr_count: 0x1134; CHECK-NEXT: .vgpr_count: 0x1135; CHECK-NEXT: .wgp_mode: false136; CHECK-NEXT: .ps:137; CHECK-NEXT: .debug_mode: false138; CHECK-NEXT: .entry_point: _amdgpu_ps139; CHECK-NEXT: .entry_point_symbol: ps_shader140; CHECK-NEXT: .forward_progress: true141; CHECK-NEXT: .lds_size: 0142; CHECK-NEXT: .mem_ordered: true143; CHECK-NEXT: .scratch_en: false144; CHECK-NEXT: .scratch_memory_size: 0145; CHECK-NEXT: .sgpr_count: 0x1146; CHECK-NEXT: .vgpr_count: 0x1147; CHECK-NEXT: .wgp_mode: false148; CHECK: .registers: {}149; CHECK:amdpal.version:150; CHECK-NEXT: - 0x3151; CHECK-NEXT: - 0152; CHECK-NEXT:...153; CHECK-NEXT: .end_amdgpu_pal_metadata154 155define dllexport amdgpu_cs void @_amdgpu_cs_main(i32 inreg %arg1, i32 %arg2) #0 !lgc.shaderstage !1 {156.entry:157 %i = call i64 @llvm.amdgcn.s.getpc()158 %i1 = and i64 %i, -4294967296159 %i2 = zext i32 %arg1 to i64160 %i3 = or i64 %i1, %i2161 %i4 = inttoptr i64 %i3 to ptr addrspace(4)162 %i5 = and i32 %arg2, 1023163 %i6 = lshr i32 %arg2, 10164 %i7 = and i32 %i6, 1023165 %i8 = add nuw nsw i32 %i7, %i5166 %i9 = load <4 x i32>, ptr addrspace(4) %i4, align 16167 %.idx = shl nuw nsw i32 %i8, 2168 call void @llvm.amdgcn.raw.buffer.store.i32(i32 1, <4 x i32> %i9, i32 %.idx, i32 0, i32 0)169 ret void170}171 172define dllexport amdgpu_ps void @ps_shader() #1 {173 ret void174}175 176@LDS.GS = external addrspace(3) global [1 x i32], align 4177 178define dllexport amdgpu_gs void @gs_shader() #2 {179 %ptr = getelementptr i32, ptr addrspace(3) @LDS.GS, i32 0180 store i32 0, ptr addrspace(3) %ptr, align 4181 ret void182}183 184@LDS.HS = external addrspace(3) global [1024 x i32], align 4185 186define dllexport amdgpu_hs void @hs_shader() #2 {187 %ptr = getelementptr i32, ptr addrspace(3) @LDS.HS, i32 0188 store i32 0, ptr addrspace(3) %ptr, align 4189 ret void190}191 192!amdgpu.pal.metadata.msgpack = !{!0}193 194; Function Attrs: nounwind willreturn memory(none)195declare ptr addrspace(7) @lgc.buffer.desc.to.ptr(<4 x i32>) #1196 197; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)198declare i64 @llvm.amdgcn.s.getpc() #2199 200; Function Attrs: nocallback nofree nosync nounwind willreturn memory(write)201declare void @llvm.amdgcn.raw.buffer.store.i32(i32, <4 x i32>, i32, i32, i32 immarg) #3202 203attributes #0 = { nounwind memory(readwrite) "amdgpu-flat-work-group-size"="1024,1024" "amdgpu-memory-bound"="false" "amdgpu-unroll-threshold"="700" "amdgpu-wave-limiter"="false" "amdgpu-work-group-info-arg-no"="4" "denormal-fp-math-f32"="preserve-sign" }204 205attributes #1 = { nounwind memory(readwrite) "InitialPSInputAddr"="36983" }206 207!0 = !{!"\82\B0amdpal.pipelines\91\8A\A4.api\A6Vulkan\B2.compute_registers\85\AB.tg_size_en\C3\AA.tgid_x_en\C2\AA.tgid_y_en\C2\AA.tgid_z_en\C2\AF.tidig_comp_cnt\01\B0.hardware_stages\81\A3.cs\8C\AF.checksum_value\CE\94D\D7\D0\AB.debug_mode\00\AB.float_mode\CC\C0\A9.image_op\C2\AC.mem_ordered\C3\AB.sgpr_limitj\B7.threadgroup_dimensions\93\01\CD\04\00\01\AD.trap_present\00\B2.user_data_reg_map\DC\00 \CE\10\00\00\00\CE\FF\FF\FF\FF\00\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\CE\FF\FF\FF\FF\AB.user_sgprs\03\AB.vgpr_limit\CD\01\00\AF.wavefront_size \B7.internal_pipeline_hash\92\CF\E7\10k\A6:\A6%\F7\CF\B2\1F\1A\D4{\DA\E1T\AA.registers\80\A8.shaders\81\A8.compute\82\B0.api_shader_hash\92\CF\E9Zn7}\1E\B9\E7\00\B1.hardware_mapping\91\A3.cs\B0.spill_threshold\CE\FF\FF\FF\FF\A5.type\A2Cs\B0.user_data_limit\01\AF.xgl_cache_info\82\B3.128_bit_cache_hash\92\CF\B4X\B8\11[\A4\88P\CF\A0;\B0\AF\FF\B4\BE\C0\AD.llpc_version\A461.1\AEamdpal.version\92\03\00"}208!1 = !{i32 7}209