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1; RUN: llc -mtriple=r600 -mcpu=redwood -mattr=-promote-alloca < %s | FileCheck %s2;3; CFG flattening should use parallel-and mode to generate branch conditions and4; then merge if-regions with the same bodies.5;6; CHECK: AND_INT7; CHECK-NEXT: AND_INT8; CHECK-NEXT: OR_INT9 10; FIXME: For some reason having the allocas here allowed the flatten cfg pass11; to do its transformation, however now that we are using local memory for12; allocas, the transformation isn't happening.13 14define amdgpu_kernel void @_Z9chk1D_512v() #0 {15entry:16 %a0 = alloca i32, align 4, addrspace(5)17 %b0 = alloca i32, align 4, addrspace(5)18 %c0 = alloca i32, align 4, addrspace(5)19 %d0 = alloca i32, align 4, addrspace(5)20 %a1 = alloca i32, align 4, addrspace(5)21 %b1 = alloca i32, align 4, addrspace(5)22 %c1 = alloca i32, align 4, addrspace(5)23 %d1 = alloca i32, align 4, addrspace(5)24 %data = alloca i32, align 4, addrspace(5)25 %0 = load i32, ptr addrspace(5) %a0, align 426 %1 = load i32, ptr addrspace(5) %b0, align 427 %cmp = icmp ne i32 %0, %128 br i1 %cmp, label %land.lhs.true, label %if.end29 30land.lhs.true: ; preds = %entry31 %2 = load i32, ptr addrspace(5) %c0, align 432 %3 = load i32, ptr addrspace(5) %d0, align 433 %cmp1 = icmp ne i32 %2, %334 br i1 %cmp1, label %if.then, label %if.end35 36if.then: ; preds = %land.lhs.true37 store i32 1, ptr addrspace(5) %data, align 438 br label %if.end39 40if.end: ; preds = %if.then, %land.lhs.true, %entry41 %4 = load i32, ptr addrspace(5) %a1, align 442 %5 = load i32, ptr addrspace(5) %b1, align 443 %cmp2 = icmp ne i32 %4, %544 br i1 %cmp2, label %land.lhs.true3, label %if.end645 46land.lhs.true3: ; preds = %if.end47 %6 = load i32, ptr addrspace(5) %c1, align 448 %7 = load i32, ptr addrspace(5) %d1, align 449 %cmp4 = icmp ne i32 %6, %750 br i1 %cmp4, label %if.then5, label %if.end651 52if.then5: ; preds = %land.lhs.true353 store i32 1, ptr addrspace(5) %data, align 454 br label %if.end655 56if.end6: ; preds = %if.then5, %land.lhs.true3, %if.end57 ret void58}59