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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc %s -march=amdgcn -o - | FileCheck %s3 4target triple = "amdgcn-amd-amdhsa"5 6define amdgpu_kernel void @my_kernel(i64 %foo, i32 %bar) {7; CHECK-LABEL: my_kernel:8; CHECK: ; %bb.0: ; %entry9; CHECK-NEXT: s_mov_b32 flat_scratch_lo, s1310; CHECK-NEXT: s_add_i32 s12, s12, s1711; CHECK-NEXT: s_lshr_b32 flat_scratch_hi, s12, 812; CHECK-NEXT: s_load_dword s0, s[8:9], 0x213; CHECK-NEXT: s_load_dwordx2 s[2:3], s[8:9], 0x014; CHECK-NEXT: s_mov_b64 s[4:5], 115; CHECK-NEXT: v_mov_b32_e32 v0, 016; CHECK-NEXT: v_mov_b32_e32 v1, 017; CHECK-NEXT: s_waitcnt lgkmcnt(0)18; CHECK-NEXT: s_ashr_i32 s6, s0, 3119; CHECK-NEXT: s_abs_i32 s7, s020; CHECK-NEXT: v_cvt_f32_u32_e32 v2, s721; CHECK-NEXT: s_sub_i32 s0, 0, s722; CHECK-NEXT: v_rcp_iflag_f32_e32 v2, v223; CHECK-NEXT: v_mul_f32_e32 v2, 0x4f7ffffe, v224; CHECK-NEXT: v_cvt_u32_f32_e32 v2, v225; CHECK-NEXT: v_mul_lo_u32 v3, s0, v226; CHECK-NEXT: v_mul_hi_u32 v3, v2, v327; CHECK-NEXT: v_add_i32_e32 v2, vcc, v2, v328; CHECK-NEXT: s_and_b64 s[0:1], exec, -129; CHECK-NEXT: .LBB0_1: ; %loop30; CHECK-NEXT: ; =>This Inner Loop Header: Depth=131; CHECK-NEXT: v_mov_b32_e32 v3, s432; CHECK-NEXT: v_mad_u64_u32 v[3:4], s[8:9], s2, v3, 133; CHECK-NEXT: s_mul_i32 s4, s3, s434; CHECK-NEXT: s_mul_i32 s5, s2, s535; CHECK-NEXT: v_add_i32_e32 v4, vcc, s4, v436; CHECK-NEXT: v_readfirstlane_b32 s4, v337; CHECK-NEXT: v_add_i32_e32 v4, vcc, s5, v438; CHECK-NEXT: s_ashr_i32 s5, s4, 3139; CHECK-NEXT: s_abs_i32 s8, s440; CHECK-NEXT: s_xor_b32 s5, s5, s641; CHECK-NEXT: v_mul_hi_u32 v3, s8, v242; CHECK-NEXT: v_readfirstlane_b32 s9, v343; CHECK-NEXT: v_add_i32_e32 v5, vcc, 1, v344; CHECK-NEXT: s_mul_i32 s9, s9, s745; CHECK-NEXT: s_sub_i32 s8, s8, s946; CHECK-NEXT: s_sub_i32 s9, s8, s747; CHECK-NEXT: s_cmp_ge_u32 s8, s748; CHECK-NEXT: s_cselect_b64 vcc, -1, 049; CHECK-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc50; CHECK-NEXT: s_cselect_b32 s8, s9, s851; CHECK-NEXT: v_add_i32_e32 v5, vcc, 1, v352; CHECK-NEXT: s_cmp_ge_u32 s8, s753; CHECK-NEXT: s_cselect_b64 vcc, -1, 054; CHECK-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc55; CHECK-NEXT: v_xor_b32_e32 v3, s5, v356; CHECK-NEXT: v_subrev_i32_e32 v3, vcc, s5, v357; CHECK-NEXT: v_ashrrev_i32_e32 v5, 31, v358; CHECK-NEXT: v_or_b32_e32 v3, s4, v359; CHECK-NEXT: v_or_b32_e32 v4, v4, v560; CHECK-NEXT: flat_load_dwordx2 v[3:4], v[3:4]61; CHECK-NEXT: s_waitcnt vmcnt(0)62; CHECK-NEXT: flat_store_dwordx2 v[0:1], v[3:4]63; CHECK-NEXT: s_mov_b64 s[4:5], 064; CHECK-NEXT: s_mov_b64 vcc, s[0:1]65; CHECK-NEXT: s_cbranch_vccnz .LBB0_166; CHECK-NEXT: ; %bb.2: ; %DummyReturnBlock67; CHECK-NEXT: s_endpgm68entry:69 br label %loop70 71loop: ; preds = %entry, %loop72 %i = phi i64 [ 1, %entry ], [ 0, %loop ]73 %mul = mul i64 %foo, %i74 %add = add i64 %mul, 175 %trunc = trunc i64 %add to i3276 %div = sdiv i32 %trunc, %bar77 %sext = sext i32 %div to i6478 %or = or i64 %add, %sext79 %inttoptr = inttoptr i64 %or to ptr80 %addrspacecast = addrspacecast ptr %inttoptr to ptr addrspace(1)81 %val = load double, ptr addrspace(1) %addrspacecast, align 882 store double %val, ptr addrspace(1) null, align 883 br label %loop84}85