954 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=amdgcn -mcpu=gfx803 < %s | FileCheck --check-prefixes=GFX8 %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck --check-prefixes=GFX9ALL,GFX900 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck --check-prefixes=GFX9ALL,GFX906 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s7; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-enable-delay-alu=0 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s8 9define i16 @shl_i16(i16 %x, i16 %y) {10; GFX8-LABEL: shl_i16:11; GFX8: ; %bb.0:12; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)13; GFX8-NEXT: v_lshlrev_b16_e32 v0, v1, v014; GFX8-NEXT: s_setpc_b64 s[30:31]15;16; GFX9ALL-LABEL: shl_i16:17; GFX9ALL: ; %bb.0:18; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)19; GFX9ALL-NEXT: v_lshlrev_b16_e32 v0, v1, v020; GFX9ALL-NEXT: s_setpc_b64 s[30:31]21;22; GFX10-LABEL: shl_i16:23; GFX10: ; %bb.0:24; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)25; GFX10-NEXT: v_lshlrev_b16 v0, v1, v026; GFX10-NEXT: s_setpc_b64 s[30:31]27;28; GFX11-TRUE16-LABEL: shl_i16:29; GFX11-TRUE16: ; %bb.0:30; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)31; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, v1.l, v0.l32; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]33;34; GFX11-FAKE16-LABEL: shl_i16:35; GFX11-FAKE16: ; %bb.0:36; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)37; GFX11-FAKE16-NEXT: v_lshlrev_b16 v0, v1, v038; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]39 %res = shl i16 %x, %y40 ret i16 %res41}42 43define i16 @lshr_i16(i16 %x, i16 %y) {44; GFX8-LABEL: lshr_i16:45; GFX8: ; %bb.0:46; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)47; GFX8-NEXT: v_lshrrev_b16_e32 v0, v1, v048; GFX8-NEXT: s_setpc_b64 s[30:31]49;50; GFX9ALL-LABEL: lshr_i16:51; GFX9ALL: ; %bb.0:52; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)53; GFX9ALL-NEXT: v_lshrrev_b16_e32 v0, v1, v054; GFX9ALL-NEXT: s_setpc_b64 s[30:31]55;56; GFX10-LABEL: lshr_i16:57; GFX10: ; %bb.0:58; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)59; GFX10-NEXT: v_lshrrev_b16 v0, v1, v060; GFX10-NEXT: s_setpc_b64 s[30:31]61;62; GFX11-TRUE16-LABEL: lshr_i16:63; GFX11-TRUE16: ; %bb.0:64; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)65; GFX11-TRUE16-NEXT: v_lshrrev_b16 v0.l, v1.l, v0.l66; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]67;68; GFX11-FAKE16-LABEL: lshr_i16:69; GFX11-FAKE16: ; %bb.0:70; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)71; GFX11-FAKE16-NEXT: v_lshrrev_b16 v0, v1, v072; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]73 %res = lshr i16 %x, %y74 ret i16 %res75}76 77define i16 @ashr_i16(i16 %x, i16 %y) {78; GFX8-LABEL: ashr_i16:79; GFX8: ; %bb.0:80; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)81; GFX8-NEXT: v_ashrrev_i16_e32 v0, v1, v082; GFX8-NEXT: s_setpc_b64 s[30:31]83;84; GFX9ALL-LABEL: ashr_i16:85; GFX9ALL: ; %bb.0:86; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)87; GFX9ALL-NEXT: v_ashrrev_i16_e32 v0, v1, v088; GFX9ALL-NEXT: s_setpc_b64 s[30:31]89;90; GFX10-LABEL: ashr_i16:91; GFX10: ; %bb.0:92; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)93; GFX10-NEXT: v_ashrrev_i16 v0, v1, v094; GFX10-NEXT: s_setpc_b64 s[30:31]95;96; GFX11-TRUE16-LABEL: ashr_i16:97; GFX11-TRUE16: ; %bb.0:98; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)99; GFX11-TRUE16-NEXT: v_ashrrev_i16 v0.l, v1.l, v0.l100; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]101;102; GFX11-FAKE16-LABEL: ashr_i16:103; GFX11-FAKE16: ; %bb.0:104; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)105; GFX11-FAKE16-NEXT: v_ashrrev_i16 v0, v1, v0106; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]107 %res = ashr i16 %x, %y108 ret i16 %res109}110 111define i16 @add_u16(i16 %x, i16 %y) {112; GFX8-LABEL: add_u16:113; GFX8: ; %bb.0:114; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)115; GFX8-NEXT: v_add_u16_e32 v0, v0, v1116; GFX8-NEXT: s_setpc_b64 s[30:31]117;118; GFX9ALL-LABEL: add_u16:119; GFX9ALL: ; %bb.0:120; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)121; GFX9ALL-NEXT: v_add_u16_e32 v0, v0, v1122; GFX9ALL-NEXT: s_setpc_b64 s[30:31]123;124; GFX10-LABEL: add_u16:125; GFX10: ; %bb.0:126; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)127; GFX10-NEXT: v_add_nc_u16 v0, v0, v1128; GFX10-NEXT: s_setpc_b64 s[30:31]129;130; GFX11-TRUE16-LABEL: add_u16:131; GFX11-TRUE16: ; %bb.0:132; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)133; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v0.l, v1.l134; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]135;136; GFX11-FAKE16-LABEL: add_u16:137; GFX11-FAKE16: ; %bb.0:138; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)139; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, v0, v1140; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]141 %res = add i16 %x, %y142 ret i16 %res143}144 145define i16 @sub_u16(i16 %x, i16 %y) {146; GFX8-LABEL: sub_u16:147; GFX8: ; %bb.0:148; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)149; GFX8-NEXT: v_sub_u16_e32 v0, v0, v1150; GFX8-NEXT: s_setpc_b64 s[30:31]151;152; GFX9ALL-LABEL: sub_u16:153; GFX9ALL: ; %bb.0:154; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)155; GFX9ALL-NEXT: v_sub_u16_e32 v0, v0, v1156; GFX9ALL-NEXT: s_setpc_b64 s[30:31]157;158; GFX10-LABEL: sub_u16:159; GFX10: ; %bb.0:160; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)161; GFX10-NEXT: v_sub_nc_u16 v0, v0, v1162; GFX10-NEXT: s_setpc_b64 s[30:31]163;164; GFX11-TRUE16-LABEL: sub_u16:165; GFX11-TRUE16: ; %bb.0:166; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)167; GFX11-TRUE16-NEXT: v_sub_nc_u16 v0.l, v0.l, v1.l168; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]169;170; GFX11-FAKE16-LABEL: sub_u16:171; GFX11-FAKE16: ; %bb.0:172; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)173; GFX11-FAKE16-NEXT: v_sub_nc_u16 v0, v0, v1174; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]175 %res = sub i16 %x, %y176 ret i16 %res177}178 179define i16 @mul_lo_u16(i16 %x, i16 %y) {180; GFX8-LABEL: mul_lo_u16:181; GFX8: ; %bb.0:182; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)183; GFX8-NEXT: v_mul_lo_u16_e32 v0, v0, v1184; GFX8-NEXT: s_setpc_b64 s[30:31]185;186; GFX9ALL-LABEL: mul_lo_u16:187; GFX9ALL: ; %bb.0:188; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)189; GFX9ALL-NEXT: v_mul_lo_u16_e32 v0, v0, v1190; GFX9ALL-NEXT: s_setpc_b64 s[30:31]191;192; GFX10-LABEL: mul_lo_u16:193; GFX10: ; %bb.0:194; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)195; GFX10-NEXT: v_mul_lo_u16 v0, v0, v1196; GFX10-NEXT: s_setpc_b64 s[30:31]197;198; GFX11-TRUE16-LABEL: mul_lo_u16:199; GFX11-TRUE16: ; %bb.0:200; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)201; GFX11-TRUE16-NEXT: v_mul_lo_u16 v0.l, v0.l, v1.l202; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]203;204; GFX11-FAKE16-LABEL: mul_lo_u16:205; GFX11-FAKE16: ; %bb.0:206; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)207; GFX11-FAKE16-NEXT: v_mul_lo_u16 v0, v0, v1208; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]209 %res = mul i16 %x, %y210 ret i16 %res211}212 213define i16 @min_u16(i16 %x, i16 %y) {214; GFX8-LABEL: min_u16:215; GFX8: ; %bb.0:216; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)217; GFX8-NEXT: v_min_u16_e32 v0, v0, v1218; GFX8-NEXT: s_setpc_b64 s[30:31]219;220; GFX9ALL-LABEL: min_u16:221; GFX9ALL: ; %bb.0:222; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)223; GFX9ALL-NEXT: v_min_u16_e32 v0, v0, v1224; GFX9ALL-NEXT: s_setpc_b64 s[30:31]225;226; GFX10-LABEL: min_u16:227; GFX10: ; %bb.0:228; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)229; GFX10-NEXT: v_min_u16 v0, v0, v1230; GFX10-NEXT: s_setpc_b64 s[30:31]231;232; GFX11-TRUE16-LABEL: min_u16:233; GFX11-TRUE16: ; %bb.0:234; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)235; GFX11-TRUE16-NEXT: v_min_u16 v0.l, v0.l, v1.l236; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]237;238; GFX11-FAKE16-LABEL: min_u16:239; GFX11-FAKE16: ; %bb.0:240; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)241; GFX11-FAKE16-NEXT: v_min_u16 v0, v0, v1242; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]243 %cmp = icmp ule i16 %x, %y244 %res = select i1 %cmp, i16 %x, i16 %y245 ret i16 %res246}247 248define i16 @min_i16(i16 %x, i16 %y) {249; GFX8-LABEL: min_i16:250; GFX8: ; %bb.0:251; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)252; GFX8-NEXT: v_min_i16_e32 v0, v0, v1253; GFX8-NEXT: s_setpc_b64 s[30:31]254;255; GFX9ALL-LABEL: min_i16:256; GFX9ALL: ; %bb.0:257; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)258; GFX9ALL-NEXT: v_min_i16_e32 v0, v0, v1259; GFX9ALL-NEXT: s_setpc_b64 s[30:31]260;261; GFX10-LABEL: min_i16:262; GFX10: ; %bb.0:263; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)264; GFX10-NEXT: v_min_i16 v0, v0, v1265; GFX10-NEXT: s_setpc_b64 s[30:31]266;267; GFX11-TRUE16-LABEL: min_i16:268; GFX11-TRUE16: ; %bb.0:269; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)270; GFX11-TRUE16-NEXT: v_min_i16 v0.l, v0.l, v1.l271; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]272;273; GFX11-FAKE16-LABEL: min_i16:274; GFX11-FAKE16: ; %bb.0:275; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)276; GFX11-FAKE16-NEXT: v_min_i16 v0, v0, v1277; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]278 %cmp = icmp sle i16 %x, %y279 %res = select i1 %cmp, i16 %x, i16 %y280 ret i16 %res281}282 283define i16 @max_u16(i16 %x, i16 %y) {284; GFX8-LABEL: max_u16:285; GFX8: ; %bb.0:286; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)287; GFX8-NEXT: v_max_u16_e32 v0, v0, v1288; GFX8-NEXT: s_setpc_b64 s[30:31]289;290; GFX9ALL-LABEL: max_u16:291; GFX9ALL: ; %bb.0:292; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)293; GFX9ALL-NEXT: v_max_u16_e32 v0, v0, v1294; GFX9ALL-NEXT: s_setpc_b64 s[30:31]295;296; GFX10-LABEL: max_u16:297; GFX10: ; %bb.0:298; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)299; GFX10-NEXT: v_max_u16 v0, v0, v1300; GFX10-NEXT: s_setpc_b64 s[30:31]301;302; GFX11-TRUE16-LABEL: max_u16:303; GFX11-TRUE16: ; %bb.0:304; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)305; GFX11-TRUE16-NEXT: v_max_u16 v0.l, v0.l, v1.l306; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]307;308; GFX11-FAKE16-LABEL: max_u16:309; GFX11-FAKE16: ; %bb.0:310; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)311; GFX11-FAKE16-NEXT: v_max_u16 v0, v0, v1312; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]313 %cmp = icmp uge i16 %x, %y314 %res = select i1 %cmp, i16 %x, i16 %y315 ret i16 %res316}317 318define i16 @max_i16(i16 %x, i16 %y) {319; GFX8-LABEL: max_i16:320; GFX8: ; %bb.0:321; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)322; GFX8-NEXT: v_max_i16_e32 v0, v0, v1323; GFX8-NEXT: s_setpc_b64 s[30:31]324;325; GFX9ALL-LABEL: max_i16:326; GFX9ALL: ; %bb.0:327; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)328; GFX9ALL-NEXT: v_max_i16_e32 v0, v0, v1329; GFX9ALL-NEXT: s_setpc_b64 s[30:31]330;331; GFX10-LABEL: max_i16:332; GFX10: ; %bb.0:333; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)334; GFX10-NEXT: v_max_i16 v0, v0, v1335; GFX10-NEXT: s_setpc_b64 s[30:31]336;337; GFX11-TRUE16-LABEL: max_i16:338; GFX11-TRUE16: ; %bb.0:339; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)340; GFX11-TRUE16-NEXT: v_max_i16 v0.l, v0.l, v1.l341; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]342;343; GFX11-FAKE16-LABEL: max_i16:344; GFX11-FAKE16: ; %bb.0:345; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)346; GFX11-FAKE16-NEXT: v_max_i16 v0, v0, v1347; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]348 %cmp = icmp sge i16 %x, %y349 %res = select i1 %cmp, i16 %x, i16 %y350 ret i16 %res351}352 353define i32 @shl_i16_zext_i32(i16 %x, i16 %y) {354; GFX8-LABEL: shl_i16_zext_i32:355; GFX8: ; %bb.0:356; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)357; GFX8-NEXT: v_lshlrev_b16_e32 v0, v1, v0358; GFX8-NEXT: s_setpc_b64 s[30:31]359;360; GFX9ALL-LABEL: shl_i16_zext_i32:361; GFX9ALL: ; %bb.0:362; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)363; GFX9ALL-NEXT: v_lshlrev_b16_e32 v0, v1, v0364; GFX9ALL-NEXT: s_setpc_b64 s[30:31]365;366; GFX10-LABEL: shl_i16_zext_i32:367; GFX10: ; %bb.0:368; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)369; GFX10-NEXT: v_lshlrev_b16 v0, v1, v0370; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0371; GFX10-NEXT: s_setpc_b64 s[30:31]372;373; GFX11-TRUE16-LABEL: shl_i16_zext_i32:374; GFX11-TRUE16: ; %bb.0:375; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)376; GFX11-TRUE16-NEXT: v_lshlrev_b16 v0.l, v1.l, v0.l377; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0378; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]379;380; GFX11-FAKE16-LABEL: shl_i16_zext_i32:381; GFX11-FAKE16: ; %bb.0:382; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)383; GFX11-FAKE16-NEXT: v_lshlrev_b16 v0, v1, v0384; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0385; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]386 %res = shl i16 %x, %y387 %zext = zext i16 %res to i32388 ret i32 %zext389}390 391define i32 @lshr_i16_zext_i32(i16 %x, i16 %y) {392; GFX8-LABEL: lshr_i16_zext_i32:393; GFX8: ; %bb.0:394; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)395; GFX8-NEXT: v_lshrrev_b16_e32 v0, v1, v0396; GFX8-NEXT: s_setpc_b64 s[30:31]397;398; GFX9ALL-LABEL: lshr_i16_zext_i32:399; GFX9ALL: ; %bb.0:400; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)401; GFX9ALL-NEXT: v_lshrrev_b16_e32 v0, v1, v0402; GFX9ALL-NEXT: s_setpc_b64 s[30:31]403;404; GFX10-LABEL: lshr_i16_zext_i32:405; GFX10: ; %bb.0:406; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)407; GFX10-NEXT: v_lshrrev_b16 v0, v1, v0408; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0409; GFX10-NEXT: s_setpc_b64 s[30:31]410;411; GFX11-TRUE16-LABEL: lshr_i16_zext_i32:412; GFX11-TRUE16: ; %bb.0:413; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)414; GFX11-TRUE16-NEXT: v_lshrrev_b16 v0.l, v1.l, v0.l415; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0416; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]417;418; GFX11-FAKE16-LABEL: lshr_i16_zext_i32:419; GFX11-FAKE16: ; %bb.0:420; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)421; GFX11-FAKE16-NEXT: v_lshrrev_b16 v0, v1, v0422; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0423; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]424 %res = lshr i16 %x, %y425 %zext = zext i16 %res to i32426 ret i32 %zext427}428 429define i32 @ashr_i16_zext_i32(i16 %x, i16 %y) {430; GFX8-LABEL: ashr_i16_zext_i32:431; GFX8: ; %bb.0:432; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)433; GFX8-NEXT: v_ashrrev_i16_e32 v0, v1, v0434; GFX8-NEXT: s_setpc_b64 s[30:31]435;436; GFX9ALL-LABEL: ashr_i16_zext_i32:437; GFX9ALL: ; %bb.0:438; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)439; GFX9ALL-NEXT: v_ashrrev_i16_e32 v0, v1, v0440; GFX9ALL-NEXT: s_setpc_b64 s[30:31]441;442; GFX10-LABEL: ashr_i16_zext_i32:443; GFX10: ; %bb.0:444; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)445; GFX10-NEXT: v_ashrrev_i16 v0, v1, v0446; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0447; GFX10-NEXT: s_setpc_b64 s[30:31]448;449; GFX11-TRUE16-LABEL: ashr_i16_zext_i32:450; GFX11-TRUE16: ; %bb.0:451; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)452; GFX11-TRUE16-NEXT: v_ashrrev_i16 v0.l, v1.l, v0.l453; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0454; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]455;456; GFX11-FAKE16-LABEL: ashr_i16_zext_i32:457; GFX11-FAKE16: ; %bb.0:458; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)459; GFX11-FAKE16-NEXT: v_ashrrev_i16 v0, v1, v0460; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0461; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]462 %res = ashr i16 %x, %y463 %zext = zext i16 %res to i32464 ret i32 %zext465}466 467define i32 @add_u16_zext_i32(i16 %x, i16 %y) {468; GFX8-LABEL: add_u16_zext_i32:469; GFX8: ; %bb.0:470; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)471; GFX8-NEXT: v_add_u16_e32 v0, v0, v1472; GFX8-NEXT: s_setpc_b64 s[30:31]473;474; GFX9ALL-LABEL: add_u16_zext_i32:475; GFX9ALL: ; %bb.0:476; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)477; GFX9ALL-NEXT: v_add_u16_e32 v0, v0, v1478; GFX9ALL-NEXT: s_setpc_b64 s[30:31]479;480; GFX10-LABEL: add_u16_zext_i32:481; GFX10: ; %bb.0:482; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)483; GFX10-NEXT: v_add_nc_u16 v0, v0, v1484; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0485; GFX10-NEXT: s_setpc_b64 s[30:31]486;487; GFX11-TRUE16-LABEL: add_u16_zext_i32:488; GFX11-TRUE16: ; %bb.0:489; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)490; GFX11-TRUE16-NEXT: v_add_nc_u16 v0.l, v0.l, v1.l491; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0492; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]493;494; GFX11-FAKE16-LABEL: add_u16_zext_i32:495; GFX11-FAKE16: ; %bb.0:496; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)497; GFX11-FAKE16-NEXT: v_add_nc_u16 v0, v0, v1498; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0499; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]500 %res = add i16 %x, %y501 %zext = zext i16 %res to i32502 ret i32 %zext503}504 505define i32 @sub_u16_zext_i32(i16 %x, i16 %y) {506; GFX8-LABEL: sub_u16_zext_i32:507; GFX8: ; %bb.0:508; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)509; GFX8-NEXT: v_sub_u16_e32 v0, v0, v1510; GFX8-NEXT: s_setpc_b64 s[30:31]511;512; GFX9ALL-LABEL: sub_u16_zext_i32:513; GFX9ALL: ; %bb.0:514; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)515; GFX9ALL-NEXT: v_sub_u16_e32 v0, v0, v1516; GFX9ALL-NEXT: s_setpc_b64 s[30:31]517;518; GFX10-LABEL: sub_u16_zext_i32:519; GFX10: ; %bb.0:520; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)521; GFX10-NEXT: v_sub_nc_u16 v0, v0, v1522; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0523; GFX10-NEXT: s_setpc_b64 s[30:31]524;525; GFX11-TRUE16-LABEL: sub_u16_zext_i32:526; GFX11-TRUE16: ; %bb.0:527; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)528; GFX11-TRUE16-NEXT: v_sub_nc_u16 v0.l, v0.l, v1.l529; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0530; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]531;532; GFX11-FAKE16-LABEL: sub_u16_zext_i32:533; GFX11-FAKE16: ; %bb.0:534; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)535; GFX11-FAKE16-NEXT: v_sub_nc_u16 v0, v0, v1536; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0537; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]538 %res = sub i16 %x, %y539 %zext = zext i16 %res to i32540 ret i32 %zext541}542 543define i32 @mul_lo_u16_zext_i32(i16 %x, i16 %y) {544; GFX8-LABEL: mul_lo_u16_zext_i32:545; GFX8: ; %bb.0:546; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)547; GFX8-NEXT: v_mul_lo_u16_e32 v0, v0, v1548; GFX8-NEXT: s_setpc_b64 s[30:31]549;550; GFX9ALL-LABEL: mul_lo_u16_zext_i32:551; GFX9ALL: ; %bb.0:552; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)553; GFX9ALL-NEXT: v_mul_lo_u16_e32 v0, v0, v1554; GFX9ALL-NEXT: s_setpc_b64 s[30:31]555;556; GFX10-LABEL: mul_lo_u16_zext_i32:557; GFX10: ; %bb.0:558; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)559; GFX10-NEXT: v_mul_lo_u16 v0, v0, v1560; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0561; GFX10-NEXT: s_setpc_b64 s[30:31]562;563; GFX11-TRUE16-LABEL: mul_lo_u16_zext_i32:564; GFX11-TRUE16: ; %bb.0:565; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)566; GFX11-TRUE16-NEXT: v_mul_lo_u16 v0.l, v0.l, v1.l567; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0568; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]569;570; GFX11-FAKE16-LABEL: mul_lo_u16_zext_i32:571; GFX11-FAKE16: ; %bb.0:572; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)573; GFX11-FAKE16-NEXT: v_mul_lo_u16 v0, v0, v1574; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0575; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]576 %res = mul i16 %x, %y577 %zext = zext i16 %res to i32578 ret i32 %zext579}580 581define i32 @min_u16_zext_i32(i16 %x, i16 %y) {582; GFX8-LABEL: min_u16_zext_i32:583; GFX8: ; %bb.0:584; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)585; GFX8-NEXT: v_min_u16_e32 v0, v0, v1586; GFX8-NEXT: s_setpc_b64 s[30:31]587;588; GFX9ALL-LABEL: min_u16_zext_i32:589; GFX9ALL: ; %bb.0:590; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)591; GFX9ALL-NEXT: v_min_u16_e32 v0, v0, v1592; GFX9ALL-NEXT: s_setpc_b64 s[30:31]593;594; GFX10-LABEL: min_u16_zext_i32:595; GFX10: ; %bb.0:596; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)597; GFX10-NEXT: v_min_u16 v0, v0, v1598; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0599; GFX10-NEXT: s_setpc_b64 s[30:31]600;601; GFX11-TRUE16-LABEL: min_u16_zext_i32:602; GFX11-TRUE16: ; %bb.0:603; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)604; GFX11-TRUE16-NEXT: v_min_u16 v0.l, v0.l, v1.l605; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0606; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]607;608; GFX11-FAKE16-LABEL: min_u16_zext_i32:609; GFX11-FAKE16: ; %bb.0:610; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)611; GFX11-FAKE16-NEXT: v_min_u16 v0, v0, v1612; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0613; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]614 %cmp = icmp ule i16 %x, %y615 %res = select i1 %cmp, i16 %x, i16 %y616 %zext = zext i16 %res to i32617 ret i32 %zext618}619 620define i32 @min_i16_zext_i32(i16 %x, i16 %y) {621; GFX8-LABEL: min_i16_zext_i32:622; GFX8: ; %bb.0:623; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)624; GFX8-NEXT: v_min_i16_e32 v0, v0, v1625; GFX8-NEXT: s_setpc_b64 s[30:31]626;627; GFX9ALL-LABEL: min_i16_zext_i32:628; GFX9ALL: ; %bb.0:629; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)630; GFX9ALL-NEXT: v_min_i16_e32 v0, v0, v1631; GFX9ALL-NEXT: s_setpc_b64 s[30:31]632;633; GFX10-LABEL: min_i16_zext_i32:634; GFX10: ; %bb.0:635; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)636; GFX10-NEXT: v_min_i16 v0, v0, v1637; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0638; GFX10-NEXT: s_setpc_b64 s[30:31]639;640; GFX11-TRUE16-LABEL: min_i16_zext_i32:641; GFX11-TRUE16: ; %bb.0:642; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)643; GFX11-TRUE16-NEXT: v_min_i16 v0.l, v0.l, v1.l644; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0645; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]646;647; GFX11-FAKE16-LABEL: min_i16_zext_i32:648; GFX11-FAKE16: ; %bb.0:649; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)650; GFX11-FAKE16-NEXT: v_min_i16 v0, v0, v1651; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0652; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]653 %cmp = icmp sle i16 %x, %y654 %res = select i1 %cmp, i16 %x, i16 %y655 %zext = zext i16 %res to i32656 ret i32 %zext657}658 659define i32 @max_u16_zext_i32(i16 %x, i16 %y) {660; GFX8-LABEL: max_u16_zext_i32:661; GFX8: ; %bb.0:662; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)663; GFX8-NEXT: v_max_u16_e32 v0, v0, v1664; GFX8-NEXT: s_setpc_b64 s[30:31]665;666; GFX9ALL-LABEL: max_u16_zext_i32:667; GFX9ALL: ; %bb.0:668; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)669; GFX9ALL-NEXT: v_max_u16_e32 v0, v0, v1670; GFX9ALL-NEXT: s_setpc_b64 s[30:31]671;672; GFX10-LABEL: max_u16_zext_i32:673; GFX10: ; %bb.0:674; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)675; GFX10-NEXT: v_max_u16 v0, v0, v1676; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0677; GFX10-NEXT: s_setpc_b64 s[30:31]678;679; GFX11-TRUE16-LABEL: max_u16_zext_i32:680; GFX11-TRUE16: ; %bb.0:681; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)682; GFX11-TRUE16-NEXT: v_max_u16 v0.l, v0.l, v1.l683; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0684; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]685;686; GFX11-FAKE16-LABEL: max_u16_zext_i32:687; GFX11-FAKE16: ; %bb.0:688; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)689; GFX11-FAKE16-NEXT: v_max_u16 v0, v0, v1690; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0691; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]692 %cmp = icmp uge i16 %x, %y693 %res = select i1 %cmp, i16 %x, i16 %y694 %zext = zext i16 %res to i32695 ret i32 %zext696}697 698define i32 @max_i16_zext_i32(i16 %x, i16 %y) {699; GFX8-LABEL: max_i16_zext_i32:700; GFX8: ; %bb.0:701; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)702; GFX8-NEXT: v_max_i16_e32 v0, v0, v1703; GFX8-NEXT: s_setpc_b64 s[30:31]704;705; GFX9ALL-LABEL: max_i16_zext_i32:706; GFX9ALL: ; %bb.0:707; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)708; GFX9ALL-NEXT: v_max_i16_e32 v0, v0, v1709; GFX9ALL-NEXT: s_setpc_b64 s[30:31]710;711; GFX10-LABEL: max_i16_zext_i32:712; GFX10: ; %bb.0:713; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)714; GFX10-NEXT: v_max_i16 v0, v0, v1715; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0716; GFX10-NEXT: s_setpc_b64 s[30:31]717;718; GFX11-TRUE16-LABEL: max_i16_zext_i32:719; GFX11-TRUE16: ; %bb.0:720; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)721; GFX11-TRUE16-NEXT: v_max_i16 v0.l, v0.l, v1.l722; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0723; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]724;725; GFX11-FAKE16-LABEL: max_i16_zext_i32:726; GFX11-FAKE16: ; %bb.0:727; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)728; GFX11-FAKE16-NEXT: v_max_i16 v0, v0, v1729; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0730; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]731 %cmp = icmp sge i16 %x, %y732 %res = select i1 %cmp, i16 %x, i16 %y733 %zext = zext i16 %res to i32734 ret i32 %zext735}736 737define i32 @zext_fadd_f16(half %x, half %y) {738; GFX8-LABEL: zext_fadd_f16:739; GFX8: ; %bb.0:740; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)741; GFX8-NEXT: v_add_f16_e32 v0, v0, v1742; GFX8-NEXT: s_setpc_b64 s[30:31]743;744; GFX9ALL-LABEL: zext_fadd_f16:745; GFX9ALL: ; %bb.0:746; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)747; GFX9ALL-NEXT: v_add_f16_e32 v0, v0, v1748; GFX9ALL-NEXT: s_setpc_b64 s[30:31]749;750; GFX10-LABEL: zext_fadd_f16:751; GFX10: ; %bb.0:752; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)753; GFX10-NEXT: v_add_f16_e32 v0, v0, v1754; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0755; GFX10-NEXT: s_setpc_b64 s[30:31]756;757; GFX11-TRUE16-LABEL: zext_fadd_f16:758; GFX11-TRUE16: ; %bb.0:759; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)760; GFX11-TRUE16-NEXT: v_add_f16_e32 v0.l, v0.l, v1.l761; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0762; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]763;764; GFX11-FAKE16-LABEL: zext_fadd_f16:765; GFX11-FAKE16: ; %bb.0:766; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)767; GFX11-FAKE16-NEXT: v_add_f16_e32 v0, v0, v1768; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0769; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]770 %add = fadd half %x, %y771 %cast = bitcast half %add to i16772 %zext = zext i16 %cast to i32773 ret i32 %zext774}775 776define i32 @zext_fma_f16(half %x, half %y, half %z) {777; GFX8-LABEL: zext_fma_f16:778; GFX8: ; %bb.0:779; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)780; GFX8-NEXT: v_fma_f16 v0, v0, v1, v2781; GFX8-NEXT: s_setpc_b64 s[30:31]782;783; GFX9ALL-LABEL: zext_fma_f16:784; GFX9ALL: ; %bb.0:785; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)786; GFX9ALL-NEXT: v_fma_f16 v0, v0, v1, v2787; GFX9ALL-NEXT: v_and_b32_e32 v0, 0xffff, v0788; GFX9ALL-NEXT: s_setpc_b64 s[30:31]789;790; GFX10-LABEL: zext_fma_f16:791; GFX10: ; %bb.0:792; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)793; GFX10-NEXT: v_fmac_f16_e32 v2, v0, v1794; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v2795; GFX10-NEXT: s_setpc_b64 s[30:31]796;797; GFX11-TRUE16-LABEL: zext_fma_f16:798; GFX11-TRUE16: ; %bb.0:799; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)800; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, v0.l801; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l802; GFX11-TRUE16-NEXT: v_fmac_f16_e32 v0.l, v0.h, v1.l803; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0804; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]805;806; GFX11-FAKE16-LABEL: zext_fma_f16:807; GFX11-FAKE16: ; %bb.0:808; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)809; GFX11-FAKE16-NEXT: v_fmac_f16_e32 v2, v0, v1810; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v2811; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]812 %fma = call half @llvm.fma.f16(half %x, half %y, half %z)813 %cast = bitcast half %fma to i16814 %zext = zext i16 %cast to i32815 ret i32 %zext816}817 818define i32 @zext_div_fixup_f16(half %x, half %y, half %z) {819; GFX8-LABEL: zext_div_fixup_f16:820; GFX8: ; %bb.0:821; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)822; GFX8-NEXT: v_div_fixup_f16 v0, v0, v1, v2823; GFX8-NEXT: s_setpc_b64 s[30:31]824;825; GFX9ALL-LABEL: zext_div_fixup_f16:826; GFX9ALL: ; %bb.0:827; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)828; GFX9ALL-NEXT: v_div_fixup_f16 v0, v0, v1, v2829; GFX9ALL-NEXT: v_and_b32_e32 v0, 0xffff, v0830; GFX9ALL-NEXT: s_setpc_b64 s[30:31]831;832; GFX10-LABEL: zext_div_fixup_f16:833; GFX10: ; %bb.0:834; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)835; GFX10-NEXT: v_div_fixup_f16 v0, v0, v1, v2836; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0837; GFX10-NEXT: s_setpc_b64 s[30:31]838;839; GFX11-TRUE16-LABEL: zext_div_fixup_f16:840; GFX11-TRUE16: ; %bb.0:841; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)842; GFX11-TRUE16-NEXT: v_div_fixup_f16 v0.l, v0.l, v1.l, v2.l843; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0844; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]845;846; GFX11-FAKE16-LABEL: zext_div_fixup_f16:847; GFX11-FAKE16: ; %bb.0:848; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)849; GFX11-FAKE16-NEXT: v_div_fixup_f16 v0, v0, v1, v2850; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0851; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]852 %div.fixup = call half @llvm.amdgcn.div.fixup.f16(half %x, half %y, half %z)853 %cast = bitcast half %div.fixup to i16854 %zext = zext i16 %cast to i32855 ret i32 %zext856}857 858; We technically could eliminate the and on gfx9 here but we don't try859; to inspect the source of the fptrunc. We're only worried about cases860; that lower to v_fma_mix* instructions.861define i32 @zext_fptrunc_f16(float %x) {862; GFX8-LABEL: zext_fptrunc_f16:863; GFX8: ; %bb.0:864; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)865; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0866; GFX8-NEXT: s_setpc_b64 s[30:31]867;868; GFX9ALL-LABEL: zext_fptrunc_f16:869; GFX9ALL: ; %bb.0:870; GFX9ALL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)871; GFX9ALL-NEXT: v_cvt_f16_f32_e32 v0, v0872; GFX9ALL-NEXT: s_setpc_b64 s[30:31]873;874; GFX10-LABEL: zext_fptrunc_f16:875; GFX10: ; %bb.0:876; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)877; GFX10-NEXT: v_cvt_f16_f32_e32 v0, v0878; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0879; GFX10-NEXT: s_setpc_b64 s[30:31]880;881; GFX11-TRUE16-LABEL: zext_fptrunc_f16:882; GFX11-TRUE16: ; %bb.0:883; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)884; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0885; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0886; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]887;888; GFX11-FAKE16-LABEL: zext_fptrunc_f16:889; GFX11-FAKE16: ; %bb.0:890; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)891; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0892; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0893; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]894 %fptrunc = fptrunc float %x to half895 %cast = bitcast half %fptrunc to i16896 %zext = zext i16 %cast to i32897 ret i32 %zext898}899 900define i32 @zext_fptrunc_fma_f16(float %x, float %y, float %z) {901; GFX8-LABEL: zext_fptrunc_fma_f16:902; GFX8: ; %bb.0:903; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)904; GFX8-NEXT: v_fma_f32 v0, v0, v1, v2905; GFX8-NEXT: v_cvt_f16_f32_e32 v0, v0906; GFX8-NEXT: s_setpc_b64 s[30:31]907;908; GFX900-LABEL: zext_fptrunc_fma_f16:909; GFX900: ; %bb.0:910; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)911; GFX900-NEXT: v_fma_f32 v0, v0, v1, v2912; GFX900-NEXT: v_cvt_f16_f32_e32 v0, v0913; GFX900-NEXT: s_setpc_b64 s[30:31]914;915; GFX906-LABEL: zext_fptrunc_fma_f16:916; GFX906: ; %bb.0:917; GFX906-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)918; GFX906-NEXT: v_fma_mixlo_f16 v0, v0, v1, v2919; GFX906-NEXT: v_and_b32_e32 v0, 0xffff, v0920; GFX906-NEXT: s_setpc_b64 s[30:31]921;922; GFX10-LABEL: zext_fptrunc_fma_f16:923; GFX10: ; %bb.0:924; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)925; GFX10-NEXT: v_fma_mixlo_f16 v0, v0, v1, v2926; GFX10-NEXT: v_and_b32_e32 v0, 0xffff, v0927; GFX10-NEXT: s_setpc_b64 s[30:31]928;929; GFX11-TRUE16-LABEL: zext_fptrunc_fma_f16:930; GFX11-TRUE16: ; %bb.0:931; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)932; GFX11-TRUE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, v2933; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.h, 0934; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]935;936; GFX11-FAKE16-LABEL: zext_fptrunc_fma_f16:937; GFX11-FAKE16: ; %bb.0:938; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)939; GFX11-FAKE16-NEXT: v_fma_mixlo_f16 v0, v0, v1, v2940; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v0941; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]942 %fma = call float @llvm.fma.f32(float %x, float %y, float %z)943 %fptrunc = fptrunc float %fma to half944 %cast = bitcast half %fptrunc to i16945 %zext = zext i16 %cast to i32946 ret i32 %zext947}948 949declare half @llvm.amdgcn.div.fixup.f16(half, half, half)950declare half @llvm.fma.f16(half, half, half)951declare float @llvm.fma.f32(float, float, float)952;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:953; GFX11: {{.*}}954