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1; RUN: llc -mtriple=r600 -mcpu=redwood -disable-promote-alloca-to-vector < %s | FileCheck %s -check-prefix=R600 -check-prefix=FUNC2; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck %s -check-prefix=R600-VECT -check-prefix=FUNC3; RUN: opt -S -mtriple=r600-unknown-unknown -mcpu=redwood -passes=amdgpu-promote-alloca -disable-promote-alloca-to-vector < %s | FileCheck -check-prefix=OPT %s4 5declare i32 @llvm.r600.read.tidig.x() nounwind readnone6 7; FUNC-LABEL: {{^}}mova_same_clause:8 9; R600: LDS_WRITE10; R600: LDS_WRITE11; R600: LDS_READ12; R600: LDS_READ13 14; OPT: call range(i32 0, 257) i32 @llvm.r600.read.local.size.y()15; OPT: call range(i32 0, 257) i32 @llvm.r600.read.local.size.z()16; OPT: call range(i32 0, 256) i32 @llvm.r600.read.tidig.x()17; OPT: call range(i32 0, 256) i32 @llvm.r600.read.tidig.y()18; OPT: call range(i32 0, 256) i32 @llvm.r600.read.tidig.z()19 20define amdgpu_kernel void @mova_same_clause(ptr addrspace(1) nocapture %out, ptr addrspace(1) nocapture %in) #0 {21entry:22 %stack = alloca [5 x i32], align 4, addrspace(5)23 %0 = load i32, ptr addrspace(1) %in, align 424 %arrayidx1 = getelementptr inbounds [5 x i32], ptr addrspace(5) %stack, i32 0, i32 %025 store i32 4, ptr addrspace(5) %arrayidx1, align 426 %arrayidx2 = getelementptr inbounds i32, ptr addrspace(1) %in, i32 127 %1 = load i32, ptr addrspace(1) %arrayidx2, align 428 %arrayidx3 = getelementptr inbounds [5 x i32], ptr addrspace(5) %stack, i32 0, i32 %129 store i32 5, ptr addrspace(5) %arrayidx3, align 430 %2 = load i32, ptr addrspace(5) %stack, align 431 store i32 %2, ptr addrspace(1) %out, align 432 %arrayidx12 = getelementptr inbounds [5 x i32], ptr addrspace(5) %stack, i32 0, i32 133 %3 = load i32, ptr addrspace(5) %arrayidx1234 %arrayidx13 = getelementptr inbounds i32, ptr addrspace(1) %out, i32 135 store i32 %3, ptr addrspace(1) %arrayidx1336 ret void37}38 39; This test checks that the stack offset is calculated correctly for structs.40; All register loads/stores should be optimized away, so there shouldn't be41; any MOVA instructions.42;43; XXX: This generated code has unnecessary MOVs, we should be able to optimize44; this.45 46; FUNC-LABEL: {{^}}multiple_structs:47; R600-NOT: MOVA_INT48%struct.point = type { i32, i32 }49 50define amdgpu_kernel void @multiple_structs(ptr addrspace(1) %out) #0 {51entry:52 %a = alloca %struct.point, addrspace(5)53 %b = alloca %struct.point, addrspace(5)54 %a.y.ptr = getelementptr inbounds %struct.point, ptr addrspace(5) %a, i32 0, i32 155 %b.y.ptr = getelementptr inbounds %struct.point, ptr addrspace(5) %b, i32 0, i32 156 store i32 0, ptr addrspace(5) %a57 store i32 1, ptr addrspace(5) %a.y.ptr58 store i32 2, ptr addrspace(5) %b59 store i32 3, ptr addrspace(5) %b.y.ptr60 %a.indirect = load i32, ptr addrspace(5) %a61 %b.indirect = load i32, ptr addrspace(5) %b62 %0 = add i32 %a.indirect, %b.indirect63 store i32 %0, ptr addrspace(1) %out64 ret void65}66 67; Test direct access of a private array inside a loop. The private array68; loads and stores should be lowered to copies, so there shouldn't be any69; MOVA instructions.70 71; FUNC-LABEL: {{^}}direct_loop:72; R600-NOT: MOVA_INT73 74define amdgpu_kernel void @direct_loop(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {75entry:76 %prv_array_const = alloca [2 x i32], addrspace(5)77 %prv_array = alloca [2 x i32], addrspace(5)78 %a = load i32, ptr addrspace(1) %in79 %b_src_ptr = getelementptr inbounds i32, ptr addrspace(1) %in, i32 180 %b = load i32, ptr addrspace(1) %b_src_ptr81 store i32 %a, ptr addrspace(5) %prv_array_const82 %b_dst_ptr = getelementptr inbounds [2 x i32], ptr addrspace(5) %prv_array_const, i32 0, i32 183 store i32 %b, ptr addrspace(5) %b_dst_ptr84 br label %for.body85 86for.body:87 %inc = phi i32 [0, %entry], [%count, %for.body]88 %x = load i32, ptr addrspace(5) %prv_array_const89 %y = load i32, ptr addrspace(5) %prv_array90 %xy = add i32 %x, %y91 store i32 %xy, ptr addrspace(5) %prv_array92 %count = add i32 %inc, 193 %done = icmp eq i32 %count, 409594 br i1 %done, label %for.end, label %for.body95 96for.end:97 %value = load i32, ptr addrspace(5) %prv_array98 store i32 %value, ptr addrspace(1) %out99 ret void100}101 102; FUNC-LABEL: {{^}}short_array:103 104; R600-VECT: MOVA_INT105define amdgpu_kernel void @short_array(ptr addrspace(1) %out, i32 %index) #0 {106entry:107 %0 = alloca [2 x i16], addrspace(5)108 %1 = getelementptr inbounds [2 x i16], ptr addrspace(5) %0, i32 0, i32 1109 store i16 0, ptr addrspace(5) %0110 store i16 1, ptr addrspace(5) %1111 %2 = getelementptr inbounds [2 x i16], ptr addrspace(5) %0, i32 0, i32 %index112 %3 = load i16, ptr addrspace(5) %2113 %4 = sext i16 %3 to i32114 store i32 %4, ptr addrspace(1) %out115 ret void116}117 118; FUNC-LABEL: {{^}}char_array:119 120; R600-VECT: MOVA_INT121define amdgpu_kernel void @char_array(ptr addrspace(1) %out, i32 %index) #0 {122entry:123 %0 = alloca [2 x i8], addrspace(5)124 %1 = getelementptr inbounds [2 x i8], ptr addrspace(5) %0, i32 0, i32 1125 store i8 0, ptr addrspace(5) %0126 store i8 1, ptr addrspace(5) %1127 %2 = getelementptr inbounds [2 x i8], ptr addrspace(5) %0, i32 0, i32 %index128 %3 = load i8, ptr addrspace(5) %2129 %4 = sext i8 %3 to i32130 store i32 %4, ptr addrspace(1) %out131 ret void132 133}134 135; Make sure we don't overwrite workitem information with private memory136 137; FUNC-LABEL: {{^}}work_item_info:138; R600-NOT: MOV T0.X139; Additional check in case the move ends up in the last slot140; R600-NOT: MOV * TO.X141define amdgpu_kernel void @work_item_info(ptr addrspace(1) %out, i32 %in) #0 {142entry:143 %0 = alloca [2 x i32], addrspace(5)144 %1 = getelementptr inbounds [2 x i32], ptr addrspace(5) %0, i32 0, i32 1145 store i32 0, ptr addrspace(5) %0146 store i32 1, ptr addrspace(5) %1147 %2 = getelementptr inbounds [2 x i32], ptr addrspace(5) %0, i32 0, i32 %in148 %3 = load i32, ptr addrspace(5) %2149 %4 = call i32 @llvm.r600.read.tidig.x()150 %5 = add i32 %3, %4151 store i32 %5, ptr addrspace(1) %out152 ret void153}154 155; Test that two stack objects are not stored in the same register156; The second stack object should be in T3.X157; FUNC-LABEL: {{^}}no_overlap:158define amdgpu_kernel void @no_overlap(ptr addrspace(1) %out, i32 %in) #0 {159entry:160 %0 = alloca [3 x i8], align 1, addrspace(5)161 %1 = alloca [2 x i8], align 1, addrspace(5)162 %2 = getelementptr inbounds [3 x i8], ptr addrspace(5) %0, i32 0, i32 1163 %3 = getelementptr inbounds [3 x i8], ptr addrspace(5) %0, i32 0, i32 2164 %4 = getelementptr inbounds [2 x i8], ptr addrspace(5) %1, i32 0, i32 1165 store i8 0, ptr addrspace(5) %0166 store i8 1, ptr addrspace(5) %2167 store i8 2, ptr addrspace(5) %3168 store i8 1, ptr addrspace(5) %1169 store i8 0, ptr addrspace(5) %4170 %5 = getelementptr inbounds [3 x i8], ptr addrspace(5) %0, i32 0, i32 %in171 %6 = getelementptr inbounds [2 x i8], ptr addrspace(5) %1, i32 0, i32 %in172 %7 = load i8, ptr addrspace(5) %5173 %8 = load i8, ptr addrspace(5) %6174 %9 = add i8 %7, %8175 %10 = sext i8 %9 to i32176 store i32 %10, ptr addrspace(1) %out177 ret void178}179 180define amdgpu_kernel void @char_array_array(ptr addrspace(1) %out, i32 %index) #0 {181entry:182 %alloca = alloca [2 x [2 x i8]], addrspace(5)183 %gep1 = getelementptr inbounds [2 x [2 x i8]], ptr addrspace(5) %alloca, i32 0, i32 0, i32 1184 store i8 0, ptr addrspace(5) %alloca185 store i8 1, ptr addrspace(5) %gep1186 %gep2 = getelementptr inbounds [2 x [2 x i8]], ptr addrspace(5) %alloca, i32 0, i32 0, i32 %index187 %load = load i8, ptr addrspace(5) %gep2188 %sext = sext i8 %load to i32189 store i32 %sext, ptr addrspace(1) %out190 ret void191}192 193define amdgpu_kernel void @i32_array_array(ptr addrspace(1) %out, i32 %index) #0 {194entry:195 %alloca = alloca [2 x [2 x i32]], addrspace(5)196 %gep1 = getelementptr inbounds [2 x [2 x i32]], ptr addrspace(5) %alloca, i32 0, i32 0, i32 1197 store i32 0, ptr addrspace(5) %alloca198 store i32 1, ptr addrspace(5) %gep1199 %gep2 = getelementptr inbounds [2 x [2 x i32]], ptr addrspace(5) %alloca, i32 0, i32 0, i32 %index200 %load = load i32, ptr addrspace(5) %gep2201 store i32 %load, ptr addrspace(1) %out202 ret void203}204 205define amdgpu_kernel void @i64_array_array(ptr addrspace(1) %out, i32 %index) #0 {206entry:207 %alloca = alloca [2 x [2 x i64]], addrspace(5)208 %gep1 = getelementptr inbounds [2 x [2 x i64]], ptr addrspace(5) %alloca, i32 0, i32 0, i32 1209 store i64 0, ptr addrspace(5) %alloca210 store i64 1, ptr addrspace(5) %gep1211 %gep2 = getelementptr inbounds [2 x [2 x i64]], ptr addrspace(5) %alloca, i32 0, i32 0, i32 %index212 %load = load i64, ptr addrspace(5) %gep2213 store i64 %load, ptr addrspace(1) %out214 ret void215}216 217%struct.pair32 = type { i32, i32 }218 219define amdgpu_kernel void @struct_array_array(ptr addrspace(1) %out, i32 %index) #0 {220entry:221 %alloca = alloca [2 x [2 x %struct.pair32]], addrspace(5)222 %gep0 = getelementptr inbounds [2 x [2 x %struct.pair32]], ptr addrspace(5) %alloca, i32 0, i32 0, i32 0, i32 1223 %gep1 = getelementptr inbounds [2 x [2 x %struct.pair32]], ptr addrspace(5) %alloca, i32 0, i32 0, i32 1, i32 1224 store i32 0, ptr addrspace(5) %gep0225 store i32 1, ptr addrspace(5) %gep1226 %gep2 = getelementptr inbounds [2 x [2 x %struct.pair32]], ptr addrspace(5) %alloca, i32 0, i32 0, i32 %index, i32 0227 %load = load i32, ptr addrspace(5) %gep2228 store i32 %load, ptr addrspace(1) %out229 ret void230}231 232define amdgpu_kernel void @struct_pair32_array(ptr addrspace(1) %out, i32 %index) #0 {233entry:234 %alloca = alloca [2 x %struct.pair32], addrspace(5)235 %gep0 = getelementptr inbounds [2 x %struct.pair32], ptr addrspace(5) %alloca, i32 0, i32 0, i32 1236 %gep1 = getelementptr inbounds [2 x %struct.pair32], ptr addrspace(5) %alloca, i32 0, i32 1, i32 0237 store i32 0, ptr addrspace(5) %gep0238 store i32 1, ptr addrspace(5) %gep1239 %gep2 = getelementptr inbounds [2 x %struct.pair32], ptr addrspace(5) %alloca, i32 0, i32 %index, i32 0240 %load = load i32, ptr addrspace(5) %gep2241 store i32 %load, ptr addrspace(1) %out242 ret void243}244 245define amdgpu_kernel void @select_private(ptr addrspace(1) %out, i32 %in) nounwind {246entry:247 %tmp = alloca [2 x i32], addrspace(5)248 %tmp2 = getelementptr inbounds [2 x i32], ptr addrspace(5) %tmp, i32 0, i32 1249 store i32 0, ptr addrspace(5) %tmp250 store i32 1, ptr addrspace(5) %tmp2251 %cmp = icmp eq i32 %in, 0252 %sel = select i1 %cmp, ptr addrspace(5) %tmp, ptr addrspace(5) %tmp2253 %load = load i32, ptr addrspace(5) %sel254 store i32 %load, ptr addrspace(1) %out255 ret void256}257 258; AMDGPUPromoteAlloca does not know how to handle ptrtoint. When it259; finds one, it should stop trying to promote.260 261; FUNC-LABEL: ptrtoint:262; SI-NOT: ds_write263; SI: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen264; SI: buffer_load_dword v{{[0-9]+}}, v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}], s{{[0-9]+}} offen ;265define amdgpu_kernel void @ptrtoint(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {266 %alloca = alloca [16 x i32], addrspace(5)267 %tmp0 = getelementptr inbounds [16 x i32], ptr addrspace(5) %alloca, i32 0, i32 %a268 store i32 5, ptr addrspace(5) %tmp0269 %tmp1 = ptrtoint ptr addrspace(5) %alloca to i32270 %tmp2 = add i32 %tmp1, 5271 %tmp3 = inttoptr i32 %tmp2 to ptr addrspace(5)272 %tmp4 = getelementptr inbounds i32, ptr addrspace(5) %tmp3, i32 %b273 %tmp5 = load i32, ptr addrspace(5) %tmp4274 store i32 %tmp5, ptr addrspace(1) %out275 ret void276}277 278attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,2" "amdgpu-flat-work-group-size"="1,256" }279