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1; RUN: opt -data-layout=A5 -S -mtriple=amdgcn-unknown-unknown -passes=amdgpu-promote-alloca -disable-promote-alloca-to-vector < %s | FileCheck -check-prefix=IR %s2; RUN: llc -mtriple=amdgcn -mcpu=fiji -disable-promote-alloca-to-vector < %s | FileCheck -check-prefix=ASM %s3 4; IR-LABEL: define amdgpu_vs void @promote_alloca_shaders(ptr addrspace(1) inreg %out, ptr addrspace(1) inreg %in) #0 {5; IR: alloca [5 x i32]6 7; ASM-LABEL: {{^}}promote_alloca_shaders:8; ASM: ; ScratchSize: 249define amdgpu_vs void @promote_alloca_shaders(ptr addrspace(1) inreg %out, ptr addrspace(1) inreg %in) #0 {10entry:11  %stack = alloca [5 x i32], align 4, addrspace(5)12  %tmp0 = load i32, ptr addrspace(1) %in, align 413  %arrayidx1 = getelementptr inbounds [5 x i32], ptr addrspace(5) %stack, i32 0, i32 %tmp014  store i32 4, ptr addrspace(5) %arrayidx1, align 415  %arrayidx2 = getelementptr inbounds i32, ptr addrspace(1) %in, i32 116  %tmp1 = load i32, ptr addrspace(1) %arrayidx2, align 417  %arrayidx3 = getelementptr inbounds [5 x i32], ptr addrspace(5) %stack, i32 0, i32 %tmp118  store i32 5, ptr addrspace(5) %arrayidx3, align 419  %tmp2 = load i32, ptr addrspace(5) %stack, align 420  store i32 %tmp2, ptr addrspace(1) %out, align 421  %arrayidx5 = getelementptr inbounds [5 x i32], ptr addrspace(5) %stack, i32 0, i32 122  %tmp3 = load i32, ptr addrspace(5) %arrayidx523  %arrayidx6 = getelementptr inbounds i32, ptr addrspace(1) %out, i32 124  store i32 %tmp3, ptr addrspace(1) %arrayidx625  ret void26}27 28; OPT-LABEL: @promote_to_vector_call_c(29; OPT-NOT: alloca30; OPT: extractelement <2 x i32> %{{[0-9]+}}, i32 %in31 32; ASM-LABEL: {{^}}promote_to_vector_call_c:33; ASM-NOT: LDSByteSize34; ASM: ; ScratchSize: 1235define void @promote_to_vector_call_c(ptr addrspace(1) %out, i32 %in) #0 {36entry:37  %tmp = alloca [2 x i32], addrspace(5)38  %tmp2 = getelementptr [2 x i32], ptr addrspace(5) %tmp, i32 0, i32 139  store i32 0, ptr addrspace(5) %tmp40  store i32 1, ptr addrspace(5) %tmp241  %tmp3 = getelementptr [2 x i32], ptr addrspace(5) %tmp, i32 0, i32 %in42  %tmp4 = load i32, ptr addrspace(5) %tmp343  %tmp5 = load volatile i32, ptr addrspace(1) poison44  %tmp6 = add i32 %tmp4, %tmp545  store i32 %tmp6, ptr addrspace(1) %out46  ret void47}48 49; OPT-LABEL: @no_promote_to_lds_c(50; OPT: alloca51 52; ASM-LABEL: {{^}}no_promote_to_lds_c:53; ASM-NOT: LDSByteSize54; ASM: ; ScratchSize: 2455define void @no_promote_to_lds_c(ptr addrspace(1) nocapture %out, ptr addrspace(1) nocapture %in) #0 {56entry:57  %stack = alloca [5 x i32], align 4, addrspace(5)58  %0 = load i32, ptr addrspace(1) %in, align 459  %arrayidx1 = getelementptr inbounds [5 x i32], ptr addrspace(5) %stack, i32 0, i32 %060  store i32 4, ptr addrspace(5) %arrayidx1, align 461  %arrayidx2 = getelementptr inbounds i32, ptr addrspace(1) %in, i32 162  %1 = load i32, ptr addrspace(1) %arrayidx2, align 463  %arrayidx3 = getelementptr inbounds [5 x i32], ptr addrspace(5) %stack, i32 0, i32 %164  store i32 5, ptr addrspace(5) %arrayidx3, align 465  %2 = load i32, ptr addrspace(5) %stack, align 466  store i32 %2, ptr addrspace(1) %out, align 467  %arrayidx12 = getelementptr inbounds [5 x i32], ptr addrspace(5) %stack, i32 0, i32 168  %3 = load i32, ptr addrspace(5) %arrayidx1269  %arrayidx13 = getelementptr inbounds i32, ptr addrspace(1) %out, i32 170  store i32 %3, ptr addrspace(1) %arrayidx1371  ret void72}73 74declare i32 @foo(ptr addrspace(5)) #075 76; ASM-LABEL: {{^}}call_private:77; ASM: buffer_store_dword78; ASM: buffer_store_dword79; ASM: s_swappc_b6480; ASM: ScratchSize: 1681define amdgpu_kernel void @call_private(ptr addrspace(1) %out, i32 %in) #0 {82entry:83  %tmp = alloca [2 x i32], addrspace(5)84  %tmp2 = getelementptr [2 x i32], ptr addrspace(5) %tmp, i32 0, i32 185  store i32 0, ptr addrspace(5) %tmp86  store i32 1, ptr addrspace(5) %tmp287  %tmp3 = getelementptr [2 x i32], ptr addrspace(5) %tmp, i32 0, i32 %in88  %val = call i32 @foo(ptr addrspace(5) %tmp3)89  store i32 %val, ptr addrspace(1) %out90  ret void91}92 93declare i32 @llvm.amdgcn.workitem.id.x() #194 95attributes #0 = { nounwind "amdgpu-flat-work-group-size"="64,64" }96attributes #1 = { nounwind readnone }97 98