366 lines · plain
1;RUN: llc -global-isel=1 < %s -mtriple=amdgcn-pal -mcpu=gfx1010 | FileCheck %s --check-prefixes=CHECK2;RUN: llc -global-isel=1 < %s -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 | FileCheck %s --check-prefixes=CHECK3;RUN: llc -global-isel=0 < %s -mtriple=amdgcn-pal -mcpu=gfx1010 | FileCheck %s --check-prefixes=CHECK4;RUN: llc -global-isel=0 < %s -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 | FileCheck %s --check-prefixes=CHECK5 6; ;CHECK-LABEL: {{^}}_amdgpu_ps_1_arg:7; ;CHECK: NumVgprs: 48define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_1_arg(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18) local_unnamed_addr #0 {9.entry:10 %i1 = extractelement <2 x float> %arg3, i32 111 %ret1 = insertelement <4 x float> poison, float %i1, i32 012 %ret2 = insertvalue { <4 x float> } poison, <4 x float> %ret1, 013 ret { <4 x float> } %ret214}15 16; CHECK-LABEL: {{^}}_amdgpu_ps_3_arg:17; CHECK: NumVgprs: 618define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_3_arg(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18) local_unnamed_addr #0 {19.entry:20 %i1 = extractelement <2 x float> %arg3, i32 121 %i2 = extractelement <2 x float> %arg4, i32 022 %i3 = extractelement <2 x float> %arg5, i32 123 %ret1 = insertelement <4 x float> poison, float %i1, i32 024 %ret1.1 = insertelement <4 x float> %ret1, float %i2, i32 125 %ret1.2 = insertelement <4 x float> %ret1.1, float %i3, i32 226 %ret2 = insertvalue { <4 x float> } poison, <4 x float> %ret1.2, 027 ret { <4 x float> } %ret228}29 30; CHECK-LABEL: {{^}}_amdgpu_ps_2_arg_gap:31; CHECK: NumVgprs: 432define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_2_arg_gap(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18) local_unnamed_addr #0 {33.entry:34 %i1 = extractelement <2 x float> %arg3, i32 135 %i3 = extractelement <2 x float> %arg5, i32 136 %ret1 = insertelement <4 x float> poison, float %i1, i32 037 %ret1.2 = insertelement <4 x float> %ret1, float %i3, i32 138 %ret2 = insertvalue { <4 x float> } poison, <4 x float> %ret1.2, 039 ret { <4 x float> } %ret240}41 42; Using InitialPSInputAddr of 0x2 causes the 2nd VGPR arg to be included in the packing - this increases the total number of VGPRs and in turn makes arg3 not be packed to be43; adjacent to arg1 (the only 2 used arguments)44; CHECK-LABEL: {{^}}_amdgpu_ps_2_arg_no_pack:45; CHECK: NumVgprs: 646define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_2_arg_no_pack(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18) local_unnamed_addr #1 {47.entry:48 %i1 = extractelement <2 x float> %arg3, i32 149 %i3 = extractelement <2 x float> %arg5, i32 150 %ret1 = insertelement <4 x float> poison, float %i1, i32 051 %ret1.2 = insertelement <4 x float> %ret1, float %i3, i32 152 %ret2 = insertvalue { <4 x float> } poison, <4 x float> %ret1.2, 053 ret { <4 x float> } %ret254}55 56; CHECK-LABEL: {{^}}_amdgpu_ps_all_arg:57; CHECK: NumVgprs: 2458define dllexport amdgpu_ps { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @_amdgpu_ps_all_arg(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18) local_unnamed_addr #0 {59.entry:60 %i1 = extractelement <2 x float> %arg3, i32 161 %i2 = extractelement <2 x float> %arg4, i32 062 %i3 = extractelement <2 x float> %arg5, i32 163 %i4 = extractelement <3 x float> %arg6, i32 164 %i5 = extractelement <2 x float> %arg7, i32 065 %i6 = extractelement <2 x float> %arg8, i32 066 %i7 = extractelement <2 x float> %arg9, i32 167 68 %ret1 = insertelement <4 x float> poison, float %i1, i32 069 %ret1.1 = insertelement <4 x float> %ret1, float %i2, i32 170 %ret1.2 = insertelement <4 x float> %ret1.1, float %i3, i32 271 %ret1.3 = insertelement <4 x float> %ret1.2, float %i4, i32 372 73 %ret2 = insertelement <4 x float> poison, float %i5, i32 074 %ret2.1 = insertelement <4 x float> %ret2, float %i6, i32 175 %ret2.2 = insertelement <4 x float> %ret2.1, float %i7, i32 276 %ret2.3 = insertelement <4 x float> %ret2.2, float %arg10, i32 377 78 %ret3 = insertelement <4 x float> poison, float %arg11, i32 079 %ret3.1 = insertelement <4 x float> %ret3, float %arg12, i32 180 %ret3.2 = insertelement <4 x float> %ret3.1, float %arg13, i32 281 %ret3.3 = insertelement <4 x float> %ret3.2, float %arg14, i32 382 83 %arg15.f = bitcast i32 %arg15 to float84 %arg16.f = bitcast i32 %arg16 to float85 %arg17.f = bitcast i32 %arg17 to float86 %arg18.f = bitcast i32 %arg18 to float87 88 %ret4 = insertelement <4 x float> poison, float %arg15.f, i32 089 %ret4.1 = insertelement <4 x float> %ret4, float %arg16.f, i32 190 %ret4.2 = insertelement <4 x float> %ret4.1, float %arg17.f, i32 291 %ret4.3 = insertelement <4 x float> %ret4.2, float %arg18.f, i32 392 93 %ret.res1 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } poison, <4 x float> %ret1.3, 094 %ret.res2 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res1, <4 x float> %ret2.3, 195 %ret.res3 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res2, <4 x float> %ret3.3, 296 %ret.res = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res3, <4 x float> %ret4.3, 397 98 ret { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res99}100 101; Extra arguments have to be allocated even if they're unused102; CHECK-LABEL: {{^}}_amdgpu_ps_all_arg_extra_unused:103; CHECK: NumVgprs: 26104define dllexport amdgpu_ps { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @_amdgpu_ps_all_arg_extra_unused(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #0 {105.entry:106 %i1 = extractelement <2 x float> %arg3, i32 1107 %i2 = extractelement <2 x float> %arg4, i32 0108 %i3 = extractelement <2 x float> %arg5, i32 1109 %i4 = extractelement <3 x float> %arg6, i32 1110 %i5 = extractelement <2 x float> %arg7, i32 0111 %i6 = extractelement <2 x float> %arg8, i32 0112 %i7 = extractelement <2 x float> %arg9, i32 1113 114 %ret1 = insertelement <4 x float> poison, float %i1, i32 0115 %ret1.1 = insertelement <4 x float> %ret1, float %i2, i32 1116 %ret1.2 = insertelement <4 x float> %ret1.1, float %i3, i32 2117 %ret1.3 = insertelement <4 x float> %ret1.2, float %i4, i32 3118 119 %ret2 = insertelement <4 x float> poison, float %i5, i32 0120 %ret2.1 = insertelement <4 x float> %ret2, float %i6, i32 1121 %ret2.2 = insertelement <4 x float> %ret2.1, float %i7, i32 2122 %ret2.3 = insertelement <4 x float> %ret2.2, float %arg10, i32 3123 124 %ret3 = insertelement <4 x float> poison, float %arg11, i32 0125 %ret3.1 = insertelement <4 x float> %ret3, float %arg12, i32 1126 %ret3.2 = insertelement <4 x float> %ret3.1, float %arg13, i32 2127 %ret3.3 = insertelement <4 x float> %ret3.2, float %arg14, i32 3128 129 %arg15.f = bitcast i32 %arg15 to float130 %arg16.f = bitcast i32 %arg16 to float131 %arg17.f = bitcast i32 %arg17 to float132 %arg18.f = bitcast i32 %arg18 to float133 134 %ret4 = insertelement <4 x float> poison, float %arg15.f, i32 0135 %ret4.1 = insertelement <4 x float> %ret4, float %arg16.f, i32 1136 %ret4.2 = insertelement <4 x float> %ret4.1, float %arg17.f, i32 2137 %ret4.3 = insertelement <4 x float> %ret4.2, float %arg18.f, i32 3138 139 %ret.res1 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } poison, <4 x float> %ret1.3, 0140 %ret.res2 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res1, <4 x float> %ret2.3, 1141 %ret.res3 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res2, <4 x float> %ret3.3, 2142 %ret.res = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res3, <4 x float> %ret4.3, 3143 144 ret { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res145}146 147; CHECK-LABEL: {{^}}_amdgpu_ps_all_arg_extra:148; CHECK: NumVgprs: 26149; CHECK: NumVGPRsForWavesPerEU: 26150define dllexport amdgpu_ps { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @_amdgpu_ps_all_arg_extra(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #0 {151.entry:152 %i1 = extractelement <2 x float> %arg3, i32 1153 %i2 = extractelement <2 x float> %arg4, i32 0154 %i3 = extractelement <2 x float> %arg5, i32 1155 %i4 = extractelement <3 x float> %arg6, i32 1156 %i5 = extractelement <2 x float> %arg7, i32 0157 %i6 = extractelement <2 x float> %arg8, i32 0158 %i7 = extractelement <2 x float> %arg9, i32 1159 160 %ret1 = insertelement <4 x float> poison, float %i1, i32 0161 %ret1.1 = insertelement <4 x float> %ret1, float %i2, i32 1162 %ret1.2 = insertelement <4 x float> %ret1.1, float %i3, i32 2163 %ret1.3 = insertelement <4 x float> %ret1.2, float %i4, i32 3164 165 %ret2 = insertelement <4 x float> poison, float %i5, i32 0166 %ret2.1 = insertelement <4 x float> %ret2, float %i6, i32 1167 %ret2.2 = insertelement <4 x float> %ret2.1, float %i7, i32 2168 %ret2.3 = insertelement <4 x float> %ret2.2, float %arg10, i32 3169 170 %ret3 = insertelement <4 x float> poison, float %arg11, i32 0171 %ret3.1 = insertelement <4 x float> %ret3, float %arg12, i32 1172 %ret3.2 = insertelement <4 x float> %ret3.1, float %arg13, i32 2173 %ret3.3 = insertelement <4 x float> %ret3.2, float %arg14, i32 3174 175 %arg15.f = bitcast i32 %arg15 to float176 %arg16.f = bitcast i32 %arg16 to float177 %arg17.f = bitcast i32 %arg17 to float178 %arg18.f = bitcast i32 %arg18 to float179 180 %arg15_16.f = fadd float %arg15.f, %arg16.f181 %arg17_18.f = fadd float %arg17.f, %arg18.f182 183 %ret4 = insertelement <4 x float> poison, float %extra_arg1, i32 0184 %ret4.1 = insertelement <4 x float> %ret4, float %extra_arg2, i32 1185 %ret4.2 = insertelement <4 x float> %ret4.1, float %arg15_16.f, i32 2186 %ret4.3 = insertelement <4 x float> %ret4.2, float %arg17_18.f, i32 3187 188 %ret.res1 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } poison, <4 x float> %ret1.3, 0189 %ret.res2 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res1, <4 x float> %ret2.3, 1190 %ret.res3 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res2, <4 x float> %ret3.3, 2191 %ret.res = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res3, <4 x float> %ret4.3, 3192 193 ret { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res194}195 196; Check that when no input args are used we get the minimum allocation - note that we always enable the first input197; CHECK-LABEL: {{^}}_amdgpu_ps_all_unused:198; CHECK: NumVgprs: 4199define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_all_unused(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18) local_unnamed_addr #0 {200.entry:201 ret { <4 x float> } undef202}203 204; Check that when no input args are used we get the minimum allocation - note that we always enable the first input205; Additionally set the PSInputAddr to 0 via the metadata206; CHECK-LABEL: {{^}}_amdgpu_ps_all_unused_ia0:207; CHECK: NumVgprs: 4208define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_all_unused_ia0(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18) local_unnamed_addr #3 {209.entry:210 ret { <4 x float> } undef211}212 213; CHECK-LABEL: {{^}}_amdgpu_ps_all_unused_extra_used:214; CHECK: NumVgprs: 4215define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_all_unused_extra_used(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #0 {216.entry:217 %ret4.1 = insertelement <4 x float> poison, float %extra_arg1, i32 0218 %ret4.2 = insertelement <4 x float> %ret4.1, float %extra_arg2, i32 1219 220 %ret.res = insertvalue { <4 x float> } poison, <4 x float> %ret4.2, 0221 222 ret { <4 x float> } %ret.res223}224 225; CHECK-LABEL: {{^}}_amdgpu_ps_part_unused_extra_used:226; CHECK: NumVgprs: 5227define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_part_unused_extra_used(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #0 {228.entry:229 %ret4.1 = insertelement <4 x float> poison, float %arg14, i32 0230 %ret4.2 = insertelement <4 x float> %ret4.1, float %extra_arg1, i32 1231 %ret4.3 = insertelement <4 x float> %ret4.2, float %extra_arg2, i32 2232 233 %ret.res = insertvalue { <4 x float> } poison, <4 x float> %ret4.3, 0234 235 ret { <4 x float> } %ret.res236}237 238; CHECK-LABEL: {{^}}_amdgpu_ps_part_unused_extra_unused:239; CHECK: NumVgprs: 7240define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_part_unused_extra_unused(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #0 {241.entry:242 %ret4.1 = insertelement <4 x float> poison, float %arg12, i32 0243 %ret4.2 = insertelement <4 x float> %ret4.1, float %arg13, i32 1244 %ret4.3 = insertelement <4 x float> %ret4.2, float %arg14, i32 2245 246 %ret.res = insertvalue { <4 x float> } poison, <4 x float> %ret4.3, 0247 248 ret { <4 x float> } %ret.res249}250 251; Extra unused inputs are always added to the allocation252; CHECK-LABEL: {{^}}_amdgpu_ps_all_unused_extra_unused:253; CHECK: NumVgprs: 4254define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_all_unused_extra_unused(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #0 {255.entry:256 257 ret { <4 x float> } undef258}259 260; CHECK-LABEL: {{^}}_amdgpu_ps_all_unused_extra_used_no_packing:261; CHECK: NumVgprs: 26262define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_all_unused_extra_used_no_packing(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #2 {263.entry:264 %ret4.1 = insertelement <4 x float> poison, float %extra_arg1, i32 0265 %ret4.2 = insertelement <4 x float> %ret4.1, float %extra_arg2, i32 1266 267 %ret.res = insertvalue { <4 x float> } poison, <4 x float> %ret4.2, 0268 269 ret { <4 x float> } %ret.res270}271 272; CHECK-LABEL: {{^}}_amdgpu_ps_all_unused_extra_unused_no_packing:273; CHECK: NumVgprs: 26274define dllexport amdgpu_ps { <4 x float> } @_amdgpu_ps_all_unused_extra_unused_no_packing(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #2 {275.entry:276 ret { <4 x float> } undef277}278 279; CHECK-LABEL: {{^}}_amdgpu_ps_some_unused_arg_extra:280; CHECK: NumVgprs: 24281; CHECK: NumVGPRsForWavesPerEU: 24282define dllexport amdgpu_ps { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @_amdgpu_ps_some_unused_arg_extra(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #0 {283.entry:284 %i1 = extractelement <2 x float> %arg3, i32 1285 %i2 = extractelement <2 x float> %arg4, i32 0286 %i3 = extractelement <2 x float> %arg5, i32 1287 %i4 = extractelement <3 x float> %arg6, i32 1288 %i5 = extractelement <2 x float> %arg7, i32 0289 %i6 = extractelement <2 x float> %arg8, i32 0290 %i7 = extractelement <2 x float> %arg9, i32 1291 292 %ret1 = insertelement <4 x float> poison, float %i1, i32 0293 %ret1.1 = insertelement <4 x float> %ret1, float %i2, i32 1294 %ret1.2 = insertelement <4 x float> %ret1.1, float %i3, i32 2295 %ret1.3 = insertelement <4 x float> %ret1.2, float %i4, i32 3296 297 %ret2 = insertelement <4 x float> poison, float %i5, i32 0298 %ret2.1 = insertelement <4 x float> %ret2, float %i6, i32 1299 %ret2.2 = insertelement <4 x float> %ret2.1, float %i7, i32 2300 %ret2.3 = insertelement <4 x float> %ret2.2, float %arg10, i32 3301 302 %ret3 = insertelement <4 x float> poison, float %arg11, i32 0303 %ret3.1 = insertelement <4 x float> %ret3, float %arg12, i32 1304 %ret3.2 = insertelement <4 x float> %ret3.1, float %arg13, i32 2305 %ret3.3 = insertelement <4 x float> %ret3.2, float %arg14, i32 3306 307 %arg15.f = bitcast i32 %arg15 to float308 %arg16.f = bitcast i32 %arg16 to float309 310 %ret4 = insertelement <4 x float> poison, float %extra_arg1, i32 0311 %ret4.1 = insertelement <4 x float> %ret4, float %extra_arg2, i32 1312 %ret4.2 = insertelement <4 x float> %ret4.1, float %arg15.f, i32 2313 %ret4.3 = insertelement <4 x float> %ret4.2, float %arg16.f, i32 3314 315 %ret.res1 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } poison, <4 x float> %ret1.3, 0316 %ret.res2 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res1, <4 x float> %ret2.3, 1317 %ret.res3 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res2, <4 x float> %ret3.3, 2318 %ret.res = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res3, <4 x float> %ret4.3, 3319 320 ret { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res321}322 323;CHECK-LABEL: {{^}}_amdgpu_ps_some_unused_no_packing_arg_extra:324;CHECK: NumVgprs: 26325;CHECK: NumVGPRsForWavesPerEU: 26326define dllexport amdgpu_ps { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @_amdgpu_ps_some_unused_no_packing_arg_extra(i32 inreg %arg, i32 inreg %arg1, i32 inreg %arg2, <2 x float> %arg3, <2 x float> %arg4, <2 x float> %arg5, <3 x float> %arg6, <2 x float> %arg7, <2 x float> %arg8, <2 x float> %arg9, float %arg10, float %arg11, float %arg12, float %arg13, float %arg14, i32 %arg15, i32 %arg16, i32 %arg17, i32 %arg18, float %extra_arg1, float %extra_arg2) local_unnamed_addr #2 {327.entry:328 %i1 = extractelement <2 x float> %arg3, i32 1329 %i2 = extractelement <2 x float> %arg4, i32 0330 %i3 = extractelement <2 x float> %arg5, i32 1331 %i4 = extractelement <3 x float> %arg6, i32 1332 %i5 = extractelement <2 x float> %arg7, i32 0333 %i6 = extractelement <2 x float> %arg8, i32 0334 %i7 = extractelement <2 x float> %arg9, i32 1335 336 %ret1 = insertelement <4 x float> poison, float %i1, i32 0337 %ret1.1 = insertelement <4 x float> %ret1, float %i2, i32 1338 %ret1.2 = insertelement <4 x float> %ret1.1, float %i3, i32 2339 %ret1.3 = insertelement <4 x float> %ret1.2, float %i4, i32 3340 341 %ret2 = insertelement <4 x float> poison, float %i5, i32 0342 %ret2.1 = insertelement <4 x float> %ret2, float %i6, i32 1343 %ret2.2 = insertelement <4 x float> %ret2.1, float %i7, i32 2344 %ret2.3 = insertelement <4 x float> %ret2.2, float %arg10, i32 3345 346 %ret3 = insertelement <4 x float> poison, float %arg11, i32 0347 %ret3.1 = insertelement <4 x float> %ret3, float %arg12, i32 1348 %ret3.2 = insertelement <4 x float> %ret3.1, float %arg13, i32 2349 %ret3.3 = insertelement <4 x float> %ret3.2, float %arg14, i32 3350 351 %ret4 = insertelement <4 x float> poison, float %extra_arg1, i32 0352 %ret4.1 = insertelement <4 x float> %ret4, float %extra_arg2, i32 1353 354 %ret.res1 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } poison, <4 x float> %ret1.3, 0355 %ret.res2 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res1, <4 x float> %ret2.3, 1356 %ret.res3 = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res2, <4 x float> %ret3.3, 2357 %ret.res = insertvalue { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res3, <4 x float> %ret4.1, 3358 359 ret { < 4 x float>, <4 x float>, <4 x float>, <4 x float> } %ret.res360}361 362attributes #0 = { nounwind "target-features"=",+wavefrontsize64,+cumode" }363attributes #1 = { nounwind "InitialPSInputAddr"="2" "target-features"=",+wavefrontsize64,+cumode" }364attributes #2 = { nounwind "InitialPSInputAddr"="0xffff" "target-features"=",+wavefrontsize64,+cumode" }365attributes #3 = { nounwind "InitialPSInputAddr"="0" "target-features"=",+wavefrontsize64,+cumode" }366