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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=tahiti < %s | FileCheck --check-prefixes=GFX6 %s3 4; Test PTRADD handling in AMDGPUDAGToDAGISel::SelectMUBUF.5 6define amdgpu_kernel void @v_add_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {7; GFX6-LABEL: v_add_i32:8; GFX6: ; %bb.0:9; GFX6-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x010; GFX6-NEXT: s_mov_b32 s7, 0x100f00011; GFX6-NEXT: s_mov_b32 s10, 012; GFX6-NEXT: s_mov_b32 s11, s713; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v014; GFX6-NEXT: s_waitcnt lgkmcnt(0)15; GFX6-NEXT: s_mov_b64 s[8:9], s[2:3]16; GFX6-NEXT: v_mov_b32_e32 v1, 017; GFX6-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 glc18; GFX6-NEXT: s_waitcnt vmcnt(0)19; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[8:11], 0 addr64 offset:4 glc20; GFX6-NEXT: s_waitcnt vmcnt(0)21; GFX6-NEXT: s_mov_b32 s6, -122; GFX6-NEXT: s_mov_b32 s4, s023; GFX6-NEXT: s_mov_b32 s5, s124; GFX6-NEXT: v_add_i32_e32 v0, vcc, v2, v025; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 026; GFX6-NEXT: s_endpgm27 %tid = call i32 @llvm.amdgcn.workitem.id.x()28 %gep = getelementptr inbounds i32, ptr addrspace(1) %in, i32 %tid29 %b_ptr = getelementptr i32, ptr addrspace(1) %gep, i32 130 %a = load volatile i32, ptr addrspace(1) %gep31 %b = load volatile i32, ptr addrspace(1) %b_ptr32 %result = add i32 %a, %b33 store i32 %result, ptr addrspace(1) %out34 ret void35}36