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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=r600 -mcpu=cayman | FileCheck %s3 4define amdgpu_vs void @main(<4 x float> inreg %reg0, <4 x float> inreg %reg1, <4 x float> inreg %reg2, <4 x float> inreg %reg3) {5; CHECK-LABEL: main:6; CHECK: ; %bb.0: ; %main_body7; CHECK-NEXT: CALL_FS8; CHECK-NEXT: ALU 11, @4, KC0[CB0:0-32], KC1[]9; CHECK-NEXT: EXPORT T0.X___10; CHECK-NEXT: CF_END11; CHECK-NEXT: ALU clause starting at 4:12; CHECK-NEXT: DOT4 T0.X, KC0[0].X, KC0[0].X,13; CHECK-NEXT: DOT4 T0.Y (MASKED), KC0[0].Y, KC0[0].Y,14; CHECK-NEXT: DOT4 T0.Z (MASKED), KC0[0].Z, KC0[0].Z,15; CHECK-NEXT: DOT4 * T0.W (MASKED), KC0[0].W, KC0[0].W,16; CHECK-NEXT: MULADD_IEEE T2.X, T1.X, T2.X, T3.X,17; CHECK-NEXT: MULADD_IEEE T0.Y, T1.Y, T2.Y, T3.Y,18; CHECK-NEXT: MULADD_IEEE T0.Z, T1.Z, T2.Z, T3.Z,19; CHECK-NEXT: MULADD_IEEE * T0.W, PV.X, PV.X, T1.X, BS:VEC_120/SCL_21220; CHECK-NEXT: DOT4 T0.X, T2.X, KC0[1].X,21; CHECK-NEXT: DOT4 T0.Y (MASKED), T0.Y, KC0[1].Y,22; CHECK-NEXT: DOT4 T0.Z (MASKED), T0.Z, KC0[1].Z,23; CHECK-NEXT: DOT4 * T0.W (MASKED), T0.W, KC0[1].W,24main_body:25 %0 = extractelement <4 x float> %reg1, i32 026 %1 = extractelement <4 x float> %reg1, i32 127 %2 = extractelement <4 x float> %reg1, i32 228 %3 = extractelement <4 x float> %reg2, i32 029 %4 = extractelement <4 x float> %reg2, i32 130 %5 = extractelement <4 x float> %reg2, i32 231 %6 = extractelement <4 x float> %reg3, i32 032 %7 = extractelement <4 x float> %reg3, i32 133 %8 = extractelement <4 x float> %reg3, i32 234 %9 = load <4 x float>, ptr addrspace(8) null35 %10 = load <4 x float>, ptr addrspace(8) getelementptr ([1024 x <4 x float>], ptr addrspace(8) null, i64 0, i32 1)36 %11 = call float @llvm.r600.dot4(<4 x float> %9, <4 x float> %9)37 %12 = fmul float %0, %338 %13 = fadd float %12, %639 %14 = fmul float %1, %440 %15 = fadd float %14, %741 %16 = fmul float %2, %542 %17 = fadd float %16, %843 %18 = fmul float %11, %1144 %19 = fadd float %18, %045 %20 = insertelement <4 x float> poison, float %13, i32 046 %21 = insertelement <4 x float> %20, float %15, i32 147 %22 = insertelement <4 x float> %21, float %17, i32 248 %23 = insertelement <4 x float> %22, float %19, i32 349 %24 = call float @llvm.r600.dot4(<4 x float> %23, <4 x float> %10)50 %25 = insertelement <4 x float> poison, float %24, i32 051 call void @llvm.r600.store.swizzle(<4 x float> %25, i32 0, i32 2)52 ret void53}54 55; Function Attrs: readnone56declare float @llvm.r600.dot4(<4 x float>, <4 x float>) #157 58 59declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)60 61attributes #1 = { readnone }62