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1; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx700 < %s | FileCheck %s -check-prefixes=GCN,GFX7002; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck %s -check-prefixes=GCN,GFX9003; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck %s -check-prefixes=GCN,GFX9004; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck %s -check-prefixes=GCN,GFX11005; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck %s -check-prefixes=GCN,GFX11006 7declare i64 @llvm.readsteadycounter() #08 9; GCN-LABEL: {{^}}test_readsteadycounter:10; GFX700: s_mov_b32 s[[REG:[0-9]+]], 011; GFX900: s_memrealtime s[[[LO:[0-9]+]]:[[HI:[0-9]+]]]12; GFX900: s_memrealtime s[[[LO:[0-9]+]]:[[HI:[0-9]+]]]13; GFX1100: s_sendmsg_rtn_b64 s[[[LO:[0-9]+]]:[[HI:[0-9]+]]], sendmsg(MSG_RTN_GET_REALTIME)14; GFX1100: s_sendmsg_rtn_b64 s[[[LO:[0-9]+]]:[[HI:[0-9]+]]], sendmsg(MSG_RTN_GET_REALTIME)15define amdgpu_kernel void @test_readsteadycounter(ptr addrspace(1) %out) #0 {16 %cycle0 = call i64 @llvm.readsteadycounter()17 store volatile i64 %cycle0, ptr addrspace(1) %out18 19 %cycle1 = call i64 @llvm.readsteadycounter()20 store volatile i64 %cycle1, ptr addrspace(1) %out21 ret void22}23 24attributes #0 = { nounwind }25