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1; RUN: llc -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX9 %s2 3; Make sure reduceBuildVecExtToExtBuildVec combine doesn't regress4 5; code with legal v4i16. The v4i16 build_vector it produces will be6; custom lowered into an i32 based build_vector, producing a mess that7; nothing manages to put back together.8 9; GCN-LABEL: {{^}}v2i16_to_i64:10; GFX9: s_waitcnt11; GFX9-NEXT: v_pk_add_u16 v1, v0, v112; GFX9-NEXT: v_and_b32_e32 v0, 0xffff, v113; GFX9-NEXT: v_lshrrev_b32_e32 v1, 16, v114; GFX9-NEXT: s_setpc_b6415define i64 @v2i16_to_i64(<2 x i16> %x, <2 x i16> %y) {16 %x.add = add <2 x i16> %x, %y17 %zext = zext <2 x i16> %x.add to <2 x i32>18 %arst = bitcast <2 x i32> %zext to i6419 ret i64 %arst20}21