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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass=peephole-opt -o - %s | FileCheck %s3 4---5name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_1_06tracksRegLiveness: true7body: |8 bb.0:9 liveins: $vgpr0, $vgpr110 11 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_1_012 ; CHECK: liveins: $vgpr0, $vgpr113 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr015 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr116 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub117 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, [[REG_SEQUENCE]], 8, [[REG_SEQUENCE]], 0, 0, 0, 0, 0, implicit $exec18 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub119 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub020 ; CHECK-NEXT: $vgpr4 = COPY [[COPY2]]21 ; CHECK-NEXT: $vgpr5 = COPY [[COPY3]]22 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr523 %0:vgpr_32 = COPY $vgpr024 %1:vgpr_32 = COPY $vgpr125 %2:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub126 %3:vreg_64_align2 = V_PK_MOV_B32 12, %2, 8, %2, 0, 0, 0, 0, 0, implicit $exec27 %4:vgpr_32 = COPY %3.sub128 %5:vgpr_32 = COPY %3.sub029 $vgpr4 = COPY %430 $vgpr5 = COPY %531 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr532 33...34 35---36name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_037tracksRegLiveness: true38body: |39 bb.0:40 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr341 42 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_043 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr344 ; CHECK-NEXT: {{ $}}45 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr046 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr147 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr248 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr349 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub150 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub151 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, [[REG_SEQUENCE]], 8, [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, implicit $exec52 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub153 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub054 ; CHECK-NEXT: $vgpr4 = COPY [[COPY4]]55 ; CHECK-NEXT: $vgpr5 = COPY [[COPY5]]56 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr557 %0:vgpr_32 = COPY $vgpr058 %1:vgpr_32 = COPY $vgpr159 %2:vgpr_32 = COPY $vgpr260 %3:vgpr_32 = COPY $vgpr361 %4:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub162 %5:vreg_64_align2 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub163 %6:vreg_64_align2 = V_PK_MOV_B32 12, %4, 8, %5, 0, 0, 0, 0, 0, implicit $exec64 %7:vgpr_32 = COPY %6.sub165 %8:vgpr_32 = COPY %6.sub066 $vgpr4 = COPY %767 $vgpr5 = COPY %868 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr569 70...71 72---73name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_sgpr_1_074tracksRegLiveness: true75body: |76 bb.0:77 liveins: $sgpr8, $sgpr978 79 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_sgpr_1_080 ; CHECK: liveins: $sgpr8, $sgpr981 ; CHECK-NEXT: {{ $}}82 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr883 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr984 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub185 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, [[REG_SEQUENCE]], 8, [[REG_SEQUENCE]], 0, 0, 0, 0, 0, implicit $exec86 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub187 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub088 ; CHECK-NEXT: $vgpr4 = COPY [[COPY2]]89 ; CHECK-NEXT: $vgpr5 = COPY [[COPY3]]90 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr591 %0:sreg_32 = COPY $sgpr892 %1:sreg_32 = COPY $sgpr993 %2:sreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub194 %3:vreg_64_align2 = V_PK_MOV_B32 12, %2, 8, %2, 0, 0, 0, 0, 0, implicit $exec95 %4:vgpr_32 = COPY %3.sub196 %5:vgpr_32 = COPY %3.sub097 $vgpr4 = COPY %498 $vgpr5 = COPY %599 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5100 101...102 103---104name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_sgpr_3_0105tracksRegLiveness: true106body: |107 bb.0:108 liveins: $vgpr8, $vgpr9, $sgpr10, $sgpr11109 110 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_sgpr_3_0111 ; CHECK: liveins: $vgpr8, $vgpr9, $sgpr10, $sgpr11112 ; CHECK-NEXT: {{ $}}113 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr8114 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr9115 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $sgpr10116 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_64 = COPY $sgpr11117 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1118 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1119 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, [[REG_SEQUENCE]], 8, [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, implicit $exec120 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1121 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0122 ; CHECK-NEXT: $vgpr4 = COPY [[COPY4]]123 ; CHECK-NEXT: $vgpr5 = COPY [[COPY5]]124 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5125 %0:vgpr_32 = COPY $vgpr8126 %1:vgpr_32 = COPY $vgpr9127 %2:sreg_64 = COPY $sgpr10128 %3:sreg_64 = COPY $sgpr11129 %4:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1130 %5:sreg_64 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1131 %6:vreg_64_align2 = V_PK_MOV_B32 12, %4, 8, %5, 0, 0, 0, 0, 0, implicit $exec132 %7:vgpr_32 = COPY %6.sub1133 %8:vgpr_32 = COPY %6.sub0134 $vgpr4 = COPY %7135 $vgpr5 = COPY %8136 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5137 138...139 140---141name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_vgpr_3_0142tracksRegLiveness: true143body: |144 bb.0:145 liveins: $sgpr8, $sgpr9, $vgpr10, $vgpr11146 147 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_sgpr_vgpr_3_0148 ; CHECK: liveins: $sgpr8, $sgpr9, $vgpr10, $vgpr11149 ; CHECK-NEXT: {{ $}}150 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr8151 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr9152 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr10153 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr11154 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1155 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1156 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, [[REG_SEQUENCE]], 8, [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, implicit $exec157 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1158 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0159 ; CHECK-NEXT: $vgpr4 = COPY [[COPY4]]160 ; CHECK-NEXT: $vgpr5 = COPY [[COPY5]]161 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5162 %0:sreg_32 = COPY $sgpr8163 %1:sreg_32 = COPY $sgpr9164 %2:vgpr_32 = COPY $vgpr10165 %3:vgpr_32 = COPY $vgpr11166 %4:sreg_64 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1167 %5:vreg_64_align2 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1168 %6:vreg_64_align2 = V_PK_MOV_B32 12, %4, 8, %5, 0, 0, 0, 0, 0, implicit $exec169 %7:vgpr_32 = COPY %6.sub1170 %8:vgpr_32 = COPY %6.sub0171 $vgpr4 = COPY %7172 $vgpr5 = COPY %8173 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5174 175...176 177---178name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0_undef_lhs179tracksRegLiveness: true180body: |181 bb.0:182 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3183 184 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0_undef_lhs185 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3186 ; CHECK-NEXT: {{ $}}187 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0188 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1189 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2190 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3191 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1192 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1193 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, undef [[REG_SEQUENCE]], 8, [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, implicit $exec194 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1195 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0196 ; CHECK-NEXT: $vgpr4 = COPY [[COPY4]]197 ; CHECK-NEXT: $vgpr5 = COPY [[COPY5]]198 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5199 %0:vgpr_32 = COPY $vgpr0200 %1:vgpr_32 = COPY $vgpr1201 %2:vgpr_32 = COPY $vgpr2202 %3:vgpr_32 = COPY $vgpr3203 %4:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1204 %5:vreg_64_align2 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1205 %6:vreg_64_align2 = V_PK_MOV_B32 12, undef %4, 8, %5, 0, 0, 0, 0, 0, implicit $exec206 %7:vgpr_32 = COPY %6.sub1207 %8:vgpr_32 = COPY %6.sub0208 $vgpr4 = COPY %7209 $vgpr5 = COPY %8210 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5211 212...213 214---215name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0_undef_rhs216tracksRegLiveness: true217body: |218 bb.0:219 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3220 221 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0_undef_rhs222 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3223 ; CHECK-NEXT: {{ $}}224 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0225 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1226 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2227 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3228 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1229 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1230 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, [[REG_SEQUENCE]], 8, undef [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, implicit $exec231 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1232 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0233 ; CHECK-NEXT: $vgpr4 = COPY [[COPY4]]234 ; CHECK-NEXT: $vgpr5 = COPY [[COPY5]]235 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5236 %0:vgpr_32 = COPY $vgpr0237 %1:vgpr_32 = COPY $vgpr1238 %2:vgpr_32 = COPY $vgpr2239 %3:vgpr_32 = COPY $vgpr3240 %4:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1241 %5:vreg_64_align2 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1242 %6:vreg_64_align2 = V_PK_MOV_B32 12, %4, 8, undef %5, 0, 0, 0, 0, 0, implicit $exec243 %7:vgpr_32 = COPY %6.sub1244 %8:vgpr_32 = COPY %6.sub0245 $vgpr4 = COPY %7246 $vgpr5 = COPY %8247 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5248 249...250 251---252name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0_undef_undef253tracksRegLiveness: true254body: |255 bb.0:256 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3257 258 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0_undef_undef259 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3260 ; CHECK-NEXT: {{ $}}261 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0262 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1263 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2264 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3265 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1266 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64_align2 = REG_SEQUENCE [[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1267 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, undef [[REG_SEQUENCE]], 8, undef [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, implicit $exec268 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1269 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0270 ; CHECK-NEXT: $vgpr4 = COPY [[COPY4]]271 ; CHECK-NEXT: $vgpr5 = COPY [[COPY5]]272 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5273 %0:vgpr_32 = COPY $vgpr0274 %1:vgpr_32 = COPY $vgpr1275 %2:vgpr_32 = COPY $vgpr2276 %3:vgpr_32 = COPY $vgpr3277 %4:vreg_64_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1278 %5:vreg_64_align2 = REG_SEQUENCE %2, %subreg.sub0, %3, %subreg.sub1279 %6:vreg_64_align2 = V_PK_MOV_B32 12, undef %4, 8, undef %5, 0, 0, 0, 0, 0, implicit $exec280 %7:vgpr_32 = COPY %6.sub1281 %8:vgpr_32 = COPY %6.sub0282 $vgpr4 = COPY %7283 $vgpr5 = COPY %8284 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5285 286...287 288---289name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0_compose_src_subregs_0290tracksRegLiveness: true291body: |292 bb.0:293 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5294 295 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_3_0_compose_src_subregs_0296 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5297 ; CHECK-NEXT: {{ $}}298 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0299 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1300 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2301 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3302 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4303 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr5304 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_96_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2305 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_96_align2 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY4]], %subreg.sub1, [[COPY5]], %subreg.sub2306 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, [[REG_SEQUENCE]].sub0_sub1, 8, [[REG_SEQUENCE1]].sub0_sub1, 0, 0, 0, 0, 0, implicit $exec307 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1308 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0309 ; CHECK-NEXT: $vgpr4 = COPY [[COPY6]]310 ; CHECK-NEXT: $vgpr5 = COPY [[COPY7]]311 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5312 %0:vgpr_32 = COPY $vgpr0313 %1:vgpr_32 = COPY $vgpr1314 %2:vgpr_32 = COPY $vgpr2315 %3:vgpr_32 = COPY $vgpr3316 %4:vgpr_32 = COPY $vgpr4317 %5:vgpr_32 = COPY $vgpr5318 %6:vreg_96_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2319 %7:vreg_96_align2 = REG_SEQUENCE %3, %subreg.sub0, %4, %subreg.sub1, %5, %subreg.sub2320 %8:vreg_64_align2 = V_PK_MOV_B32 12, %6.sub0_sub1, 8, %7.sub0_sub1, 0, 0, 0, 0, 0, implicit $exec321 %9:vgpr_32 = COPY %8.sub1322 %10:vgpr_32 = COPY %8.sub0323 $vgpr4 = COPY %9324 $vgpr5 = COPY %10325 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5326 327...328 329---330name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_0_3_compose_src_subregs_0331tracksRegLiveness: true332body: |333 bb.0:334 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5335 336 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_0_3_compose_src_subregs_0337 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5338 ; CHECK-NEXT: {{ $}}339 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0340 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1341 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2342 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3343 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4344 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr5345 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_96_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2346 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_96_align2 = REG_SEQUENCE [[COPY3]], %subreg.sub0, [[COPY4]], %subreg.sub1, [[COPY5]], %subreg.sub2347 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 8, [[REG_SEQUENCE]].sub0_sub1, 12, [[REG_SEQUENCE1]].sub0_sub1, 0, 0, 0, 0, 0, implicit $exec348 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1349 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0350 ; CHECK-NEXT: $vgpr4 = COPY [[COPY6]]351 ; CHECK-NEXT: $vgpr5 = COPY [[COPY7]]352 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5353 %0:vgpr_32 = COPY $vgpr0354 %1:vgpr_32 = COPY $vgpr1355 %2:vgpr_32 = COPY $vgpr2356 %3:vgpr_32 = COPY $vgpr3357 %4:vgpr_32 = COPY $vgpr4358 %5:vgpr_32 = COPY $vgpr5359 %6:vreg_96_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2360 %7:vreg_96_align2 = REG_SEQUENCE %3, %subreg.sub0, %4, %subreg.sub1, %5, %subreg.sub2361 %8:vreg_64_align2 = V_PK_MOV_B32 8, %6.sub0_sub1, 12, %7.sub0_sub1, 0, 0, 0, 0, 0, implicit $exec362 %9:vgpr_32 = COPY %8.sub1363 %10:vgpr_32 = COPY %8.sub0364 $vgpr4 = COPY %9365 $vgpr5 = COPY %10366 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5367 368...369 370---371name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_compose_src_subregs_1372tracksRegLiveness: true373body: |374 bb.0:375 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7376 377 ; CHECK-LABEL: name: v_pk_mov_b32__reg_sequence_shuffle_vgpr_vgpr_compose_src_subregs_1378 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7379 ; CHECK-NEXT: {{ $}}380 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0381 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1382 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2383 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3384 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4385 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY $vgpr5386 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY $vgpr6387 ; CHECK-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY $vgpr7388 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3389 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_128_align2 = REG_SEQUENCE [[COPY4]], %subreg.sub0, [[COPY5]], %subreg.sub1, [[COPY6]], %subreg.sub2, [[COPY7]], %subreg.sub3390 ; CHECK-NEXT: [[V_PK_MOV_B32_:%[0-9]+]]:vreg_64_align2 = V_PK_MOV_B32 12, [[REG_SEQUENCE]].sub2_sub3, 12, [[REG_SEQUENCE1]].sub0_sub1, 0, 0, 0, 0, 0, implicit $exec391 ; CHECK-NEXT: [[COPY8:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub1392 ; CHECK-NEXT: [[COPY9:%[0-9]+]]:vgpr_32 = COPY [[V_PK_MOV_B32_]].sub0393 ; CHECK-NEXT: $vgpr4 = COPY [[COPY8]]394 ; CHECK-NEXT: $vgpr5 = COPY [[COPY9]]395 ; CHECK-NEXT: S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5396 %0:vgpr_32 = COPY $vgpr0397 %1:vgpr_32 = COPY $vgpr1398 %2:vgpr_32 = COPY $vgpr2399 %3:vgpr_32 = COPY $vgpr3400 %4:vgpr_32 = COPY $vgpr4401 %5:vgpr_32 = COPY $vgpr5402 %6:vgpr_32 = COPY $vgpr6403 %7:vgpr_32 = COPY $vgpr7404 %8:vreg_128_align2 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3405 %9:vreg_128_align2 = REG_SEQUENCE %4, %subreg.sub0, %5, %subreg.sub1, %6, %subreg.sub2, %7, %subreg.sub3406 %10:vreg_64_align2 = V_PK_MOV_B32 12, %8.sub2_sub3, 12, %9.sub0_sub1, 0, 0, 0, 0, 0, implicit $exec407 %11:vgpr_32 = COPY %10.sub1408 %12:vgpr_32 = COPY %10.sub0409 $vgpr4 = COPY %11410 $vgpr5 = COPY %12411 S_ENDPGM 0, implicit $vgpr4, implicit $vgpr5412 413...414