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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 62# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=register-coalescer -o - %s | FileCheck %s3 4# These SRC_*_HI registers do not exist, make sure coalescer does not use it.5 6---7name: src_private_base8tracksRegLiveness: true9body: |10 bb.0:11 ; CHECK-LABEL: name: src_private_base12 ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $src_private_base13 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF14 ; CHECK-NEXT: $scc = IMPLICIT_DEF15 ; CHECK-NEXT: dead [[S_SUBB_U32_:%[0-9]+]]:sreg_32 = S_SUBB_U32 [[COPY]].sub1, [[DEF]].sub1, implicit-def dead $scc, implicit killed $scc16 %0:sreg_64 = COPY $src_private_base17 %1:sreg_64 = IMPLICIT_DEF18 $scc = IMPLICIT_DEF19 %2:sreg_32 = S_SUBB_U32 killed %0.sub1:sreg_64, %1.sub1:sreg_64, implicit-def dead $scc, implicit killed $scc20...21 22---23name: src_private_limit24tracksRegLiveness: true25body: |26 bb.0:27 ; CHECK-LABEL: name: src_private_limit28 ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $src_private_limit29 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF30 ; CHECK-NEXT: $scc = IMPLICIT_DEF31 ; CHECK-NEXT: dead [[S_SUBB_U32_:%[0-9]+]]:sreg_32 = S_SUBB_U32 [[COPY]].sub1, [[DEF]].sub1, implicit-def dead $scc, implicit killed $scc32 %0:sreg_64 = COPY $src_private_limit33 %1:sreg_64 = IMPLICIT_DEF34 $scc = IMPLICIT_DEF35 %2:sreg_32 = S_SUBB_U32 killed %0.sub1:sreg_64, %1.sub1:sreg_64, implicit-def dead $scc, implicit killed $scc36...37 38---39name: src_shared_base40tracksRegLiveness: true41body: |42 bb.0:43 ; CHECK-LABEL: name: src_shared_base44 ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $src_shared_base45 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF46 ; CHECK-NEXT: $scc = IMPLICIT_DEF47 ; CHECK-NEXT: dead [[S_SUBB_U32_:%[0-9]+]]:sreg_32 = S_SUBB_U32 [[COPY]].sub1, [[DEF]].sub1, implicit-def dead $scc, implicit killed $scc48 %0:sreg_64 = COPY $src_shared_base49 %1:sreg_64 = IMPLICIT_DEF50 $scc = IMPLICIT_DEF51 %2:sreg_32 = S_SUBB_U32 killed %0.sub1:sreg_64, %1.sub1:sreg_64, implicit-def dead $scc, implicit killed $scc52...53 54---55name: src_shared_limit56tracksRegLiveness: true57body: |58 bb.0:59 ; CHECK-LABEL: name: src_shared_limit60 ; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $src_shared_limit61 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF62 ; CHECK-NEXT: $scc = IMPLICIT_DEF63 ; CHECK-NEXT: dead [[S_SUBB_U32_:%[0-9]+]]:sreg_32 = S_SUBB_U32 [[COPY]].sub1, [[DEF]].sub1, implicit-def dead $scc, implicit killed $scc64 %0:sreg_64 = COPY $src_shared_limit65 %1:sreg_64 = IMPLICIT_DEF66 $scc = IMPLICIT_DEF67 %2:sreg_32 = S_SUBB_U32 killed %0.sub1:sreg_64, %1.sub1:sreg_64, implicit-def dead $scc, implicit killed $scc68...69