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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --filetype=null -verify-machineinstrs --run-pass=amdgpu-print-rp %s -filetype=null 2>&1 | FileCheck %s --check-prefix=RP --check-prefix=RPU3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --filetype=null -verify-machineinstrs --run-pass=amdgpu-print-rp -amdgpu-print-rp-downward %s -filetype=null 2>&1 | FileCheck %s --check-prefix=RP --check-prefix=RPD4 5 6---7name: trivial8tracksRegLiveness: true9body: |10 ; RP-LABEL: name: trivial11 ; RP: bb.0:12 ; RP-NEXT: Live-in:13 ; RP-NEXT: SGPR VGPR14 ; RP-NEXT: 0 015 ; RP-NEXT: 0 1 %0:vgpr_32 = V_MOV_B32_e32 42, implicit $exec16 ; RP-NEXT: 0 117 ; RP-NEXT: 2 1 %1:sgpr_64 = IMPLICIT_DEF18 ; RP-NEXT: 2 119 ; RP-NEXT: Live-out: %0:0000000000000003 %1:000000000000000F20 ; RP-NEXT: Live-thr:21 ; RP-NEXT: 0 022 ; RP-NEXT: bb.1:23 ; RP-NEXT: Live-in: %0:0000000000000003 %1:000000000000000F24 ; RP-NEXT: SGPR VGPR25 ; RP-NEXT: 2 126 ; RP-NEXT: Live-out: %0:0000000000000003 %1:000000000000000F27 ; RP-NEXT: Live-thr: %0:0000000000000003 %1:000000000000000F28 ; RP-NEXT: 2 129 ; RP-NEXT: bb.2:30 ; RP-NEXT: Live-in: %0:0000000000000003 %1:000000000000000F31 ; RP-NEXT: SGPR VGPR32 ; RP-NEXT: 2 133 ; RP-NEXT: 2 1 S_NOP 0, implicit %0:vgpr_32, implicit %1:sgpr_6434 ; RP-NEXT: 0 035 ; RP-NEXT: Live-out:36 ; RP-NEXT: Live-thr:37 ; RP-NEXT: 0 038 bb.0:39 %0:vgpr_32 = V_MOV_B32_e32 42, implicit $exec40 %1:sgpr_64 = IMPLICIT_DEF41 bb.1:42 43 bb.2:44 S_NOP 0, implicit %0, implicit %145...46---47name: live_through_test48tracksRegLiveness: true49body: |50 ; RP-LABEL: name: live_through_test51 ; RP: bb.0:52 ; RP-NEXT: Live-in:53 ; RP-NEXT: SGPR VGPR54 ; RP-NEXT: 0 055 ; RP-NEXT: 4 0 %0:sgpr_128 = IMPLICIT_DEF56 ; RP-NEXT: 3 057 ; RP-NEXT: Live-out: %0:00000000000000F358 ; RP-NEXT: Live-thr:59 ; RP-NEXT: 0 060 ; RP-NEXT: bb.1:61 ; RP-NEXT: Live-in: %0:00000000000000F362 ; RP-NEXT: SGPR VGPR63 ; RP-NEXT: 3 064 ; RP-NEXT: 3 0 S_NOP 0, implicit %0.sub0:sgpr_12865 ; RP-NEXT: 2 066 ; RP-NEXT: 3 0 %0.sub0:sgpr_128 = IMPLICIT_DEF67 ; RP-NEXT: 3 068 ; RP-NEXT: 4 0 %0.sub1:sgpr_128 = IMPLICIT_DEF69 ; RP-NEXT: 3 070 ; RP-NEXT: 3 0 S_NOP 0, implicit %0.sub2:sgpr_12871 ; RP-NEXT: 2 072 ; RP-NEXT: 3 0 %0.sub2:sgpr_128 = IMPLICIT_DEF73 ; RP-NEXT: 3 074 ; RP-NEXT: 3 0 S_NOP 0, implicit %0.sub2:sgpr_12875 ; RP-NEXT: 2 076 ; RP-NEXT: 2 0 S_NOP 0, implicit %0.sub3:sgpr_12877 ; RP-NEXT: 2 078 ; RP-NEXT: Live-out: %0:00000000000000C379 ; RP-NEXT: Live-thr: %0:00000000000000C080 ; RP-NEXT: 1 081 ; RP-NEXT: bb.2:82 ; RP-NEXT: Live-in: %0:00000000000000C383 ; RP-NEXT: SGPR VGPR84 ; RP-NEXT: 2 085 ; RP-NEXT: 2 0 S_NOP 0, implicit %0.sub3:sgpr_128, implicit %0.sub0:sgpr_12886 ; RP-NEXT: 0 087 ; RP-NEXT: Live-out:88 ; RP-NEXT: Live-thr:89 ; RP-NEXT: 0 090 bb.0:91 %0:sgpr_128 = IMPLICIT_DEF92 bb.1:93 94 S_NOP 0, implicit %0.sub0 ; kill sub095 %0.sub0 = IMPLICIT_DEF ; redef sub096 97 %0.sub1:sgpr_128 = IMPLICIT_DEF ; redef sub198 99 S_NOP 0, implicit %0.sub2 ; kill sub2100 %0.sub2:sgpr_128 = IMPLICIT_DEF ; redef sub2101 S_NOP 0, implicit %0.sub2 ; kill sub2102 103 S_NOP 0, implicit %0.sub3 ; use sub3, live-through104 105 bb.2:106 S_NOP 0, implicit %0.sub3, implicit %0.sub0107...108 109# This testcase shows the problem with LiveIntervals: it doesn't create110# subranges for undefined but used subregisters. Upward tracker is able to see111# the use of undefined subregister and tracks it correctly.112---113name: upward_problem_lis_subregs_mismatch114tracksRegLiveness: true115body: |116 ; RP-LABEL: name: upward_problem_lis_subregs_mismatch117 ; RP: bb.0:118 ; RP-NEXT: Live-in:119 ; RP-NEXT: SGPR VGPR120 ; RP-NEXT: 0 0121 ; RP-NEXT: 0 1 undef %0.sub0:vreg_64 = V_MOV_B32_e32 42, implicit $exec122 ; RP-NEXT: 0 1123 ; RP-NEXT: 0 2 undef %1.sub1:vreg_64 = V_MOV_B32_e32 33, implicit $exec124 ; RP-NEXT: 0 2125 ; RP-NEXT: Live-out: %0:0000000000000003 %1:000000000000000C126 ; RP-NEXT: Live-thr:127 ; RP-NEXT: 0 0128 ; RP-NEXT: bb.1:129 ; RP-NEXT: Live-in: %0:0000000000000003 %1:000000000000000C130 ; RP-NEXT: SGPR VGPR131 ; RP-NEXT: 0 2132 ; RP-NEXT: Live-out: %0:0000000000000003 %1:000000000000000C133 ; RP-NEXT: Live-thr: %0:0000000000000003 %1:000000000000000C134 ; RP-NEXT: 0 2135 ; RP-NEXT: bb.2:136 ; RP-NEXT: Live-in: %0:0000000000000003 %1:000000000000000C137 ; RP-NEXT: SGPR VGPR138 ; RP-NEXT: 0 2139 ; RP-NEXT: 0 2 S_NOP 0, implicit %0:vreg_64, implicit %1:vreg_64140 ; RP-NEXT: 0 0141 ; RP-NEXT: Live-out:142 ; RP-NEXT: Live-thr:143 ; RP-NEXT: 0 0144 bb.0:145 undef %0.sub0:vreg_64 = V_MOV_B32_e32 42, implicit $exec146 undef %1.sub1:vreg_64 = V_MOV_B32_e32 33, implicit $exec147 148 bb.1:149 150 bb.2:151 S_NOP 0, implicit %0, implicit %1152...153---154name: only_dbg_value_sched_region155tracksRegLiveness: true156machineFunctionInfo:157 isEntryFunction: true158 waveLimiter: true159body: |160 ; RPU-LABEL: name: only_dbg_value_sched_region161 ; RPU: bb.0:162 ; RPU-NEXT: Live-in:163 ; RPU-NEXT: SGPR VGPR164 ; RPU-NEXT: 0 0165 ; RPU-NEXT: 0 1 %0:vgpr_32 = COPY $vgpr0166 ; RPU-NEXT: 0 1167 ; RPU-NEXT: 0 3 %1:vreg_64 = IMPLICIT_DEF168 ; RPU-NEXT: 0 3169 ; RPU-NEXT: 0 5 %2:vreg_64 = GLOBAL_LOAD_DWORDX2 %1:vreg_64, 0, 0, implicit $exec170 ; RPU-NEXT: 0 5171 ; RPU-NEXT: 0 6 %3:vgpr_32 = GLOBAL_LOAD_DWORD %1:vreg_64, 8, 0, implicit $exec172 ; RPU-NEXT: 0 6173 ; RPU-NEXT: 0 7 undef %4.sub1:vreg_64 = V_ADD_U32_e32 %0:vgpr_32, %0:vgpr_32, implicit $exec174 ; RPU-NEXT: 0 7175 ; RPU-NEXT: 0 8 %4.sub0:vreg_64 = V_MOV_B32_e32 111, implicit $exec176 ; RPU-NEXT: 0 8177 ; RPU-NEXT: 0 9 %5:vreg_64 = COPY %2:vreg_64178 ; RPU-NEXT: 0 9179 ; RPU-NEXT: 0 9 undef %6.sub0:vreg_64 = V_ADD_F32_e32 %1.sub0:vreg_64, %5.sub0:vreg_64, implicit $mode, implicit $exec180 ; RPU-NEXT: 0 8181 ; RPU-NEXT: 0 8 dead %6.sub1:vreg_64 = V_ADD_F32_e32 %1.sub1:vreg_64, %5.sub0:vreg_64, implicit $mode, implicit $exec182 ; RPU-NEXT: 0 7183 ; RPU-NEXT: 0 7 %7:vgpr_32 = GLOBAL_LOAD_DWORD %5:vreg_64, 0, 0, implicit $exec184 ; RPU-NEXT: 0 6185 ; RPU-NEXT: 0 8 %8:vreg_64 = IMPLICIT_DEF186 ; RPU-NEXT: 0 7187 ; RPU-NEXT: 0 9 %9:vreg_64 = IMPLICIT_DEF188 ; RPU-NEXT: 0 9189 ; RPU-NEXT: 0 11 %10:vreg_64 = IMPLICIT_DEF190 ; RPU-NEXT: 0 11191 ; RPU-NEXT: 0 12 undef %11.sub1:vreg_64 = IMPLICIT_DEF192 ; RPU-NEXT: 0 12193 ; RPU-NEXT: 0 13 %12:vgpr_32 = IMPLICIT_DEF194 ; RPU-NEXT: 0 13195 ; RPU-NEXT: 0 14 %13:vgpr_32 = IMPLICIT_DEF196 ; RPU-NEXT: 0 14197 ; RPU-NEXT: 0 16 %14:vreg_64 = IMPLICIT_DEF198 ; RPU-NEXT: 0 16199 ; RPU-NEXT: 0 18 %15:vreg_64 = IMPLICIT_DEF200 ; RPU-NEXT: 0 18201 ; RPU-NEXT: 0 19 %16:vgpr_32 = IMPLICIT_DEF202 ; RPU-NEXT: 0 19203 ; RPU-NEXT: 0 20 %17:vgpr_32 = V_MOV_B32_e32 0, implicit $exec204 ; RPU-NEXT: 0 20205 ; RPU-NEXT: 0 21 %18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec206 ; RPU-NEXT: 0 21207 ; RPU-NEXT: 0 21 undef %19.sub0:vreg_64 = V_ADD_F32_e32 %7:vgpr_32, %2.sub0:vreg_64, implicit $mode, implicit $exec208 ; RPU-NEXT: 0 20209 ; RPU-NEXT: 0 20 %19.sub1:vreg_64 = V_ADD_F32_e32 %3:vgpr_32, %3:vgpr_32, implicit $mode, implicit $exec210 ; RPU-NEXT: DBG_VALUE211 ; RPU-NEXT: 0 20212 ; RPU-NEXT: 0 20 GLOBAL_STORE_DWORDX2 %19:vreg_64, %4:vreg_64, 32, 0, implicit $exec213 ; RPU-NEXT: 0 16214 ; RPU-NEXT: 0 16 %11.sub0:vreg_64 = GLOBAL_LOAD_DWORD %9:vreg_64, 0, 0, implicit $exec215 ; RPU-NEXT: 0 15216 ; RPU-NEXT: 0 15 %8.sub0:vreg_64 = GLOBAL_LOAD_DWORD %10:vreg_64, 0, 0, implicit $exec217 ; RPU-NEXT: 0 14218 ; RPU-NEXT: 0 14 dead %20:vgpr_32 = GLOBAL_LOAD_DWORD %11:vreg_64, 0, 0, implicit $exec219 ; RPU-NEXT: DBG_VALUE220 ; RPU-NEXT: DBG_VALUE221 ; RPU-NEXT: 0 12222 ; RPU-NEXT: 0 12 dead %21:vgpr_32 = GLOBAL_LOAD_DWORD %14:vreg_64, 0, 0, implicit $exec223 ; RPU-NEXT: 0 10224 ; RPU-NEXT: 0 11 dead %22:vgpr_32 = GLOBAL_LOAD_DWORD %15:vreg_64, 0, 0, implicit $exec225 ; RPU-NEXT: 0 10226 ; RPU-NEXT: 0 10 %23:vreg_64 = V_LSHLREV_B64_e64 2, %8:vreg_64, implicit $exec227 ; RPU-NEXT: 0 9228 ; RPU-NEXT: 0 9 S_NOP 0, implicit %13:vgpr_32, implicit %23.sub0:vreg_64, implicit %12:vgpr_32, implicit %17:vgpr_32229 ; RPU-NEXT: 0 5230 ; RPU-NEXT: 0 5 GLOBAL_STORE_DWORD %15:vreg_64, %18:vgpr_32, 0, 0, implicit $exec231 ; RPU-NEXT: 0 2232 ; RPU-NEXT: Live-out: %0:0000000000000003 %16:0000000000000003233 ; RPU-NEXT: Live-thr:234 ; RPU-NEXT: 0 0235 ; RPU-NEXT: bb.1:236 ; RPU-NEXT: Live-in: %0:0000000000000003 %16:0000000000000003237 ; RPU-NEXT: SGPR VGPR238 ; RPU-NEXT: DBG_VALUE239 ; RPU-NEXT: 0 2240 ; RPU-NEXT: 0 2 S_SETREG_IMM32_B32 0, 1, implicit-def $mode, implicit $mode241 ; RPU-NEXT: DBG_VALUE242 ; RPU-NEXT: DBG_VALUE243 ; RPU-NEXT: 0 2244 ; RPU-NEXT: 0 2 S_SETREG_IMM32_B32 0, 1, implicit-def $mode, implicit $mode245 ; RPU-NEXT: DBG_VALUE246 ; RPU-NEXT: 0 2247 ; RPU-NEXT: Live-out: %0:0000000000000003 %16:0000000000000003248 ; RPU-NEXT: Live-thr: %0:0000000000000003 %16:0000000000000003249 ; RPU-NEXT: 0 2250 ; RPU-NEXT: bb.2:251 ; RPU-NEXT: Live-in: %0:0000000000000003 %16:0000000000000003252 ; RPU-NEXT: SGPR VGPR253 ; RPU-NEXT: 0 2254 ; RPU-NEXT: Live-out: %0:0000000000000003 %16:0000000000000003255 ; RPU-NEXT: Live-thr: %0:0000000000000003 %16:0000000000000003256 ; RPU-NEXT: 0 2257 ; RPU-NEXT: bb.3:258 ; RPU-NEXT: Live-in: %0:0000000000000003 %16:0000000000000003259 ; RPU-NEXT: SGPR VGPR260 ; RPU-NEXT: 0 2261 ; RPU-NEXT: 0 2 S_NOP 0, implicit %0:vgpr_32262 ; RPU-NEXT: 0 1263 ; RPU-NEXT: 0 1 S_NOP 0, implicit %16:vgpr_32264 ; RPU-NEXT: 0 0265 ; RPU-NEXT: 0 0 S_ENDPGM 0266 ; RPU-NEXT: 0 0267 ; RPU-NEXT: Live-out:268 ; RPU-NEXT: Live-thr:269 ; RPU-NEXT: 0 0270 ;271 ; RPD-LABEL: name: only_dbg_value_sched_region272 ; RPD: bb.0:273 ; RPD-NEXT: Live-in:274 ; RPD-NEXT: SGPR VGPR275 ; RPD-NEXT: 0 0276 ; RPD-NEXT: 0 1 %0:vgpr_32 = COPY $vgpr0277 ; RPD-NEXT: 0 1278 ; RPD-NEXT: 0 3 %1:vreg_64 = IMPLICIT_DEF279 ; RPD-NEXT: 0 3280 ; RPD-NEXT: 0 5 %2:vreg_64 = GLOBAL_LOAD_DWORDX2 %1:vreg_64, 0, 0, implicit $exec281 ; RPD-NEXT: 0 5282 ; RPD-NEXT: 0 6 %3:vgpr_32 = GLOBAL_LOAD_DWORD %1:vreg_64, 8, 0, implicit $exec283 ; RPD-NEXT: 0 6284 ; RPD-NEXT: 0 7 undef %4.sub1:vreg_64 = V_ADD_U32_e32 %0:vgpr_32, %0:vgpr_32, implicit $exec285 ; RPD-NEXT: 0 7286 ; RPD-NEXT: 0 8 %4.sub0:vreg_64 = V_MOV_B32_e32 111, implicit $exec287 ; RPD-NEXT: 0 8288 ; RPD-NEXT: 0 10 %5:vreg_64 = COPY %2:vreg_64289 ; RPD-NEXT: 0 9290 ; RPD-NEXT: 0 10 undef %6.sub0:vreg_64 = V_ADD_F32_e32 %1.sub0:vreg_64, %5.sub0:vreg_64, implicit $mode, implicit $exec291 ; RPD-NEXT: 0 8292 ; RPD-NEXT: 0 9 dead %6.sub1:vreg_64 = V_ADD_F32_e32 %1.sub1:vreg_64, %5.sub0:vreg_64, implicit $mode, implicit $exec293 ; RPD-NEXT: 0 7294 ; RPD-NEXT: 0 8 %7:vgpr_32 = GLOBAL_LOAD_DWORD %5:vreg_64, 0, 0, implicit $exec295 ; RPD-NEXT: 0 6296 ; RPD-NEXT: 0 8 %8:vreg_64 = IMPLICIT_DEF297 ; RPD-NEXT: 0 7298 ; RPD-NEXT: 0 9 %9:vreg_64 = IMPLICIT_DEF299 ; RPD-NEXT: 0 9300 ; RPD-NEXT: 0 11 %10:vreg_64 = IMPLICIT_DEF301 ; RPD-NEXT: 0 11302 ; RPD-NEXT: 0 12 undef %11.sub1:vreg_64 = IMPLICIT_DEF303 ; RPD-NEXT: 0 12304 ; RPD-NEXT: 0 13 %12:vgpr_32 = IMPLICIT_DEF305 ; RPD-NEXT: 0 13306 ; RPD-NEXT: 0 14 %13:vgpr_32 = IMPLICIT_DEF307 ; RPD-NEXT: 0 14308 ; RPD-NEXT: 0 16 %14:vreg_64 = IMPLICIT_DEF309 ; RPD-NEXT: 0 16310 ; RPD-NEXT: 0 18 %15:vreg_64 = IMPLICIT_DEF311 ; RPD-NEXT: 0 18312 ; RPD-NEXT: 0 19 %16:vgpr_32 = IMPLICIT_DEF313 ; RPD-NEXT: 0 19314 ; RPD-NEXT: 0 20 %17:vgpr_32 = V_MOV_B32_e32 0, implicit $exec315 ; RPD-NEXT: 0 20316 ; RPD-NEXT: 0 21 %18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec317 ; RPD-NEXT: 0 21318 ; RPD-NEXT: 0 22 undef %19.sub0:vreg_64 = V_ADD_F32_e32 %7:vgpr_32, %2.sub0:vreg_64, implicit $mode, implicit $exec319 ; RPD-NEXT: 0 20320 ; RPD-NEXT: 0 21 %19.sub1:vreg_64 = V_ADD_F32_e32 %3:vgpr_32, %3:vgpr_32, implicit $mode, implicit $exec321 ; RPD-NEXT: DBG_VALUE322 ; RPD-NEXT: 0 20323 ; RPD-NEXT: 0 20 GLOBAL_STORE_DWORDX2 %19:vreg_64, %4:vreg_64, 32, 0, implicit $exec324 ; RPD-NEXT: 0 16325 ; RPD-NEXT: 0 17 %11.sub0:vreg_64 = GLOBAL_LOAD_DWORD %9:vreg_64, 0, 0, implicit $exec326 ; RPD-NEXT: 0 15327 ; RPD-NEXT: 0 16 %8.sub0:vreg_64 = GLOBAL_LOAD_DWORD %10:vreg_64, 0, 0, implicit $exec328 ; RPD-NEXT: 0 14329 ; RPD-NEXT: 0 15 dead %20:vgpr_32 = GLOBAL_LOAD_DWORD %11:vreg_64, 0, 0, implicit $exec330 ; RPD-NEXT: DBG_VALUE331 ; RPD-NEXT: DBG_VALUE332 ; RPD-NEXT: 0 12333 ; RPD-NEXT: 0 13 dead %21:vgpr_32 = GLOBAL_LOAD_DWORD %14:vreg_64, 0, 0, implicit $exec334 ; RPD-NEXT: 0 10335 ; RPD-NEXT: 0 11 dead %22:vgpr_32 = GLOBAL_LOAD_DWORD %15:vreg_64, 0, 0, implicit $exec336 ; RPD-NEXT: 0 10337 ; RPD-NEXT: 0 12 %23:vreg_64 = V_LSHLREV_B64_e64 2, %8:vreg_64, implicit $exec338 ; RPD-NEXT: 0 9339 ; RPD-NEXT: 0 9 S_NOP 0, implicit %13:vgpr_32, implicit %23.sub0:vreg_64, implicit %12:vgpr_32, implicit %17:vgpr_32340 ; RPD-NEXT: 0 5341 ; RPD-NEXT: 0 5 GLOBAL_STORE_DWORD %15:vreg_64, %18:vgpr_32, 0, 0, implicit $exec342 ; RPD-NEXT: 0 2343 ; RPD-NEXT: Live-out: %0:0000000000000003 %16:0000000000000003344 ; RPD-NEXT: Live-thr:345 ; RPD-NEXT: 0 0346 ; RPD-NEXT: bb.1:347 ; RPD-NEXT: Live-in: %0:0000000000000003 %16:0000000000000003348 ; RPD-NEXT: SGPR VGPR349 ; RPD-NEXT: DBG_VALUE350 ; RPD-NEXT: 0 2351 ; RPD-NEXT: 0 2 S_SETREG_IMM32_B32 0, 1, implicit-def $mode, implicit $mode352 ; RPD-NEXT: DBG_VALUE353 ; RPD-NEXT: DBG_VALUE354 ; RPD-NEXT: 0 2355 ; RPD-NEXT: 0 2 S_SETREG_IMM32_B32 0, 1, implicit-def $mode, implicit $mode356 ; RPD-NEXT: DBG_VALUE357 ; RPD-NEXT: 0 2358 ; RPD-NEXT: Live-out: %0:0000000000000003 %16:0000000000000003359 ; RPD-NEXT: Live-thr: %0:0000000000000003 %16:0000000000000003360 ; RPD-NEXT: 0 2361 ; RPD-NEXT: bb.2:362 ; RPD-NEXT: Live-in: %0:0000000000000003 %16:0000000000000003363 ; RPD-NEXT: SGPR VGPR364 ; RPD-NEXT: 0 2365 ; RPD-NEXT: Live-out: %0:0000000000000003 %16:0000000000000003366 ; RPD-NEXT: Live-thr: %0:0000000000000003 %16:0000000000000003367 ; RPD-NEXT: 0 2368 ; RPD-NEXT: bb.3:369 ; RPD-NEXT: Live-in: %0:0000000000000003 %16:0000000000000003370 ; RPD-NEXT: SGPR VGPR371 ; RPD-NEXT: 0 2372 ; RPD-NEXT: 0 2 S_NOP 0, implicit %0:vgpr_32373 ; RPD-NEXT: 0 1374 ; RPD-NEXT: 0 1 S_NOP 0, implicit %16:vgpr_32375 ; RPD-NEXT: 0 0376 ; RPD-NEXT: 0 0 S_ENDPGM 0377 ; RPD-NEXT: 0 0378 ; RPD-NEXT: Live-out:379 ; RPD-NEXT: Live-thr:380 ; RPD-NEXT: 0 0381 bb.0:382 liveins: $vgpr0383 384 %0:vgpr_32 = COPY $vgpr0385 %1:vreg_64 = IMPLICIT_DEF386 %2:vreg_64 = GLOBAL_LOAD_DWORDX2 %1, 0, 0, implicit $exec387 %3:vgpr_32 = GLOBAL_LOAD_DWORD %1, 8, 0, implicit $exec388 undef %4.sub1:vreg_64 = V_ADD_U32_e32 %0, %0, implicit $exec389 %4.sub0:vreg_64 = V_MOV_B32_e32 111, implicit $exec390 %5:vreg_64 = COPY %2391 undef %6.sub0:vreg_64 = V_ADD_F32_e32 %1.sub0, %5.sub0, implicit $mode, implicit $exec392 %6.sub1:vreg_64 = V_ADD_F32_e32 %1.sub1, %5.sub0, implicit $mode, implicit $exec393 %7:vgpr_32 = GLOBAL_LOAD_DWORD %5, 0, 0, implicit $exec394 %8:vreg_64 = IMPLICIT_DEF395 %9:vreg_64 = IMPLICIT_DEF396 %10:vreg_64 = IMPLICIT_DEF397 undef %11.sub1:vreg_64 = IMPLICIT_DEF398 %12:vgpr_32 = IMPLICIT_DEF399 %13:vgpr_32 = IMPLICIT_DEF400 %14:vreg_64 = IMPLICIT_DEF401 %15:vreg_64 = IMPLICIT_DEF402 %16:vgpr_32 = IMPLICIT_DEF403 %17:vgpr_32 = V_MOV_B32_e32 0, implicit $exec404 %18:vgpr_32 = V_MOV_B32_e32 0, implicit $exec405 undef %19.sub0:vreg_64 = V_ADD_F32_e32 %7, %2.sub0, implicit $mode, implicit $exec406 %19.sub1:vreg_64 = V_ADD_F32_e32 %3, %3, implicit $mode, implicit $exec407 DBG_VALUE408 GLOBAL_STORE_DWORDX2 %19, %4, 32, 0, implicit $exec409 %11.sub0:vreg_64 = GLOBAL_LOAD_DWORD %9, 0, 0, implicit $exec410 %8.sub0:vreg_64 = GLOBAL_LOAD_DWORD %10, 0, 0, implicit $exec411 %20:vgpr_32 = GLOBAL_LOAD_DWORD %11, 0, 0, implicit $exec412 DBG_VALUE413 DBG_VALUE414 %21:vgpr_32 = GLOBAL_LOAD_DWORD %14, 0, 0, implicit $exec415 %22:vgpr_32 = GLOBAL_LOAD_DWORD %15, 0, 0, implicit $exec416 %23:vreg_64 = V_LSHLREV_B64_e64 2, %8, implicit $exec417 S_NOP 0, implicit %13, implicit %23.sub0, implicit %12, implicit %17418 GLOBAL_STORE_DWORD %15, %18, 0, 0, implicit $exec419 420 bb.1:421 DBG_VALUE422 S_SETREG_IMM32_B32 0, 1, implicit-def $mode, implicit $mode423 DBG_VALUE424 DBG_VALUE425 S_SETREG_IMM32_B32 0, 1, implicit-def $mode, implicit $mode426 DBG_VALUE427 428 bb.3:429 430 bb.2:431 S_NOP 0, implicit %0432 S_NOP 0, implicit %16433 S_ENDPGM 0434...435---436name: test_early_clobber_trivial437tracksRegLiveness: true438body: |439 bb.0:440 ; RP-LABEL: name: test_early_clobber_trivial441 ; RP: Live-in:442 ; RP-NEXT: SGPR VGPR443 ; RP-NEXT: 0 0444 ; RP-NEXT: 0 1 %0:vgpr_32 = V_MOV_B32_e32 42, implicit $exec445 ; RP-NEXT: 0 1446 ; RP-NEXT: 0 2 early-clobber %1:vgpr_32 = V_MOV_B32_e32 %0:vgpr_32, implicit $exec447 ; RP-NEXT: 0 1448 ; RP-NEXT: 0 1 S_NOP 0, implicit %1:vgpr_32449 ; RP-NEXT: 0 0450 ; RP-NEXT: Live-out:451 ; RP-NEXT: Live-thr:452 ; RP-NEXT: 0 0453 %0:vgpr_32 = V_MOV_B32_e32 42, implicit $exec454 early-clobber %1:vgpr_32 = V_MOV_B32_e32 %0, implicit $exec455 S_NOP 0, implicit %1456...457---458name: test_not_early_clobber_trivial459tracksRegLiveness: true460body: |461 bb.0:462 ; RPU-LABEL: name: test_not_early_clobber_trivial463 ; RPU: Live-in:464 ; RPU-NEXT: SGPR VGPR465 ; RPU-NEXT: 0 0466 ; RPU-NEXT: 0 1 %0:vgpr_32 = V_MOV_B32_e32 42, implicit $exec467 ; RPU-NEXT: 0 1468 ; RPU-NEXT: 0 1 %1:vgpr_32 = V_MOV_B32_e32 %0:vgpr_32, implicit $exec469 ; RPU-NEXT: 0 1470 ; RPU-NEXT: 0 1 S_NOP 0, implicit %1:vgpr_32471 ; RPU-NEXT: 0 0472 ; RPU-NEXT: Live-out:473 ; RPU-NEXT: Live-thr:474 ; RPU-NEXT: 0 0475 ;476 ; RPD-LABEL: name: test_not_early_clobber_trivial477 ; RPD: Live-in:478 ; RPD-NEXT: SGPR VGPR479 ; RPD-NEXT: 0 0480 ; RPD-NEXT: 0 1 %0:vgpr_32 = V_MOV_B32_e32 42, implicit $exec481 ; RPD-NEXT: 0 1482 ; RPD-NEXT: 0 2 %1:vgpr_32 = V_MOV_B32_e32 %0:vgpr_32, implicit $exec483 ; RPD-NEXT: 0 1484 ; RPD-NEXT: 0 1 S_NOP 0, implicit %1:vgpr_32485 ; RPD-NEXT: 0 0486 ; RPD-NEXT: Live-out:487 ; RPD-NEXT: Live-thr:488 ; RPD-NEXT: 0 0489 %0:vgpr_32 = V_MOV_B32_e32 42, implicit $exec490 %1:vgpr_32 = V_MOV_B32_e32 %0, implicit $exec491 S_NOP 0, implicit %1492...493---494name: movrel495tracksRegLiveness: true496body: |497 ; RPU-LABEL: name: movrel498 ; RPU: bb.0:499 ; RPU-NEXT: Live-in:500 ; RPU-NEXT: SGPR VGPR501 ; RPU-NEXT: 0 0502 ; RPU-NEXT: 0 0 $sgpr0 = COPY $sgpr1503 ; RPU-NEXT: 0 0504 ; RPU-NEXT: 0 0 $sgpr2_sgpr3 = S_GETPC_B64505 ; RPU-NEXT: 0 0506 ; RPU-NEXT: 0 0 $sgpr1 = COPY killed $sgpr3507 ; RPU-NEXT: 0 0508 ; RPU-NEXT: 0 0 $sgpr0_sgpr1_sgpr2_sgpr3 = S_LOAD_DWORDX4_IMM $sgpr0_sgpr1, 0, 0509 ; RPU-NEXT: 0 0510 ; RPU-NEXT: 0 0 $sgpr0 = S_BUFFER_LOAD_DWORD_IMM $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0511 ; RPU-NEXT: 0 0512 ; RPU-NEXT: 0 1 undef %0.sub5:vreg_512 = V_MOV_B32_e32 5, implicit $exec513 ; RPU-NEXT: 0 1514 ; RPU-NEXT: 0 1 S_CMP_GT_U32 $sgpr0, 15, implicit-def $scc515 ; RPU-NEXT: 0 1516 ; RPU-NEXT: 0 1 S_CBRANCH_SCC1 %bb.2, implicit $scc517 ; RPU-NEXT: 0 1518 ; RPU-NEXT: 0 1 S_BRANCH %bb.1519 ; RPU-NEXT: 0 1520 ; RPU-NEXT: Live-out: %0:0000000000000C00521 ; RPU-NEXT: Live-thr:522 ; RPU-NEXT: 0 0523 ; RPU-NEXT: bb.1:524 ; RPU-NEXT: Live-in:525 ; RPU-NEXT: SGPR VGPR526 ; RPU-NEXT: 0 0527 ; RPU-NEXT: 0 1 undef %0.sub5:vreg_512 = V_MOV_B32_e32 5, implicit $exec528 ; RPU-NEXT: 0 1529 ; RPU-NEXT: 0 1 $m0 = S_MOV_B32 killed $sgpr0530 ; RPU-NEXT: 0 1531 ; RPU-NEXT: 0 16 %0:vreg_512 = V_INDIRECT_REG_WRITE_MOVREL_B32_V16 %0:vreg_512(tied-def 0), 42, 3, implicit $m0, implicit $exec532 ; RPU-NEXT: 0 1533 ; RPU-NEXT: Live-out: %0:0000000000000C00534 ; RPU-NEXT: Live-thr:535 ; RPU-NEXT: 0 0536 ; RPU-NEXT: bb.2:537 ; RPU-NEXT: Live-in: %0:0000000000000C00538 ; RPU-NEXT: SGPR VGPR539 ; RPU-NEXT: 0 1540 ; RPU-NEXT: 0 1 %1:vgpr_32 = V_CVT_F32_UBYTE0_e64 %0.sub5:vreg_512, 0, 0, implicit $exec541 ; RPU-NEXT: 0 1542 ; RPU-NEXT: 0 1 EXP_DONE 0, %1:vgpr_32, undef %2:vgpr_32, undef %3:vgpr_32, undef %4:vgpr_32, -1, 0, 1, implicit $exec543 ; RPU-NEXT: 0 0544 ; RPU-NEXT: 0 0 S_ENDPGM 0545 ; RPU-NEXT: 0 0546 ; RPU-NEXT: Live-out:547 ; RPU-NEXT: Live-thr:548 ; RPU-NEXT: 0 0549 ;550 ; RPD-LABEL: name: movrel551 ; RPD: bb.0:552 ; RPD-NEXT: Live-in:553 ; RPD-NEXT: SGPR VGPR554 ; RPD-NEXT: 0 0555 ; RPD-NEXT: 0 0 $sgpr0 = COPY $sgpr1556 ; RPD-NEXT: 0 0557 ; RPD-NEXT: 0 0 $sgpr2_sgpr3 = S_GETPC_B64558 ; RPD-NEXT: 0 0559 ; RPD-NEXT: 0 0 $sgpr1 = COPY killed $sgpr3560 ; RPD-NEXT: 0 0561 ; RPD-NEXT: 0 0 $sgpr0_sgpr1_sgpr2_sgpr3 = S_LOAD_DWORDX4_IMM $sgpr0_sgpr1, 0, 0562 ; RPD-NEXT: 0 0563 ; RPD-NEXT: 0 0 $sgpr0 = S_BUFFER_LOAD_DWORD_IMM $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0564 ; RPD-NEXT: 0 0565 ; RPD-NEXT: 0 1 undef %0.sub5:vreg_512 = V_MOV_B32_e32 5, implicit $exec566 ; RPD-NEXT: 0 1567 ; RPD-NEXT: 0 1 S_CMP_GT_U32 $sgpr0, 15, implicit-def $scc568 ; RPD-NEXT: 0 1569 ; RPD-NEXT: 0 1 S_CBRANCH_SCC1 %bb.2, implicit $scc570 ; RPD-NEXT: 0 1571 ; RPD-NEXT: 0 1 S_BRANCH %bb.1572 ; RPD-NEXT: 0 1573 ; RPD-NEXT: Live-out: %0:0000000000000C00574 ; RPD-NEXT: Live-thr:575 ; RPD-NEXT: 0 0576 ; RPD-NEXT: bb.1:577 ; RPD-NEXT: Live-in:578 ; RPD-NEXT: SGPR VGPR579 ; RPD-NEXT: 0 0580 ; RPD-NEXT: 0 1 undef %0.sub5:vreg_512 = V_MOV_B32_e32 5, implicit $exec581 ; RPD-NEXT: 0 1582 ; RPD-NEXT: 0 1 $m0 = S_MOV_B32 killed $sgpr0583 ; RPD-NEXT: 0 1584 ; RPD-NEXT: 0 16 %0:vreg_512 = V_INDIRECT_REG_WRITE_MOVREL_B32_V16 %0:vreg_512(tied-def 0), 42, 3, implicit $m0, implicit $exec585 ; RPD-NEXT: 0 1586 ; RPD-NEXT: Live-out: %0:0000000000000C00587 ; RPD-NEXT: Live-thr:588 ; RPD-NEXT: 0 0589 ; RPD-NEXT: bb.2:590 ; RPD-NEXT: Live-in: %0:0000000000000C00591 ; RPD-NEXT: SGPR VGPR592 ; RPD-NEXT: 0 1593 ; RPD-NEXT: 0 2 %1:vgpr_32 = V_CVT_F32_UBYTE0_e64 %0.sub5:vreg_512, 0, 0, implicit $exec594 ; RPD-NEXT: 0 1595 ; RPD-NEXT: 0 1 EXP_DONE 0, %1:vgpr_32, undef %2:vgpr_32, undef %3:vgpr_32, undef %4:vgpr_32, -1, 0, 1, implicit $exec596 ; RPD-NEXT: 0 0597 ; RPD-NEXT: 0 0 S_ENDPGM 0598 ; RPD-NEXT: 0 0599 ; RPD-NEXT: Live-out:600 ; RPD-NEXT: Live-thr:601 ; RPD-NEXT: 0 0602 bb.0:603 liveins: $sgpr1604 $sgpr0 = COPY $sgpr1605 $sgpr2_sgpr3 = S_GETPC_B64606 $sgpr1 = COPY killed $sgpr3607 $sgpr0_sgpr1_sgpr2_sgpr3 = S_LOAD_DWORDX4_IMM killed $sgpr0_sgpr1, 0, 0608 $sgpr0 = S_BUFFER_LOAD_DWORD_IMM killed $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0609 undef %47.sub5:vreg_512 = V_MOV_B32_e32 5, implicit $exec610 S_CMP_GT_U32 $sgpr0, 15, implicit-def $scc611 S_CBRANCH_SCC1 %bb.2, implicit $scc612 S_BRANCH %bb.1613 614 bb.1:615 liveins: $sgpr0616 undef %47.sub5:vreg_512 = V_MOV_B32_e32 5, implicit $exec617 $m0 = S_MOV_B32 killed $sgpr0618 %47:vreg_512 = V_INDIRECT_REG_WRITE_MOVREL_B32_V16 %47:vreg_512, 42, 3, implicit $m0, implicit $exec619 620 bb.2:621 622 %49:vgpr_32 = V_CVT_F32_UBYTE0_e64 %47.sub5:vreg_512, 0, 0, implicit $exec623 EXP_DONE 0, %49:vgpr_32, undef %51:vgpr_32, undef %53:vgpr_32, undef %55:vgpr_32, -1, 0, 1, implicit $exec624 S_ENDPGM 0625...626---627name: test_partially_used_def628tracksRegLiveness: true629body: |630 bb.0:631 liveins: $sgpr0_sgpr1_sgpr2_sgpr3632 ; RPU-LABEL: name: test_partially_used_def633 ; RPU: Live-in:634 ; RPU-NEXT: SGPR VGPR635 ; RPU-NEXT: 0 0636 ; RPU-NEXT: 4 0 %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3637 ; RPU-NEXT: 4 0638 ; RPU-NEXT: 4 0 %1:sgpr_128 = COPY %0:sgpr_128639 ; RPU-NEXT: 1 0640 ; RPU-NEXT: 1 0 S_NOP 0, implicit %1.sub1:sgpr_128641 ; RPU-NEXT: 0 0642 ; RPU-NEXT: Live-out:643 ; RPU-NEXT: Live-thr:644 ; RPU-NEXT: 0 0645 ;646 ; RPD-LABEL: name: test_partially_used_def647 ; RPD: Live-in:648 ; RPD-NEXT: SGPR VGPR649 ; RPD-NEXT: 0 0650 ; RPD-NEXT: 4 0 %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3651 ; RPD-NEXT: 4 0652 ; RPD-NEXT: 8 0 %1:sgpr_128 = COPY %0:sgpr_128653 ; RPD-NEXT: 1 0654 ; RPD-NEXT: 1 0 S_NOP 0, implicit %1.sub1:sgpr_128655 ; RPD-NEXT: 0 0656 ; RPD-NEXT: Live-out:657 ; RPD-NEXT: Live-thr:658 ; RPD-NEXT: 0 0659 %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3660 %1:sgpr_128 = COPY %0:sgpr_128661 S_NOP 0, implicit %1.sub1662...663---664name: test_partially_used_early_clobber_def665tracksRegLiveness: true666body: |667 bb.0:668 liveins: $sgpr0_sgpr1_sgpr2_sgpr3669 ; RP-LABEL: name: test_partially_used_early_clobber_def670 ; RP: Live-in:671 ; RP-NEXT: SGPR VGPR672 ; RP-NEXT: 0 0673 ; RP-NEXT: 4 0 %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3674 ; RP-NEXT: 4 0675 ; RP-NEXT: 8 0 early-clobber %1:sgpr_128 = COPY %0:sgpr_128676 ; RP-NEXT: 1 0677 ; RP-NEXT: 1 0 S_NOP 0, implicit %1.sub1:sgpr_128678 ; RP-NEXT: 0 0679 ; RP-NEXT: Live-out:680 ; RP-NEXT: Live-thr:681 ; RP-NEXT: 0 0682 %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3683 early-clobber %1:sgpr_128 = COPY %0:sgpr_128684 S_NOP 0, implicit %1.sub1685...686---687name: test_partially_used_def_and_early_clobber_def688tracksRegLiveness: true689body: |690 bb.0:691 liveins: $sgpr0_sgpr1_sgpr2_sgpr3692 ; RPU-LABEL: name: test_partially_used_def_and_early_clobber_def693 ; RPU: Live-in:694 ; RPU-NEXT: SGPR VGPR695 ; RPU-NEXT: 0 0696 ; RPU-NEXT: 4 0 %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3697 ; RPU-NEXT: 4 0698 ; RPU-NEXT: 16 0 %1:sgpr_128 = COPY %0:sgpr_128, implicit-def %2:sgpr_128, implicit-def early-clobber %3:sgpr_128, implicit-def dead early-clobber %4:sgpr_128699 ; RPU-NEXT: 6 0700 ; RPU-NEXT: 6 0 S_NOP 0, implicit %1.sub1:sgpr_128, implicit %2.sub0_sub1:sgpr_128, implicit %3.sub0_sub1_sub2:sgpr_128701 ; RPU-NEXT: 0 0702 ; RPU-NEXT: Live-out:703 ; RPU-NEXT: Live-thr:704 ; RPU-NEXT: 0 0705 ;706 ; RPD-LABEL: name: test_partially_used_def_and_early_clobber_def707 ; RPD: Live-in:708 ; RPD-NEXT: SGPR VGPR709 ; RPD-NEXT: 0 0710 ; RPD-NEXT: 4 0 %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3711 ; RPD-NEXT: 4 0712 ; RPD-NEXT: 20 0 %1:sgpr_128 = COPY %0:sgpr_128, implicit-def %2:sgpr_128, implicit-def early-clobber %3:sgpr_128, implicit-def dead early-clobber %4:sgpr_128713 ; RPD-NEXT: 6 0714 ; RPD-NEXT: 6 0 S_NOP 0, implicit %1.sub1:sgpr_128, implicit %2.sub0_sub1:sgpr_128, implicit %3.sub0_sub1_sub2:sgpr_128715 ; RPD-NEXT: 0 0716 ; RPD-NEXT: Live-out:717 ; RPD-NEXT: Live-thr:718 ; RPD-NEXT: 0 0719 %0:sgpr_128 = COPY $sgpr0_sgpr1_sgpr2_sgpr3720 %1:sgpr_128 = COPY %0:sgpr_128, implicit-def %2:sgpr_128, implicit-def early-clobber %3:sgpr_128, implicit-def early-clobber %4:sgpr_128721 S_NOP 0, implicit %1.sub1, implicit %2.sub0_sub1, implicit %3.sub0_sub1_sub2722...723