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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck %s3 4; Regression test for a bug in `DAGCombiner::replaceStoreOfInsertLoad` where5; Idx could be smaller than PtrVT, causing a MUL to be emitted with inconsistent6; LHS/RHS types.7 8define void @testcase_0(ptr addrspace(1) %in, float %arg) {9; CHECK-LABEL: testcase_0:10; CHECK: ; %bb.0:11; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12; CHECK-NEXT: global_store_dword v[0:1], v2, off offset:1213; CHECK-NEXT: s_waitcnt vmcnt(0)14; CHECK-NEXT: s_setpc_b64 s[30:31]15 %loaded = load <4 x float>, ptr addrspace(1) %in16 %modified = insertelement <4 x float> %loaded, float %arg, i64 317 store <4 x float> %modified, ptr addrspace(1) %in18 ret void19}20 21define void @testcase_1(ptr addrspace(1) %in, float %arg) {22; CHECK-LABEL: testcase_1:23; CHECK: ; %bb.0:24; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)25; CHECK-NEXT: global_store_dword v[0:1], v2, off offset:1626; CHECK-NEXT: s_waitcnt vmcnt(0)27; CHECK-NEXT: s_setpc_b64 s[30:31]28 %loaded = load <6 x float>, ptr addrspace(1) %in29 %modified = insertelement <6 x float> %loaded, float %arg, i64 430 store <6 x float> %modified, ptr addrspace(1) %in31 ret void32}33 34define void @testcase_2(ptr addrspace(1) %in, double %arg) {35; CHECK-LABEL: testcase_2:36; CHECK: ; %bb.0:37; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)38; CHECK-NEXT: global_store_dwordx2 v[0:1], v[2:3], off offset:839; CHECK-NEXT: s_waitcnt vmcnt(0)40; CHECK-NEXT: s_setpc_b64 s[30:31]41 %loaded = load <4 x double>, ptr addrspace(1) %in42 %modified = insertelement <4 x double> %loaded, double %arg, i64 143 store <4 x double> %modified, ptr addrspace(1) %in44 ret void45}46 47define void @testcase_3(ptr addrspace(1) %in, double %arg) {48; CHECK-LABEL: testcase_3:49; CHECK: ; %bb.0:50; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)51; CHECK-NEXT: global_store_dwordx2 v[0:1], v[2:3], off offset:5652; CHECK-NEXT: s_waitcnt vmcnt(0)53; CHECK-NEXT: s_setpc_b64 s[30:31]54 %loaded = load <8 x double>, ptr addrspace(1) %in55 %modified = insertelement <8 x double> %loaded, double %arg, i64 756 store <8 x double> %modified, ptr addrspace(1) %in57 ret void58}59