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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -global-isel -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=GFX6 %s3; RUN: llc -global-isel -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefix=GFX7 %s4; RUN: llc -global-isel -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefix=GFX8 %s5; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX9 %s6; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX10 %s7; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX11,GFX11-TRUE16 %s8; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=GFX10PLUS,GFX11,GFX11-FAKE16 %s9; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=SDAG_GFX6 %s10; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefix=SDAG_GFX7 %s11; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefix=SDAG_GFX8 %s12; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefix=SDAG_GFX9 %s13; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1010 < %s | FileCheck -check-prefixes=SDAG_GFX10PLUS,SDAG_GFX10 %s14; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=SDAG_GFX10PLUS,SDAG_GFX11,SDAG_GFX11-TRUE16 %s15; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefixes=SDAG_GFX10PLUS,SDAG_GFX11,SDAG_GFX11-FAKE16 %s16 17define float @v_roundeven_f32(float %x) {18; GFX6-LABEL: v_roundeven_f32:19; GFX6: ; %bb.0:20; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)21; GFX6-NEXT: v_rndne_f32_e32 v0, v022; GFX6-NEXT: s_setpc_b64 s[30:31]23;24; GFX7-LABEL: v_roundeven_f32:25; GFX7: ; %bb.0:26; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)27; GFX7-NEXT: v_rndne_f32_e32 v0, v028; GFX7-NEXT: s_setpc_b64 s[30:31]29;30; GFX8-LABEL: v_roundeven_f32:31; GFX8: ; %bb.0:32; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)33; GFX8-NEXT: v_rndne_f32_e32 v0, v034; GFX8-NEXT: s_setpc_b64 s[30:31]35;36; GFX9-LABEL: v_roundeven_f32:37; GFX9: ; %bb.0:38; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)39; GFX9-NEXT: v_rndne_f32_e32 v0, v040; GFX9-NEXT: s_setpc_b64 s[30:31]41;42; GFX10PLUS-LABEL: v_roundeven_f32:43; GFX10PLUS: ; %bb.0:44; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)45; GFX10PLUS-NEXT: v_rndne_f32_e32 v0, v046; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]47;48; SDAG_GFX6-LABEL: v_roundeven_f32:49; SDAG_GFX6: ; %bb.0:50; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)51; SDAG_GFX6-NEXT: v_rndne_f32_e32 v0, v052; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]53;54; SDAG_GFX7-LABEL: v_roundeven_f32:55; SDAG_GFX7: ; %bb.0:56; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)57; SDAG_GFX7-NEXT: v_rndne_f32_e32 v0, v058; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]59;60; SDAG_GFX8-LABEL: v_roundeven_f32:61; SDAG_GFX8: ; %bb.0:62; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)63; SDAG_GFX8-NEXT: v_rndne_f32_e32 v0, v064; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]65;66; SDAG_GFX9-LABEL: v_roundeven_f32:67; SDAG_GFX9: ; %bb.0:68; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)69; SDAG_GFX9-NEXT: v_rndne_f32_e32 v0, v070; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]71;72; SDAG_GFX10PLUS-LABEL: v_roundeven_f32:73; SDAG_GFX10PLUS: ; %bb.0:74; SDAG_GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)75; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v0, v076; SDAG_GFX10PLUS-NEXT: s_setpc_b64 s[30:31]77 %roundeven = call float @llvm.roundeven.f32(float %x)78 ret float %roundeven79}80 81define <2 x float> @v_roundeven_v2f32(<2 x float> %x) {82; GFX6-LABEL: v_roundeven_v2f32:83; GFX6: ; %bb.0:84; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)85; GFX6-NEXT: v_rndne_f32_e32 v0, v086; GFX6-NEXT: v_rndne_f32_e32 v1, v187; GFX6-NEXT: s_setpc_b64 s[30:31]88;89; GFX7-LABEL: v_roundeven_v2f32:90; GFX7: ; %bb.0:91; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)92; GFX7-NEXT: v_rndne_f32_e32 v0, v093; GFX7-NEXT: v_rndne_f32_e32 v1, v194; GFX7-NEXT: s_setpc_b64 s[30:31]95;96; GFX8-LABEL: v_roundeven_v2f32:97; GFX8: ; %bb.0:98; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)99; GFX8-NEXT: v_rndne_f32_e32 v0, v0100; GFX8-NEXT: v_rndne_f32_e32 v1, v1101; GFX8-NEXT: s_setpc_b64 s[30:31]102;103; GFX9-LABEL: v_roundeven_v2f32:104; GFX9: ; %bb.0:105; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)106; GFX9-NEXT: v_rndne_f32_e32 v0, v0107; GFX9-NEXT: v_rndne_f32_e32 v1, v1108; GFX9-NEXT: s_setpc_b64 s[30:31]109;110; GFX10PLUS-LABEL: v_roundeven_v2f32:111; GFX10PLUS: ; %bb.0:112; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)113; GFX10PLUS-NEXT: v_rndne_f32_e32 v0, v0114; GFX10PLUS-NEXT: v_rndne_f32_e32 v1, v1115; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]116;117; SDAG_GFX6-LABEL: v_roundeven_v2f32:118; SDAG_GFX6: ; %bb.0:119; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)120; SDAG_GFX6-NEXT: v_rndne_f32_e32 v0, v0121; SDAG_GFX6-NEXT: v_rndne_f32_e32 v1, v1122; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]123;124; SDAG_GFX7-LABEL: v_roundeven_v2f32:125; SDAG_GFX7: ; %bb.0:126; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)127; SDAG_GFX7-NEXT: v_rndne_f32_e32 v0, v0128; SDAG_GFX7-NEXT: v_rndne_f32_e32 v1, v1129; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]130;131; SDAG_GFX8-LABEL: v_roundeven_v2f32:132; SDAG_GFX8: ; %bb.0:133; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)134; SDAG_GFX8-NEXT: v_rndne_f32_e32 v0, v0135; SDAG_GFX8-NEXT: v_rndne_f32_e32 v1, v1136; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]137;138; SDAG_GFX9-LABEL: v_roundeven_v2f32:139; SDAG_GFX9: ; %bb.0:140; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)141; SDAG_GFX9-NEXT: v_rndne_f32_e32 v0, v0142; SDAG_GFX9-NEXT: v_rndne_f32_e32 v1, v1143; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]144;145; SDAG_GFX10PLUS-LABEL: v_roundeven_v2f32:146; SDAG_GFX10PLUS: ; %bb.0:147; SDAG_GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)148; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v0, v0149; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v1, v1150; SDAG_GFX10PLUS-NEXT: s_setpc_b64 s[30:31]151 %roundeven = call <2 x float> @llvm.roundeven.v2f32(<2 x float> %x)152 ret <2 x float> %roundeven153}154 155define <3 x float> @v_roundeven_v3f32(<3 x float> %x) {156; GFX6-LABEL: v_roundeven_v3f32:157; GFX6: ; %bb.0:158; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)159; GFX6-NEXT: v_rndne_f32_e32 v0, v0160; GFX6-NEXT: v_rndne_f32_e32 v1, v1161; GFX6-NEXT: v_rndne_f32_e32 v2, v2162; GFX6-NEXT: s_setpc_b64 s[30:31]163;164; GFX7-LABEL: v_roundeven_v3f32:165; GFX7: ; %bb.0:166; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)167; GFX7-NEXT: v_rndne_f32_e32 v0, v0168; GFX7-NEXT: v_rndne_f32_e32 v1, v1169; GFX7-NEXT: v_rndne_f32_e32 v2, v2170; GFX7-NEXT: s_setpc_b64 s[30:31]171;172; GFX8-LABEL: v_roundeven_v3f32:173; GFX8: ; %bb.0:174; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)175; GFX8-NEXT: v_rndne_f32_e32 v0, v0176; GFX8-NEXT: v_rndne_f32_e32 v1, v1177; GFX8-NEXT: v_rndne_f32_e32 v2, v2178; GFX8-NEXT: s_setpc_b64 s[30:31]179;180; GFX9-LABEL: v_roundeven_v3f32:181; GFX9: ; %bb.0:182; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)183; GFX9-NEXT: v_rndne_f32_e32 v0, v0184; GFX9-NEXT: v_rndne_f32_e32 v1, v1185; GFX9-NEXT: v_rndne_f32_e32 v2, v2186; GFX9-NEXT: s_setpc_b64 s[30:31]187;188; GFX10PLUS-LABEL: v_roundeven_v3f32:189; GFX10PLUS: ; %bb.0:190; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)191; GFX10PLUS-NEXT: v_rndne_f32_e32 v0, v0192; GFX10PLUS-NEXT: v_rndne_f32_e32 v1, v1193; GFX10PLUS-NEXT: v_rndne_f32_e32 v2, v2194; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]195;196; SDAG_GFX6-LABEL: v_roundeven_v3f32:197; SDAG_GFX6: ; %bb.0:198; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)199; SDAG_GFX6-NEXT: v_rndne_f32_e32 v0, v0200; SDAG_GFX6-NEXT: v_rndne_f32_e32 v1, v1201; SDAG_GFX6-NEXT: v_rndne_f32_e32 v2, v2202; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]203;204; SDAG_GFX7-LABEL: v_roundeven_v3f32:205; SDAG_GFX7: ; %bb.0:206; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)207; SDAG_GFX7-NEXT: v_rndne_f32_e32 v0, v0208; SDAG_GFX7-NEXT: v_rndne_f32_e32 v1, v1209; SDAG_GFX7-NEXT: v_rndne_f32_e32 v2, v2210; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]211;212; SDAG_GFX8-LABEL: v_roundeven_v3f32:213; SDAG_GFX8: ; %bb.0:214; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)215; SDAG_GFX8-NEXT: v_rndne_f32_e32 v0, v0216; SDAG_GFX8-NEXT: v_rndne_f32_e32 v1, v1217; SDAG_GFX8-NEXT: v_rndne_f32_e32 v2, v2218; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]219;220; SDAG_GFX9-LABEL: v_roundeven_v3f32:221; SDAG_GFX9: ; %bb.0:222; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)223; SDAG_GFX9-NEXT: v_rndne_f32_e32 v0, v0224; SDAG_GFX9-NEXT: v_rndne_f32_e32 v1, v1225; SDAG_GFX9-NEXT: v_rndne_f32_e32 v2, v2226; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]227;228; SDAG_GFX10PLUS-LABEL: v_roundeven_v3f32:229; SDAG_GFX10PLUS: ; %bb.0:230; SDAG_GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)231; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v0, v0232; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v1, v1233; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v2, v2234; SDAG_GFX10PLUS-NEXT: s_setpc_b64 s[30:31]235 %roundeven = call <3 x float> @llvm.roundeven.v3f32(<3 x float> %x)236 ret <3 x float> %roundeven237}238 239define <4 x float> @v_roundeven_v4f32(<4 x float> %x) {240; GFX6-LABEL: v_roundeven_v4f32:241; GFX6: ; %bb.0:242; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)243; GFX6-NEXT: v_rndne_f32_e32 v0, v0244; GFX6-NEXT: v_rndne_f32_e32 v1, v1245; GFX6-NEXT: v_rndne_f32_e32 v2, v2246; GFX6-NEXT: v_rndne_f32_e32 v3, v3247; GFX6-NEXT: s_setpc_b64 s[30:31]248;249; GFX7-LABEL: v_roundeven_v4f32:250; GFX7: ; %bb.0:251; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)252; GFX7-NEXT: v_rndne_f32_e32 v0, v0253; GFX7-NEXT: v_rndne_f32_e32 v1, v1254; GFX7-NEXT: v_rndne_f32_e32 v2, v2255; GFX7-NEXT: v_rndne_f32_e32 v3, v3256; GFX7-NEXT: s_setpc_b64 s[30:31]257;258; GFX8-LABEL: v_roundeven_v4f32:259; GFX8: ; %bb.0:260; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)261; GFX8-NEXT: v_rndne_f32_e32 v0, v0262; GFX8-NEXT: v_rndne_f32_e32 v1, v1263; GFX8-NEXT: v_rndne_f32_e32 v2, v2264; GFX8-NEXT: v_rndne_f32_e32 v3, v3265; GFX8-NEXT: s_setpc_b64 s[30:31]266;267; GFX9-LABEL: v_roundeven_v4f32:268; GFX9: ; %bb.0:269; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)270; GFX9-NEXT: v_rndne_f32_e32 v0, v0271; GFX9-NEXT: v_rndne_f32_e32 v1, v1272; GFX9-NEXT: v_rndne_f32_e32 v2, v2273; GFX9-NEXT: v_rndne_f32_e32 v3, v3274; GFX9-NEXT: s_setpc_b64 s[30:31]275;276; GFX10PLUS-LABEL: v_roundeven_v4f32:277; GFX10PLUS: ; %bb.0:278; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)279; GFX10PLUS-NEXT: v_rndne_f32_e32 v0, v0280; GFX10PLUS-NEXT: v_rndne_f32_e32 v1, v1281; GFX10PLUS-NEXT: v_rndne_f32_e32 v2, v2282; GFX10PLUS-NEXT: v_rndne_f32_e32 v3, v3283; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]284;285; SDAG_GFX6-LABEL: v_roundeven_v4f32:286; SDAG_GFX6: ; %bb.0:287; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)288; SDAG_GFX6-NEXT: v_rndne_f32_e32 v0, v0289; SDAG_GFX6-NEXT: v_rndne_f32_e32 v1, v1290; SDAG_GFX6-NEXT: v_rndne_f32_e32 v2, v2291; SDAG_GFX6-NEXT: v_rndne_f32_e32 v3, v3292; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]293;294; SDAG_GFX7-LABEL: v_roundeven_v4f32:295; SDAG_GFX7: ; %bb.0:296; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)297; SDAG_GFX7-NEXT: v_rndne_f32_e32 v0, v0298; SDAG_GFX7-NEXT: v_rndne_f32_e32 v1, v1299; SDAG_GFX7-NEXT: v_rndne_f32_e32 v2, v2300; SDAG_GFX7-NEXT: v_rndne_f32_e32 v3, v3301; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]302;303; SDAG_GFX8-LABEL: v_roundeven_v4f32:304; SDAG_GFX8: ; %bb.0:305; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)306; SDAG_GFX8-NEXT: v_rndne_f32_e32 v0, v0307; SDAG_GFX8-NEXT: v_rndne_f32_e32 v1, v1308; SDAG_GFX8-NEXT: v_rndne_f32_e32 v2, v2309; SDAG_GFX8-NEXT: v_rndne_f32_e32 v3, v3310; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]311;312; SDAG_GFX9-LABEL: v_roundeven_v4f32:313; SDAG_GFX9: ; %bb.0:314; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)315; SDAG_GFX9-NEXT: v_rndne_f32_e32 v0, v0316; SDAG_GFX9-NEXT: v_rndne_f32_e32 v1, v1317; SDAG_GFX9-NEXT: v_rndne_f32_e32 v2, v2318; SDAG_GFX9-NEXT: v_rndne_f32_e32 v3, v3319; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]320;321; SDAG_GFX10PLUS-LABEL: v_roundeven_v4f32:322; SDAG_GFX10PLUS: ; %bb.0:323; SDAG_GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)324; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v0, v0325; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v1, v1326; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v2, v2327; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v3, v3328; SDAG_GFX10PLUS-NEXT: s_setpc_b64 s[30:31]329 %roundeven = call <4 x float> @llvm.roundeven.v4f32(<4 x float> %x)330 ret <4 x float> %roundeven331}332 333define half @v_roundeven_f16(half %x) {334; GFX6-LABEL: v_roundeven_f16:335; GFX6: ; %bb.0:336; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)337; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0338; GFX6-NEXT: v_rndne_f32_e32 v0, v0339; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0340; GFX6-NEXT: s_setpc_b64 s[30:31]341;342; GFX7-LABEL: v_roundeven_f16:343; GFX7: ; %bb.0:344; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)345; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0346; GFX7-NEXT: v_rndne_f32_e32 v0, v0347; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0348; GFX7-NEXT: s_setpc_b64 s[30:31]349;350; GFX8-LABEL: v_roundeven_f16:351; GFX8: ; %bb.0:352; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)353; GFX8-NEXT: v_rndne_f16_e32 v0, v0354; GFX8-NEXT: s_setpc_b64 s[30:31]355;356; GFX9-LABEL: v_roundeven_f16:357; GFX9: ; %bb.0:358; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)359; GFX9-NEXT: v_rndne_f16_e32 v0, v0360; GFX9-NEXT: s_setpc_b64 s[30:31]361;362; GFX10-LABEL: v_roundeven_f16:363; GFX10: ; %bb.0:364; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)365; GFX10-NEXT: v_rndne_f16_e32 v0, v0366; GFX10-NEXT: s_setpc_b64 s[30:31]367;368; GFX11-TRUE16-LABEL: v_roundeven_f16:369; GFX11-TRUE16: ; %bb.0:370; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)371; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l372; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]373;374; GFX11-FAKE16-LABEL: v_roundeven_f16:375; GFX11-FAKE16: ; %bb.0:376; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)377; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v0, v0378; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]379;380; SDAG_GFX6-LABEL: v_roundeven_f16:381; SDAG_GFX6: ; %bb.0:382; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)383; SDAG_GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0384; SDAG_GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0385; SDAG_GFX6-NEXT: v_rndne_f32_e32 v0, v0386; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]387;388; SDAG_GFX7-LABEL: v_roundeven_f16:389; SDAG_GFX7: ; %bb.0:390; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)391; SDAG_GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0392; SDAG_GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0393; SDAG_GFX7-NEXT: v_rndne_f32_e32 v0, v0394; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]395;396; SDAG_GFX8-LABEL: v_roundeven_f16:397; SDAG_GFX8: ; %bb.0:398; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)399; SDAG_GFX8-NEXT: v_rndne_f16_e32 v0, v0400; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]401;402; SDAG_GFX9-LABEL: v_roundeven_f16:403; SDAG_GFX9: ; %bb.0:404; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)405; SDAG_GFX9-NEXT: v_rndne_f16_e32 v0, v0406; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]407;408; SDAG_GFX10-LABEL: v_roundeven_f16:409; SDAG_GFX10: ; %bb.0:410; SDAG_GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)411; SDAG_GFX10-NEXT: v_rndne_f16_e32 v0, v0412; SDAG_GFX10-NEXT: s_setpc_b64 s[30:31]413;414; SDAG_GFX11-TRUE16-LABEL: v_roundeven_f16:415; SDAG_GFX11-TRUE16: ; %bb.0:416; SDAG_GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)417; SDAG_GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l418; SDAG_GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]419;420; SDAG_GFX11-FAKE16-LABEL: v_roundeven_f16:421; SDAG_GFX11-FAKE16: ; %bb.0:422; SDAG_GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)423; SDAG_GFX11-FAKE16-NEXT: v_rndne_f16_e32 v0, v0424; SDAG_GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]425 %roundeven = call half @llvm.roundeven.f16(half %x)426 ret half %roundeven427}428 429define <2 x half> @v_roundeven_v2f16(<2 x half> %x) {430; GFX6-LABEL: v_roundeven_v2f16:431; GFX6: ; %bb.0:432; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)433; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0434; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1435; GFX6-NEXT: v_rndne_f32_e32 v0, v0436; GFX6-NEXT: v_rndne_f32_e32 v1, v1437; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0438; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1439; GFX6-NEXT: s_setpc_b64 s[30:31]440;441; GFX7-LABEL: v_roundeven_v2f16:442; GFX7: ; %bb.0:443; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)444; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0445; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1446; GFX7-NEXT: v_rndne_f32_e32 v0, v0447; GFX7-NEXT: v_rndne_f32_e32 v1, v1448; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0449; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1450; GFX7-NEXT: s_setpc_b64 s[30:31]451;452; GFX8-LABEL: v_roundeven_v2f16:453; GFX8: ; %bb.0:454; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)455; GFX8-NEXT: v_rndne_f16_e32 v1, v0456; GFX8-NEXT: v_rndne_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1457; GFX8-NEXT: v_or_b32_e32 v0, v1, v0458; GFX8-NEXT: s_setpc_b64 s[30:31]459;460; GFX9-LABEL: v_roundeven_v2f16:461; GFX9: ; %bb.0:462; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)463; GFX9-NEXT: v_rndne_f16_e32 v1, v0464; GFX9-NEXT: v_rndne_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1465; GFX9-NEXT: v_pack_b32_f16 v0, v1, v0466; GFX9-NEXT: s_setpc_b64 s[30:31]467;468; GFX10-LABEL: v_roundeven_v2f16:469; GFX10: ; %bb.0:470; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)471; GFX10-NEXT: v_rndne_f16_e32 v1, v0472; GFX10-NEXT: v_rndne_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1473; GFX10-NEXT: v_pack_b32_f16 v0, v1, v0474; GFX10-NEXT: s_setpc_b64 s[30:31]475;476; GFX11-TRUE16-LABEL: v_roundeven_v2f16:477; GFX11-TRUE16: ; %bb.0:478; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)479; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l480; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.h, v0.h481; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h482; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]483;484; GFX11-FAKE16-LABEL: v_roundeven_v2f16:485; GFX11-FAKE16: ; %bb.0:486; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)487; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0488; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v0, v0489; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v1, v1490; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1491; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]492;493; SDAG_GFX6-LABEL: v_roundeven_v2f16:494; SDAG_GFX6: ; %bb.0:495; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)496; SDAG_GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0497; SDAG_GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1498; SDAG_GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0499; SDAG_GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1500; SDAG_GFX6-NEXT: v_rndne_f32_e32 v0, v0501; SDAG_GFX6-NEXT: v_rndne_f32_e32 v1, v1502; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]503;504; SDAG_GFX7-LABEL: v_roundeven_v2f16:505; SDAG_GFX7: ; %bb.0:506; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)507; SDAG_GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0508; SDAG_GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1509; SDAG_GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0510; SDAG_GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1511; SDAG_GFX7-NEXT: v_rndne_f32_e32 v0, v0512; SDAG_GFX7-NEXT: v_rndne_f32_e32 v1, v1513; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]514;515; SDAG_GFX8-LABEL: v_roundeven_v2f16:516; SDAG_GFX8: ; %bb.0:517; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)518; SDAG_GFX8-NEXT: v_rndne_f16_sdwa v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1519; SDAG_GFX8-NEXT: v_rndne_f16_e32 v0, v0520; SDAG_GFX8-NEXT: v_or_b32_e32 v0, v0, v1521; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]522;523; SDAG_GFX9-LABEL: v_roundeven_v2f16:524; SDAG_GFX9: ; %bb.0:525; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)526; SDAG_GFX9-NEXT: v_rndne_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1527; SDAG_GFX9-NEXT: v_rndne_f16_e32 v0, v0528; SDAG_GFX9-NEXT: v_pack_b32_f16 v0, v0, v1529; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]530;531; SDAG_GFX10-LABEL: v_roundeven_v2f16:532; SDAG_GFX10: ; %bb.0:533; SDAG_GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)534; SDAG_GFX10-NEXT: v_rndne_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1535; SDAG_GFX10-NEXT: v_rndne_f16_e32 v0, v0536; SDAG_GFX10-NEXT: v_pack_b32_f16 v0, v0, v1537; SDAG_GFX10-NEXT: s_setpc_b64 s[30:31]538;539; SDAG_GFX11-TRUE16-LABEL: v_roundeven_v2f16:540; SDAG_GFX11-TRUE16: ; %bb.0:541; SDAG_GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)542; SDAG_GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.h, v0.h543; SDAG_GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l544; SDAG_GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h545; SDAG_GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]546;547; SDAG_GFX11-FAKE16-LABEL: v_roundeven_v2f16:548; SDAG_GFX11-FAKE16: ; %bb.0:549; SDAG_GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)550; SDAG_GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0551; SDAG_GFX11-FAKE16-NEXT: v_rndne_f16_e32 v0, v0552; SDAG_GFX11-FAKE16-NEXT: v_rndne_f16_e32 v1, v1553; SDAG_GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1554; SDAG_GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]555 %roundeven = call <2 x half> @llvm.roundeven.v2f16(<2 x half> %x)556 ret <2 x half> %roundeven557}558 559define <2 x half> @v_roundeven_v2f16_fneg(<2 x half> %x) {560; GFX6-LABEL: v_roundeven_v2f16_fneg:561; GFX6: ; %bb.0:562; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)563; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1564; GFX6-NEXT: v_and_b32_e32 v0, 0xffff, v0565; GFX6-NEXT: v_or_b32_e32 v0, v1, v0566; GFX6-NEXT: v_xor_b32_e32 v0, 0x80008000, v0567; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v0568; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0569; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v0570; GFX6-NEXT: v_rndne_f32_e32 v0, v1571; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0572; GFX6-NEXT: v_rndne_f32_e32 v1, v2573; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1574; GFX6-NEXT: s_setpc_b64 s[30:31]575;576; GFX7-LABEL: v_roundeven_v2f16_fneg:577; GFX7: ; %bb.0:578; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)579; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1580; GFX7-NEXT: v_and_b32_e32 v0, 0xffff, v0581; GFX7-NEXT: v_or_b32_e32 v0, v1, v0582; GFX7-NEXT: v_xor_b32_e32 v0, 0x80008000, v0583; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v0584; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0585; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v0586; GFX7-NEXT: v_rndne_f32_e32 v0, v1587; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0588; GFX7-NEXT: v_rndne_f32_e32 v1, v2589; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1590; GFX7-NEXT: s_setpc_b64 s[30:31]591;592; GFX8-LABEL: v_roundeven_v2f16_fneg:593; GFX8: ; %bb.0:594; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)595; GFX8-NEXT: v_xor_b32_e32 v0, 0x80008000, v0596; GFX8-NEXT: v_rndne_f16_e32 v1, v0597; GFX8-NEXT: v_rndne_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1598; GFX8-NEXT: v_or_b32_e32 v0, v1, v0599; GFX8-NEXT: s_setpc_b64 s[30:31]600;601; GFX9-LABEL: v_roundeven_v2f16_fneg:602; GFX9: ; %bb.0:603; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)604; GFX9-NEXT: v_xor_b32_e32 v0, 0x80008000, v0605; GFX9-NEXT: v_rndne_f16_e32 v1, v0606; GFX9-NEXT: v_rndne_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1607; GFX9-NEXT: v_pack_b32_f16 v0, v1, v0608; GFX9-NEXT: s_setpc_b64 s[30:31]609;610; GFX10-LABEL: v_roundeven_v2f16_fneg:611; GFX10: ; %bb.0:612; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)613; GFX10-NEXT: v_xor_b32_e32 v0, 0x80008000, v0614; GFX10-NEXT: v_rndne_f16_e32 v1, v0615; GFX10-NEXT: v_rndne_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1616; GFX10-NEXT: v_pack_b32_f16 v0, v1, v0617; GFX10-NEXT: s_setpc_b64 s[30:31]618;619; GFX11-TRUE16-LABEL: v_roundeven_v2f16_fneg:620; GFX11-TRUE16: ; %bb.0:621; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)622; GFX11-TRUE16-NEXT: v_xor_b32_e32 v0, 0x80008000, v0623; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l624; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.h, v0.h625; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h626; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]627;628; GFX11-FAKE16-LABEL: v_roundeven_v2f16_fneg:629; GFX11-FAKE16: ; %bb.0:630; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)631; GFX11-FAKE16-NEXT: v_xor_b32_e32 v0, 0x80008000, v0632; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0633; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v0, v0634; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v1, v1635; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1636; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]637;638; SDAG_GFX6-LABEL: v_roundeven_v2f16_fneg:639; SDAG_GFX6: ; %bb.0:640; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)641; SDAG_GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1642; SDAG_GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0643; SDAG_GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1644; SDAG_GFX6-NEXT: v_or_b32_e32 v0, v0, v1645; SDAG_GFX6-NEXT: v_xor_b32_e32 v0, 0x80008000, v0646; SDAG_GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v0647; SDAG_GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0648; SDAG_GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1649; SDAG_GFX6-NEXT: v_rndne_f32_e32 v0, v0650; SDAG_GFX6-NEXT: v_rndne_f32_e32 v1, v1651; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]652;653; SDAG_GFX7-LABEL: v_roundeven_v2f16_fneg:654; SDAG_GFX7: ; %bb.0:655; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)656; SDAG_GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1657; SDAG_GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0658; SDAG_GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1659; SDAG_GFX7-NEXT: v_or_b32_e32 v0, v0, v1660; SDAG_GFX7-NEXT: v_xor_b32_e32 v0, 0x80008000, v0661; SDAG_GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v0662; SDAG_GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0663; SDAG_GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1664; SDAG_GFX7-NEXT: v_rndne_f32_e32 v0, v0665; SDAG_GFX7-NEXT: v_rndne_f32_e32 v1, v1666; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]667;668; SDAG_GFX8-LABEL: v_roundeven_v2f16_fneg:669; SDAG_GFX8: ; %bb.0:670; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)671; SDAG_GFX8-NEXT: v_rndne_f16_sdwa v1, -v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1672; SDAG_GFX8-NEXT: v_rndne_f16_e64 v0, -v0673; SDAG_GFX8-NEXT: v_or_b32_e32 v0, v0, v1674; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]675;676; SDAG_GFX9-LABEL: v_roundeven_v2f16_fneg:677; SDAG_GFX9: ; %bb.0:678; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)679; SDAG_GFX9-NEXT: v_rndne_f16_sdwa v1, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1680; SDAG_GFX9-NEXT: v_rndne_f16_e64 v0, -v0681; SDAG_GFX9-NEXT: v_pack_b32_f16 v0, v0, v1682; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]683;684; SDAG_GFX10-LABEL: v_roundeven_v2f16_fneg:685; SDAG_GFX10: ; %bb.0:686; SDAG_GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)687; SDAG_GFX10-NEXT: v_rndne_f16_sdwa v1, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1688; SDAG_GFX10-NEXT: v_rndne_f16_e64 v0, -v0689; SDAG_GFX10-NEXT: v_pack_b32_f16 v0, v0, v1690; SDAG_GFX10-NEXT: s_setpc_b64 s[30:31]691;692; SDAG_GFX11-TRUE16-LABEL: v_roundeven_v2f16_fneg:693; SDAG_GFX11-TRUE16: ; %bb.0:694; SDAG_GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)695; SDAG_GFX11-TRUE16-NEXT: v_rndne_f16_e64 v0.h, -v0.h696; SDAG_GFX11-TRUE16-NEXT: v_rndne_f16_e64 v0.l, -v0.l697; SDAG_GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h698; SDAG_GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]699;700; SDAG_GFX11-FAKE16-LABEL: v_roundeven_v2f16_fneg:701; SDAG_GFX11-FAKE16: ; %bb.0:702; SDAG_GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)703; SDAG_GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v0704; SDAG_GFX11-FAKE16-NEXT: v_rndne_f16_e64 v0, -v0705; SDAG_GFX11-FAKE16-NEXT: v_rndne_f16_e64 v1, -v1706; SDAG_GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v1707; SDAG_GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]708 %x.fneg = fneg <2 x half> %x709 %roundeven = call <2 x half> @llvm.roundeven.v2f16(<2 x half> %x.fneg)710 ret <2 x half> %roundeven711}712 713define <4 x half> @v_roundeven_v4f16(<4 x half> %x) {714; GFX6-LABEL: v_roundeven_v4f16:715; GFX6: ; %bb.0:716; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)717; GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0718; GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1719; GFX6-NEXT: v_cvt_f32_f16_e32 v2, v2720; GFX6-NEXT: v_cvt_f32_f16_e32 v3, v3721; GFX6-NEXT: v_rndne_f32_e32 v0, v0722; GFX6-NEXT: v_rndne_f32_e32 v1, v1723; GFX6-NEXT: v_rndne_f32_e32 v2, v2724; GFX6-NEXT: v_rndne_f32_e32 v3, v3725; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0726; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1727; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v2728; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v3729; GFX6-NEXT: s_setpc_b64 s[30:31]730;731; GFX7-LABEL: v_roundeven_v4f16:732; GFX7: ; %bb.0:733; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)734; GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0735; GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1736; GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2737; GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3738; GFX7-NEXT: v_rndne_f32_e32 v0, v0739; GFX7-NEXT: v_rndne_f32_e32 v1, v1740; GFX7-NEXT: v_rndne_f32_e32 v2, v2741; GFX7-NEXT: v_rndne_f32_e32 v3, v3742; GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0743; GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1744; GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2745; GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3746; GFX7-NEXT: s_setpc_b64 s[30:31]747;748; GFX8-LABEL: v_roundeven_v4f16:749; GFX8: ; %bb.0:750; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)751; GFX8-NEXT: v_rndne_f16_e32 v2, v0752; GFX8-NEXT: v_rndne_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1753; GFX8-NEXT: v_rndne_f16_e32 v3, v1754; GFX8-NEXT: v_rndne_f16_sdwa v1, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1755; GFX8-NEXT: v_or_b32_e32 v0, v2, v0756; GFX8-NEXT: v_or_b32_e32 v1, v3, v1757; GFX8-NEXT: s_setpc_b64 s[30:31]758;759; GFX9-LABEL: v_roundeven_v4f16:760; GFX9: ; %bb.0:761; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)762; GFX9-NEXT: v_rndne_f16_e32 v2, v0763; GFX9-NEXT: v_rndne_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1764; GFX9-NEXT: v_rndne_f16_e32 v3, v1765; GFX9-NEXT: v_rndne_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1766; GFX9-NEXT: v_pack_b32_f16 v0, v2, v0767; GFX9-NEXT: v_pack_b32_f16 v1, v3, v1768; GFX9-NEXT: s_setpc_b64 s[30:31]769;770; GFX10-LABEL: v_roundeven_v4f16:771; GFX10: ; %bb.0:772; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)773; GFX10-NEXT: v_rndne_f16_e32 v2, v0774; GFX10-NEXT: v_rndne_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1775; GFX10-NEXT: v_rndne_f16_e32 v3, v1776; GFX10-NEXT: v_rndne_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1777; GFX10-NEXT: v_pack_b32_f16 v0, v2, v0778; GFX10-NEXT: v_pack_b32_f16 v1, v3, v1779; GFX10-NEXT: s_setpc_b64 s[30:31]780;781; GFX11-TRUE16-LABEL: v_roundeven_v4f16:782; GFX11-TRUE16: ; %bb.0:783; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)784; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l785; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.h, v0.h786; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v1.l, v1.l787; GFX11-TRUE16-NEXT: v_rndne_f16_e32 v1.h, v1.h788; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h789; GFX11-TRUE16-NEXT: v_pack_b32_f16 v1, v1.l, v1.h790; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]791;792; GFX11-FAKE16-LABEL: v_roundeven_v4f16:793; GFX11-FAKE16: ; %bb.0:794; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)795; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0796; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1797; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v0, v0798; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v1, v1799; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v2, v2800; GFX11-FAKE16-NEXT: v_rndne_f16_e32 v3, v3801; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v2802; GFX11-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v3803; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]804;805; SDAG_GFX6-LABEL: v_roundeven_v4f16:806; SDAG_GFX6: ; %bb.0:807; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)808; SDAG_GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0809; SDAG_GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1810; SDAG_GFX6-NEXT: v_cvt_f16_f32_e32 v2, v2811; SDAG_GFX6-NEXT: v_cvt_f16_f32_e32 v3, v3812; SDAG_GFX6-NEXT: v_cvt_f32_f16_e32 v0, v0813; SDAG_GFX6-NEXT: v_cvt_f32_f16_e32 v1, v1814; SDAG_GFX6-NEXT: v_cvt_f32_f16_e32 v2, v2815; SDAG_GFX6-NEXT: v_cvt_f32_f16_e32 v3, v3816; SDAG_GFX6-NEXT: v_rndne_f32_e32 v0, v0817; SDAG_GFX6-NEXT: v_rndne_f32_e32 v1, v1818; SDAG_GFX6-NEXT: v_rndne_f32_e32 v2, v2819; SDAG_GFX6-NEXT: v_rndne_f32_e32 v3, v3820; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]821;822; SDAG_GFX7-LABEL: v_roundeven_v4f16:823; SDAG_GFX7: ; %bb.0:824; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)825; SDAG_GFX7-NEXT: v_cvt_f16_f32_e32 v0, v0826; SDAG_GFX7-NEXT: v_cvt_f16_f32_e32 v1, v1827; SDAG_GFX7-NEXT: v_cvt_f16_f32_e32 v2, v2828; SDAG_GFX7-NEXT: v_cvt_f16_f32_e32 v3, v3829; SDAG_GFX7-NEXT: v_cvt_f32_f16_e32 v0, v0830; SDAG_GFX7-NEXT: v_cvt_f32_f16_e32 v1, v1831; SDAG_GFX7-NEXT: v_cvt_f32_f16_e32 v2, v2832; SDAG_GFX7-NEXT: v_cvt_f32_f16_e32 v3, v3833; SDAG_GFX7-NEXT: v_rndne_f32_e32 v0, v0834; SDAG_GFX7-NEXT: v_rndne_f32_e32 v1, v1835; SDAG_GFX7-NEXT: v_rndne_f32_e32 v2, v2836; SDAG_GFX7-NEXT: v_rndne_f32_e32 v3, v3837; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]838;839; SDAG_GFX8-LABEL: v_roundeven_v4f16:840; SDAG_GFX8: ; %bb.0:841; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)842; SDAG_GFX8-NEXT: v_rndne_f16_sdwa v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1843; SDAG_GFX8-NEXT: v_rndne_f16_sdwa v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1844; SDAG_GFX8-NEXT: v_rndne_f16_e32 v1, v1845; SDAG_GFX8-NEXT: v_rndne_f16_e32 v0, v0846; SDAG_GFX8-NEXT: v_or_b32_e32 v0, v0, v3847; SDAG_GFX8-NEXT: v_or_b32_e32 v1, v1, v2848; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]849;850; SDAG_GFX9-LABEL: v_roundeven_v4f16:851; SDAG_GFX9: ; %bb.0:852; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)853; SDAG_GFX9-NEXT: v_rndne_f16_sdwa v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1854; SDAG_GFX9-NEXT: v_rndne_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1855; SDAG_GFX9-NEXT: v_rndne_f16_e32 v1, v1856; SDAG_GFX9-NEXT: v_rndne_f16_e32 v0, v0857; SDAG_GFX9-NEXT: v_pack_b32_f16 v0, v0, v3858; SDAG_GFX9-NEXT: v_pack_b32_f16 v1, v1, v2859; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]860;861; SDAG_GFX10-LABEL: v_roundeven_v4f16:862; SDAG_GFX10: ; %bb.0:863; SDAG_GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)864; SDAG_GFX10-NEXT: v_rndne_f16_sdwa v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1865; SDAG_GFX10-NEXT: v_rndne_f16_sdwa v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1866; SDAG_GFX10-NEXT: v_rndne_f16_e32 v0, v0867; SDAG_GFX10-NEXT: v_rndne_f16_e32 v1, v1868; SDAG_GFX10-NEXT: v_pack_b32_f16 v0, v0, v3869; SDAG_GFX10-NEXT: v_pack_b32_f16 v1, v1, v2870; SDAG_GFX10-NEXT: s_setpc_b64 s[30:31]871;872; SDAG_GFX11-TRUE16-LABEL: v_roundeven_v4f16:873; SDAG_GFX11-TRUE16: ; %bb.0:874; SDAG_GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)875; SDAG_GFX11-TRUE16-NEXT: v_rndne_f16_e32 v1.h, v1.h876; SDAG_GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.h, v0.h877; SDAG_GFX11-TRUE16-NEXT: v_rndne_f16_e32 v0.l, v0.l878; SDAG_GFX11-TRUE16-NEXT: v_rndne_f16_e32 v1.l, v1.l879; SDAG_GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.l, v0.h880; SDAG_GFX11-TRUE16-NEXT: v_pack_b32_f16 v1, v1.l, v1.h881; SDAG_GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]882;883; SDAG_GFX11-FAKE16-LABEL: v_roundeven_v4f16:884; SDAG_GFX11-FAKE16: ; %bb.0:885; SDAG_GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)886; SDAG_GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v0887; SDAG_GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v1888; SDAG_GFX11-FAKE16-NEXT: v_rndne_f16_e32 v1, v1889; SDAG_GFX11-FAKE16-NEXT: v_rndne_f16_e32 v0, v0890; SDAG_GFX11-FAKE16-NEXT: v_rndne_f16_e32 v2, v2891; SDAG_GFX11-FAKE16-NEXT: v_rndne_f16_e32 v3, v3892; SDAG_GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v0, v2893; SDAG_GFX11-FAKE16-NEXT: v_pack_b32_f16 v1, v1, v3894; SDAG_GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]895 %roundeven = call <4 x half> @llvm.roundeven.v4f16(<4 x half> %x)896 ret <4 x half> %roundeven897}898 899 900define float @v_roundeven_f32_fabs(float %x) {901; GFX6-LABEL: v_roundeven_f32_fabs:902; GFX6: ; %bb.0:903; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)904; GFX6-NEXT: v_rndne_f32_e64 v0, |v0|905; GFX6-NEXT: s_setpc_b64 s[30:31]906;907; GFX7-LABEL: v_roundeven_f32_fabs:908; GFX7: ; %bb.0:909; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)910; GFX7-NEXT: v_rndne_f32_e64 v0, |v0|911; GFX7-NEXT: s_setpc_b64 s[30:31]912;913; GFX8-LABEL: v_roundeven_f32_fabs:914; GFX8: ; %bb.0:915; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)916; GFX8-NEXT: v_rndne_f32_e64 v0, |v0|917; GFX8-NEXT: s_setpc_b64 s[30:31]918;919; GFX9-LABEL: v_roundeven_f32_fabs:920; GFX9: ; %bb.0:921; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)922; GFX9-NEXT: v_rndne_f32_e64 v0, |v0|923; GFX9-NEXT: s_setpc_b64 s[30:31]924;925; GFX10PLUS-LABEL: v_roundeven_f32_fabs:926; GFX10PLUS: ; %bb.0:927; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)928; GFX10PLUS-NEXT: v_rndne_f32_e64 v0, |v0|929; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]930;931; SDAG_GFX6-LABEL: v_roundeven_f32_fabs:932; SDAG_GFX6: ; %bb.0:933; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)934; SDAG_GFX6-NEXT: v_rndne_f32_e64 v0, |v0|935; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]936;937; SDAG_GFX7-LABEL: v_roundeven_f32_fabs:938; SDAG_GFX7: ; %bb.0:939; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)940; SDAG_GFX7-NEXT: v_rndne_f32_e64 v0, |v0|941; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]942;943; SDAG_GFX8-LABEL: v_roundeven_f32_fabs:944; SDAG_GFX8: ; %bb.0:945; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)946; SDAG_GFX8-NEXT: v_rndne_f32_e64 v0, |v0|947; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]948;949; SDAG_GFX9-LABEL: v_roundeven_f32_fabs:950; SDAG_GFX9: ; %bb.0:951; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)952; SDAG_GFX9-NEXT: v_rndne_f32_e64 v0, |v0|953; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]954;955; SDAG_GFX10PLUS-LABEL: v_roundeven_f32_fabs:956; SDAG_GFX10PLUS: ; %bb.0:957; SDAG_GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)958; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e64 v0, |v0|959; SDAG_GFX10PLUS-NEXT: s_setpc_b64 s[30:31]960 %fabs.x = call float @llvm.fabs.f32(float %x)961 %roundeven = call float @llvm.roundeven.f32(float %fabs.x)962 ret float %roundeven963}964 965define amdgpu_ps float @s_roundeven_f32(float inreg %x) {966; GFX6-LABEL: s_roundeven_f32:967; GFX6: ; %bb.0:968; GFX6-NEXT: v_rndne_f32_e32 v0, s0969; GFX6-NEXT: ; return to shader part epilog970;971; GFX7-LABEL: s_roundeven_f32:972; GFX7: ; %bb.0:973; GFX7-NEXT: v_rndne_f32_e32 v0, s0974; GFX7-NEXT: ; return to shader part epilog975;976; GFX8-LABEL: s_roundeven_f32:977; GFX8: ; %bb.0:978; GFX8-NEXT: v_rndne_f32_e32 v0, s0979; GFX8-NEXT: ; return to shader part epilog980;981; GFX9-LABEL: s_roundeven_f32:982; GFX9: ; %bb.0:983; GFX9-NEXT: v_rndne_f32_e32 v0, s0984; GFX9-NEXT: ; return to shader part epilog985;986; GFX10PLUS-LABEL: s_roundeven_f32:987; GFX10PLUS: ; %bb.0:988; GFX10PLUS-NEXT: v_rndne_f32_e32 v0, s0989; GFX10PLUS-NEXT: ; return to shader part epilog990;991; SDAG_GFX6-LABEL: s_roundeven_f32:992; SDAG_GFX6: ; %bb.0:993; SDAG_GFX6-NEXT: v_rndne_f32_e32 v0, s0994; SDAG_GFX6-NEXT: ; return to shader part epilog995;996; SDAG_GFX7-LABEL: s_roundeven_f32:997; SDAG_GFX7: ; %bb.0:998; SDAG_GFX7-NEXT: v_rndne_f32_e32 v0, s0999; SDAG_GFX7-NEXT: ; return to shader part epilog1000;1001; SDAG_GFX8-LABEL: s_roundeven_f32:1002; SDAG_GFX8: ; %bb.0:1003; SDAG_GFX8-NEXT: v_rndne_f32_e32 v0, s01004; SDAG_GFX8-NEXT: ; return to shader part epilog1005;1006; SDAG_GFX9-LABEL: s_roundeven_f32:1007; SDAG_GFX9: ; %bb.0:1008; SDAG_GFX9-NEXT: v_rndne_f32_e32 v0, s01009; SDAG_GFX9-NEXT: ; return to shader part epilog1010;1011; SDAG_GFX10PLUS-LABEL: s_roundeven_f32:1012; SDAG_GFX10PLUS: ; %bb.0:1013; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e32 v0, s01014; SDAG_GFX10PLUS-NEXT: ; return to shader part epilog1015 %roundeven = call float @llvm.roundeven.f32(float %x)1016 ret float %roundeven1017}1018 1019define float @v_roundeven_f32_fneg(float %x) {1020; GFX6-LABEL: v_roundeven_f32_fneg:1021; GFX6: ; %bb.0:1022; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1023; GFX6-NEXT: v_rndne_f32_e64 v0, -v01024; GFX6-NEXT: s_setpc_b64 s[30:31]1025;1026; GFX7-LABEL: v_roundeven_f32_fneg:1027; GFX7: ; %bb.0:1028; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1029; GFX7-NEXT: v_rndne_f32_e64 v0, -v01030; GFX7-NEXT: s_setpc_b64 s[30:31]1031;1032; GFX8-LABEL: v_roundeven_f32_fneg:1033; GFX8: ; %bb.0:1034; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1035; GFX8-NEXT: v_rndne_f32_e64 v0, -v01036; GFX8-NEXT: s_setpc_b64 s[30:31]1037;1038; GFX9-LABEL: v_roundeven_f32_fneg:1039; GFX9: ; %bb.0:1040; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1041; GFX9-NEXT: v_rndne_f32_e64 v0, -v01042; GFX9-NEXT: s_setpc_b64 s[30:31]1043;1044; GFX10PLUS-LABEL: v_roundeven_f32_fneg:1045; GFX10PLUS: ; %bb.0:1046; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1047; GFX10PLUS-NEXT: v_rndne_f32_e64 v0, -v01048; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]1049;1050; SDAG_GFX6-LABEL: v_roundeven_f32_fneg:1051; SDAG_GFX6: ; %bb.0:1052; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1053; SDAG_GFX6-NEXT: v_rndne_f32_e64 v0, -v01054; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]1055;1056; SDAG_GFX7-LABEL: v_roundeven_f32_fneg:1057; SDAG_GFX7: ; %bb.0:1058; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1059; SDAG_GFX7-NEXT: v_rndne_f32_e64 v0, -v01060; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]1061;1062; SDAG_GFX8-LABEL: v_roundeven_f32_fneg:1063; SDAG_GFX8: ; %bb.0:1064; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1065; SDAG_GFX8-NEXT: v_rndne_f32_e64 v0, -v01066; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]1067;1068; SDAG_GFX9-LABEL: v_roundeven_f32_fneg:1069; SDAG_GFX9: ; %bb.0:1070; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1071; SDAG_GFX9-NEXT: v_rndne_f32_e64 v0, -v01072; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]1073;1074; SDAG_GFX10PLUS-LABEL: v_roundeven_f32_fneg:1075; SDAG_GFX10PLUS: ; %bb.0:1076; SDAG_GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1077; SDAG_GFX10PLUS-NEXT: v_rndne_f32_e64 v0, -v01078; SDAG_GFX10PLUS-NEXT: s_setpc_b64 s[30:31]1079 %neg.x = fneg float %x1080 %roundeven = call float @llvm.roundeven.f32(float %neg.x)1081 ret float %roundeven1082}1083 1084define double @v_roundeven_f64(double %x) {1085; GFX6-LABEL: v_roundeven_f64:1086; GFX6: ; %bb.0:1087; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1088; GFX6-NEXT: v_and_b32_e32 v3, 0x80000000, v11089; GFX6-NEXT: v_mov_b32_e32 v2, 01090; GFX6-NEXT: v_or_b32_e32 v3, 0x43300000, v31091; GFX6-NEXT: v_add_f64 v[4:5], v[0:1], v[2:3]1092; GFX6-NEXT: v_mov_b32_e32 v6, -11093; GFX6-NEXT: v_mov_b32_e32 v7, 0x432fffff1094; GFX6-NEXT: v_add_f64 v[2:3], v[4:5], -v[2:3]1095; GFX6-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, v[6:7]1096; GFX6-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc1097; GFX6-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc1098; GFX6-NEXT: s_setpc_b64 s[30:31]1099;1100; GFX7-LABEL: v_roundeven_f64:1101; GFX7: ; %bb.0:1102; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1103; GFX7-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1104; GFX7-NEXT: s_setpc_b64 s[30:31]1105;1106; GFX8-LABEL: v_roundeven_f64:1107; GFX8: ; %bb.0:1108; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1109; GFX8-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1110; GFX8-NEXT: s_setpc_b64 s[30:31]1111;1112; GFX9-LABEL: v_roundeven_f64:1113; GFX9: ; %bb.0:1114; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1115; GFX9-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1116; GFX9-NEXT: s_setpc_b64 s[30:31]1117;1118; GFX10PLUS-LABEL: v_roundeven_f64:1119; GFX10PLUS: ; %bb.0:1120; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1121; GFX10PLUS-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1122; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]1123;1124; SDAG_GFX6-LABEL: v_roundeven_f64:1125; SDAG_GFX6: ; %bb.0:1126; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1127; SDAG_GFX6-NEXT: s_brev_b32 s6, -21128; SDAG_GFX6-NEXT: v_mov_b32_e32 v2, 0x433000001129; SDAG_GFX6-NEXT: v_bfi_b32 v3, s6, v2, v11130; SDAG_GFX6-NEXT: v_mov_b32_e32 v2, 01131; SDAG_GFX6-NEXT: s_mov_b32 s4, -11132; SDAG_GFX6-NEXT: v_add_f64 v[4:5], v[0:1], v[2:3]1133; SDAG_GFX6-NEXT: s_mov_b32 s5, 0x432fffff1134; SDAG_GFX6-NEXT: v_add_f64 v[2:3], v[4:5], -v[2:3]1135; SDAG_GFX6-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[4:5]1136; SDAG_GFX6-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc1137; SDAG_GFX6-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc1138; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]1139;1140; SDAG_GFX7-LABEL: v_roundeven_f64:1141; SDAG_GFX7: ; %bb.0:1142; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1143; SDAG_GFX7-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1144; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]1145;1146; SDAG_GFX8-LABEL: v_roundeven_f64:1147; SDAG_GFX8: ; %bb.0:1148; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1149; SDAG_GFX8-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1150; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]1151;1152; SDAG_GFX9-LABEL: v_roundeven_f64:1153; SDAG_GFX9: ; %bb.0:1154; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1155; SDAG_GFX9-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1156; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]1157;1158; SDAG_GFX10PLUS-LABEL: v_roundeven_f64:1159; SDAG_GFX10PLUS: ; %bb.0:1160; SDAG_GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1161; SDAG_GFX10PLUS-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1162; SDAG_GFX10PLUS-NEXT: s_setpc_b64 s[30:31]1163 %roundeven = call double @llvm.roundeven.f64(double %x)1164 ret double %roundeven1165}1166 1167define double @v_roundeven_f64_fneg(double %x) {1168; GFX6-LABEL: v_roundeven_f64_fneg:1169; GFX6: ; %bb.0:1170; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1171; GFX6-NEXT: v_xor_b32_e32 v8, 0x80000000, v11172; GFX6-NEXT: v_and_b32_e32 v3, 0x80000000, v81173; GFX6-NEXT: v_mov_b32_e32 v2, 01174; GFX6-NEXT: v_or_b32_e32 v3, 0x43300000, v31175; GFX6-NEXT: v_add_f64 v[4:5], -v[0:1], v[2:3]1176; GFX6-NEXT: v_mov_b32_e32 v6, -11177; GFX6-NEXT: v_mov_b32_e32 v7, 0x432fffff1178; GFX6-NEXT: v_add_f64 v[2:3], v[4:5], -v[2:3]1179; GFX6-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, v[6:7]1180; GFX6-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc1181; GFX6-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc1182; GFX6-NEXT: s_setpc_b64 s[30:31]1183;1184; GFX7-LABEL: v_roundeven_f64_fneg:1185; GFX7: ; %bb.0:1186; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1187; GFX7-NEXT: v_rndne_f64_e64 v[0:1], -v[0:1]1188; GFX7-NEXT: s_setpc_b64 s[30:31]1189;1190; GFX8-LABEL: v_roundeven_f64_fneg:1191; GFX8: ; %bb.0:1192; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1193; GFX8-NEXT: v_rndne_f64_e64 v[0:1], -v[0:1]1194; GFX8-NEXT: s_setpc_b64 s[30:31]1195;1196; GFX9-LABEL: v_roundeven_f64_fneg:1197; GFX9: ; %bb.0:1198; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1199; GFX9-NEXT: v_rndne_f64_e64 v[0:1], -v[0:1]1200; GFX9-NEXT: s_setpc_b64 s[30:31]1201;1202; GFX10PLUS-LABEL: v_roundeven_f64_fneg:1203; GFX10PLUS: ; %bb.0:1204; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1205; GFX10PLUS-NEXT: v_rndne_f64_e64 v[0:1], -v[0:1]1206; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]1207;1208; SDAG_GFX6-LABEL: v_roundeven_f64_fneg:1209; SDAG_GFX6: ; %bb.0:1210; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1211; SDAG_GFX6-NEXT: v_xor_b32_e32 v6, 0x80000000, v11212; SDAG_GFX6-NEXT: s_brev_b32 s4, -21213; SDAG_GFX6-NEXT: v_mov_b32_e32 v2, 0x433000001214; SDAG_GFX6-NEXT: v_bfi_b32 v3, s4, v2, v61215; SDAG_GFX6-NEXT: v_mov_b32_e32 v2, 01216; SDAG_GFX6-NEXT: v_add_f64 v[4:5], -v[0:1], v[2:3]1217; SDAG_GFX6-NEXT: s_mov_b32 s4, -11218; SDAG_GFX6-NEXT: s_mov_b32 s5, 0x432fffff1219; SDAG_GFX6-NEXT: v_add_f64 v[2:3], v[4:5], -v[2:3]1220; SDAG_GFX6-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[4:5]1221; SDAG_GFX6-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc1222; SDAG_GFX6-NEXT: v_cndmask_b32_e32 v1, v3, v6, vcc1223; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]1224;1225; SDAG_GFX7-LABEL: v_roundeven_f64_fneg:1226; SDAG_GFX7: ; %bb.0:1227; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1228; SDAG_GFX7-NEXT: v_rndne_f64_e64 v[0:1], -v[0:1]1229; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]1230;1231; SDAG_GFX8-LABEL: v_roundeven_f64_fneg:1232; SDAG_GFX8: ; %bb.0:1233; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1234; SDAG_GFX8-NEXT: v_rndne_f64_e64 v[0:1], -v[0:1]1235; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]1236;1237; SDAG_GFX9-LABEL: v_roundeven_f64_fneg:1238; SDAG_GFX9: ; %bb.0:1239; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1240; SDAG_GFX9-NEXT: v_rndne_f64_e64 v[0:1], -v[0:1]1241; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]1242;1243; SDAG_GFX10PLUS-LABEL: v_roundeven_f64_fneg:1244; SDAG_GFX10PLUS: ; %bb.0:1245; SDAG_GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1246; SDAG_GFX10PLUS-NEXT: v_rndne_f64_e64 v[0:1], -v[0:1]1247; SDAG_GFX10PLUS-NEXT: s_setpc_b64 s[30:31]1248 %neg.x = fneg double %x1249 %roundeven = call double @llvm.roundeven.f64(double %neg.x)1250 ret double %roundeven1251}1252 1253define <2 x double> @v_roundeven_v2f64(<2 x double> %x) {1254; GFX6-LABEL: v_roundeven_v2f64:1255; GFX6: ; %bb.0:1256; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1257; GFX6-NEXT: v_and_b32_e32 v5, 0x80000000, v11258; GFX6-NEXT: v_mov_b32_e32 v4, 01259; GFX6-NEXT: v_or_b32_e32 v5, 0x43300000, v51260; GFX6-NEXT: v_add_f64 v[6:7], v[0:1], v[4:5]1261; GFX6-NEXT: v_mov_b32_e32 v8, -11262; GFX6-NEXT: v_mov_b32_e32 v9, 0x432fffff1263; GFX6-NEXT: v_add_f64 v[5:6], v[6:7], -v[4:5]1264; GFX6-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, v[8:9]1265; GFX6-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc1266; GFX6-NEXT: v_and_b32_e32 v5, 0x80000000, v31267; GFX6-NEXT: v_or_b32_e32 v5, 0x43300000, v51268; GFX6-NEXT: v_add_f64 v[10:11], v[2:3], v[4:5]1269; GFX6-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc1270; GFX6-NEXT: v_add_f64 v[4:5], v[10:11], -v[4:5]1271; GFX6-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, v[8:9]1272; GFX6-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc1273; GFX6-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc1274; GFX6-NEXT: s_setpc_b64 s[30:31]1275;1276; GFX7-LABEL: v_roundeven_v2f64:1277; GFX7: ; %bb.0:1278; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1279; GFX7-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1280; GFX7-NEXT: v_rndne_f64_e32 v[2:3], v[2:3]1281; GFX7-NEXT: s_setpc_b64 s[30:31]1282;1283; GFX8-LABEL: v_roundeven_v2f64:1284; GFX8: ; %bb.0:1285; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1286; GFX8-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1287; GFX8-NEXT: v_rndne_f64_e32 v[2:3], v[2:3]1288; GFX8-NEXT: s_setpc_b64 s[30:31]1289;1290; GFX9-LABEL: v_roundeven_v2f64:1291; GFX9: ; %bb.0:1292; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1293; GFX9-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1294; GFX9-NEXT: v_rndne_f64_e32 v[2:3], v[2:3]1295; GFX9-NEXT: s_setpc_b64 s[30:31]1296;1297; GFX10PLUS-LABEL: v_roundeven_v2f64:1298; GFX10PLUS: ; %bb.0:1299; GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1300; GFX10PLUS-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1301; GFX10PLUS-NEXT: v_rndne_f64_e32 v[2:3], v[2:3]1302; GFX10PLUS-NEXT: s_setpc_b64 s[30:31]1303;1304; SDAG_GFX6-LABEL: v_roundeven_v2f64:1305; SDAG_GFX6: ; %bb.0:1306; SDAG_GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1307; SDAG_GFX6-NEXT: s_brev_b32 s6, -21308; SDAG_GFX6-NEXT: v_mov_b32_e32 v8, 0x433000001309; SDAG_GFX6-NEXT: v_bfi_b32 v5, s6, v8, v11310; SDAG_GFX6-NEXT: v_mov_b32_e32 v4, 01311; SDAG_GFX6-NEXT: v_add_f64 v[6:7], v[0:1], v[4:5]1312; SDAG_GFX6-NEXT: s_mov_b32 s4, -11313; SDAG_GFX6-NEXT: s_mov_b32 s5, 0x432fffff1314; SDAG_GFX6-NEXT: v_add_f64 v[5:6], v[6:7], -v[4:5]1315; SDAG_GFX6-NEXT: v_cmp_gt_f64_e64 vcc, |v[0:1]|, s[4:5]1316; SDAG_GFX6-NEXT: v_cndmask_b32_e32 v0, v5, v0, vcc1317; SDAG_GFX6-NEXT: v_bfi_b32 v5, s6, v8, v31318; SDAG_GFX6-NEXT: v_add_f64 v[7:8], v[2:3], v[4:5]1319; SDAG_GFX6-NEXT: v_cndmask_b32_e32 v1, v6, v1, vcc1320; SDAG_GFX6-NEXT: v_add_f64 v[4:5], v[7:8], -v[4:5]1321; SDAG_GFX6-NEXT: v_cmp_gt_f64_e64 vcc, |v[2:3]|, s[4:5]1322; SDAG_GFX6-NEXT: v_cndmask_b32_e32 v2, v4, v2, vcc1323; SDAG_GFX6-NEXT: v_cndmask_b32_e32 v3, v5, v3, vcc1324; SDAG_GFX6-NEXT: s_setpc_b64 s[30:31]1325;1326; SDAG_GFX7-LABEL: v_roundeven_v2f64:1327; SDAG_GFX7: ; %bb.0:1328; SDAG_GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1329; SDAG_GFX7-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1330; SDAG_GFX7-NEXT: v_rndne_f64_e32 v[2:3], v[2:3]1331; SDAG_GFX7-NEXT: s_setpc_b64 s[30:31]1332;1333; SDAG_GFX8-LABEL: v_roundeven_v2f64:1334; SDAG_GFX8: ; %bb.0:1335; SDAG_GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1336; SDAG_GFX8-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1337; SDAG_GFX8-NEXT: v_rndne_f64_e32 v[2:3], v[2:3]1338; SDAG_GFX8-NEXT: s_setpc_b64 s[30:31]1339;1340; SDAG_GFX9-LABEL: v_roundeven_v2f64:1341; SDAG_GFX9: ; %bb.0:1342; SDAG_GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1343; SDAG_GFX9-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1344; SDAG_GFX9-NEXT: v_rndne_f64_e32 v[2:3], v[2:3]1345; SDAG_GFX9-NEXT: s_setpc_b64 s[30:31]1346;1347; SDAG_GFX10PLUS-LABEL: v_roundeven_v2f64:1348; SDAG_GFX10PLUS: ; %bb.0:1349; SDAG_GFX10PLUS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1350; SDAG_GFX10PLUS-NEXT: v_rndne_f64_e32 v[0:1], v[0:1]1351; SDAG_GFX10PLUS-NEXT: v_rndne_f64_e32 v[2:3], v[2:3]1352; SDAG_GFX10PLUS-NEXT: s_setpc_b64 s[30:31]1353 %roundeven = call <2 x double> @llvm.roundeven.v2f64(<2 x double> %x)1354 ret <2 x double> %roundeven1355}1356 1357declare half @llvm.roundeven.f16(half) #01358declare <2 x half> @llvm.roundeven.v2f16(<2 x half>) #01359declare <4 x half> @llvm.roundeven.v4f16(<4 x half>) #01360 1361declare float @llvm.roundeven.f32(float) #01362declare <2 x float> @llvm.roundeven.v2f32(<2 x float>) #01363declare <3 x float> @llvm.roundeven.v3f32(<3 x float>) #01364declare <4 x float> @llvm.roundeven.v4f32(<4 x float>) #01365 1366declare double @llvm.roundeven.f64(double) #01367declare <2 x double> @llvm.roundeven.v2f64(<2 x double>) #01368 1369declare half @llvm.fabs.f16(half) #01370declare float @llvm.fabs.f32(float) #01371 1372attributes #0 = { nounwind readnone speculatable willreturn }1373;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:1374; GFX11: {{.*}}1375; SDAG_GFX11: {{.*}}1376