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1; RUN: llc -mtriple=amdgcn--amdpal -mcpu=tahiti < %s | FileCheck -check-prefix=SI %s2; RUN: llc -mtriple=amdgcn--amdpal -mcpu=tonga -mattr=-flat-for-global,-xnack < %s | FileCheck -check-prefix=SI %s3 4; TODO: Some of those tests fail with OS == amdhsa due to unreasonable register5; allocation differences.6 7; SI-LABEL: {{^}}s_addk_i32_k0:8; SI: s_load_dword [[VAL:s[0-9]+]]9; SI: s_addk_i32 [[VAL]], 0x4110; SI: v_mov_b32_e32 [[VRESULT:v[0-9]+]], [[VAL]]11; SI: buffer_store_dword [[VRESULT]]12; SI: s_endpgm13define amdgpu_kernel void @s_addk_i32_k0(ptr addrspace(1) %out, i32 %b) #0 {14 %add = add i32 %b, 6515 store i32 %add, ptr addrspace(1) %out16 ret void17}18 19; SI-LABEL: {{^}}s_addk_i32_k0_x2:20; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4121; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4122; SI: s_endpgm23define amdgpu_kernel void @s_addk_i32_k0_x2(ptr addrspace(1) %out0, ptr addrspace(1) %out1, i32 %a, i32 %b) #0 {24 %add0 = add i32 %a, 6525 %add1 = add i32 %b, 6526 store i32 %add0, ptr addrspace(1) %out027 store i32 %add1, ptr addrspace(1) %out128 ret void29}30 31; SI-LABEL: {{^}}s_addk_i32_k1:32; SI: s_addk_i32 {{s[0-9]+}}, 0x7fff{{$}}33; SI: s_endpgm34define amdgpu_kernel void @s_addk_i32_k1(ptr addrspace(1) %out, i32 %b) #0 {35 %add = add i32 %b, 32767 ; (1 << 15) - 136 store i32 %add, ptr addrspace(1) %out37 ret void38}39 40; SI-LABEL: {{^}}s_addk_i32_k2:41; SI: s_sub_i32 s{{[0-9]+}}, s{{[0-9]+}}, 1742; SI: s_endpgm43define amdgpu_kernel void @s_addk_i32_k2(ptr addrspace(1) %out, i32 %b) #0 {44 %add = add i32 %b, -1745 store i32 %add, ptr addrspace(1) %out46 ret void47}48 49; SI-LABEL: {{^}}s_addk_i32_k3:50; SI: s_addk_i32 {{s[0-9]+}}, 0xffbf{{$}}51; SI: s_endpgm52define amdgpu_kernel void @s_addk_i32_k3(ptr addrspace(1) %out, i32 %b) #0 {53 %add = add i32 %b, -6554 store i32 %add, ptr addrspace(1) %out55 ret void56}57 58; SI-LABEL: {{^}}s_addk_v2i32_k0:59; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4160; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4261; SI: s_endpgm62; Note: dummy argument here to prevent combining of descriptor loads for %out and %b63define amdgpu_kernel void @s_addk_v2i32_k0(ptr addrspace(1) %out, i32 %dummy, <2 x i32> %b) #0 {64 %add = add <2 x i32> %b, <i32 65, i32 66>65 store <2 x i32> %add, ptr addrspace(1) %out66 ret void67}68 69; SI-LABEL: {{^}}s_addk_v4i32_k0:70; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4171; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4272; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4373; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4474; SI: s_endpgm75define amdgpu_kernel void @s_addk_v4i32_k0(ptr addrspace(1) %out, <4 x i32> %b) #0 {76 %add = add <4 x i32> %b, <i32 65, i32 66, i32 67, i32 68>77 store <4 x i32> %add, ptr addrspace(1) %out78 ret void79}80 81; SI-LABEL: {{^}}s_addk_v8i32_k0:82; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4183; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4284; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4385; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4486; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4587; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4688; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4789; SI-DAG: s_addk_i32 {{s[0-9]+}}, 0x4890; SI: s_endpgm91define amdgpu_kernel void @s_addk_v8i32_k0(ptr addrspace(1) %out, <8 x i32> %b) #0 {92 %add = add <8 x i32> %b, <i32 65, i32 66, i32 67, i32 68, i32 69, i32 70, i32 71, i32 72>93 store <8 x i32> %add, ptr addrspace(1) %out94 ret void95}96 97; SI-LABEL: {{^}}no_s_addk_i32_k0:98; SI: s_add_i32 {{s[0-9]+}}, {{s[0-9]+}}, 0x8000{{$}}99; SI: s_endpgm100define amdgpu_kernel void @no_s_addk_i32_k0(ptr addrspace(1) %out, i32 %b) #0 {101 %add = add i32 %b, 32768 ; 1 << 15102 store i32 %add, ptr addrspace(1) %out103 ret void104}105 106@lds = addrspace(3) global [512 x i32] poison, align 4107 108; SI-LABEL: {{^}}commute_s_addk_i32:109; SI: s_addk_i32 s{{[0-9]+}}, 0x800{{$}}110define amdgpu_kernel void @commute_s_addk_i32(ptr addrspace(1) %out, i32 %b) #0 {111 %size = call i32 @llvm.amdgcn.groupstaticsize()112 %add = add i32 %size, %b113 call void asm sideeffect "; foo $0, $1", "v,s"(ptr addrspace(3) @lds, i32 %add)114 ret void115}116 117declare i32 @llvm.amdgcn.groupstaticsize() #1118 119attributes #0 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }120attributes #1 = { nounwind readnone }121