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1; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn < %s | FileCheck -check-prefix=SI %s2; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=SI %s3 4; SI-LABEL: {{^}}s_movk_i32_k0:5; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],6; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0xffff, v[[LO_VREG]]7; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 1, v[[HI_VREG]]8; SI: s_endpgm9define amdgpu_kernel void @s_movk_i32_k0(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {10 %loada = load i64, ptr addrspace(1) %a, align 411 %or = or i64 %loada, 4295032831 ; ((1 << 16) - 1) | (1 << 32)12 store i64 %or, ptr addrspace(1) %out13 call void asm sideeffect "; use $0", "s"(i64 4295032831)14 ret void15}16 17; SI-LABEL: {{^}}s_movk_i32_k1:18; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],19; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x7fff, v[[LO_VREG]]20; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 1, v[[HI_VREG]]21; SI: s_endpgm22define amdgpu_kernel void @s_movk_i32_k1(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {23 %loada = load i64, ptr addrspace(1) %a, align 424 %or = or i64 %loada, 4295000063 ; ((1 << 15) - 1) | (1 << 32)25 store i64 %or, ptr addrspace(1) %out26 call void asm sideeffect "; use $0", "s"(i64 4295000063)27 ret void28}29 30; SI-LABEL: {{^}}s_movk_i32_k2:31; SI-DAG: s_movk_i32 [[LO_S_IMM:s[0-9]+]], 0x7fff{{$}}32; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],33; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x7fff, v[[LO_VREG]]34; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 64, v[[HI_VREG]]35; SI: s_endpgm36define amdgpu_kernel void @s_movk_i32_k2(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {37 %loada = load i64, ptr addrspace(1) %a, align 438 %or = or i64 %loada, 274877939711 ; ((1 << 15) - 1) | (64 << 32)39 store i64 %or, ptr addrspace(1) %out40 call void asm sideeffect "; use $0", "s"(i64 274877939711)41 ret void42}43 44; SI-LABEL: {{^}}s_movk_i32_k3:45; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],46; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x8000, v[[LO_VREG]]47; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 1, v[[HI_VREG]]48; SI: s_endpgm49define amdgpu_kernel void @s_movk_i32_k3(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {50 %loada = load i64, ptr addrspace(1) %a, align 451 %or = or i64 %loada, 4295000064 ; (1 << 15) | (1 << 32)52 store i64 %or, ptr addrspace(1) %out53 call void asm sideeffect "; use $0", "s"(i64 4295000064)54 ret void55}56 57; SI-LABEL: {{^}}s_movk_i32_k4:58; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],59; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x20000, v[[LO_VREG]]60; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 1, v[[HI_VREG]]61; SI: s_endpgm62define amdgpu_kernel void @s_movk_i32_k4(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {63 %loada = load i64, ptr addrspace(1) %a, align 464 %or = or i64 %loada, 4295098368 ; (1 << 17) | (1 << 32)65 store i64 %or, ptr addrspace(1) %out66 call void asm sideeffect "; use $0", "s"(i64 4295098368)67 ret void68}69 70; SI-LABEL: {{^}}s_movk_i32_k5:71; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],72; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0xffffffef, v[[LO_VREG]]73; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0xff00ffff, v[[HI_VREG]]74; SI: s_endpgm75define amdgpu_kernel void @s_movk_i32_k5(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {76 %loada = load i64, ptr addrspace(1) %a, align 477 %or = or i64 %loada, 18374967954648334319 ; -17 & 0xff00ffffffffffff78 store i64 %or, ptr addrspace(1) %out79 call void asm sideeffect "; use $0", "s"(i64 18374967954648334319)80 ret void81}82 83; SI-LABEL: {{^}}s_movk_i32_k6:84; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],85; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x41, v[[LO_VREG]]86; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 63, v[[HI_VREG]]87; SI: s_endpgm88define amdgpu_kernel void @s_movk_i32_k6(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {89 %loada = load i64, ptr addrspace(1) %a, align 490 %or = or i64 %loada, 270582939713 ; 65 | (63 << 32)91 store i64 %or, ptr addrspace(1) %out92 call void asm sideeffect "; use $0", "s"(i64 270582939713)93 ret void94}95 96; SI-LABEL: {{^}}s_movk_i32_k7:97; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],98; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x2000, v[[LO_VREG]]99; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x4000, v[[HI_VREG]]100; SI: s_endpgm101define amdgpu_kernel void @s_movk_i32_k7(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {102 %loada = load i64, ptr addrspace(1) %a, align 4103 %or = or i64 %loada, 70368744185856; ((1 << 13)) | ((1 << 14) << 32)104 store i64 %or, ptr addrspace(1) %out105 call void asm sideeffect "; use $0", "s"(i64 70368744185856)106 ret void107}108 109; SI-LABEL: {{^}}s_movk_i32_k8:110; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],111; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0xffff8000, v[[LO_VREG]]112; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x11111111, v[[HI_VREG]]113; SI: s_endpgm114define amdgpu_kernel void @s_movk_i32_k8(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {115 %loada = load i64, ptr addrspace(1) %a, align 4116 %or = or i64 %loada, 1229782942255906816 ; 0x11111111ffff8000117 store i64 %or, ptr addrspace(1) %out118 call void asm sideeffect "; use $0", "s"(i64 1229782942255906816)119 ret void120}121 122; SI-LABEL: {{^}}s_movk_i32_k9:123; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],124; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0xffff8001, v[[LO_VREG]]125; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x11111111, v[[HI_VREG]]126; SI: s_endpgm127define amdgpu_kernel void @s_movk_i32_k9(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {128 %loada = load i64, ptr addrspace(1) %a, align 4129 %or = or i64 %loada, 1229782942255906817 ; 0x11111111ffff8001130 store i64 %or, ptr addrspace(1) %out131 call void asm sideeffect "; use $0", "s"(i64 1229782942255906817)132 ret void133}134 135; SI-LABEL: {{^}}s_movk_i32_k10:136; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],137; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0xffff8888, v[[LO_VREG]]138; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x11111111, v[[HI_VREG]]139; SI: s_endpgm140define amdgpu_kernel void @s_movk_i32_k10(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {141 %loada = load i64, ptr addrspace(1) %a, align 4142 %or = or i64 %loada, 1229782942255909000 ; 0x11111111ffff8888143 store i64 %or, ptr addrspace(1) %out144 call void asm sideeffect "; use $0", "s"(i64 1229782942255909000)145 ret void146}147 148; SI-LABEL: {{^}}s_movk_i32_k11:149; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],150; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0xffff8fff, v[[LO_VREG]]151; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x11111111, v[[HI_VREG]]152; SI: s_endpgm153define amdgpu_kernel void @s_movk_i32_k11(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {154 %loada = load i64, ptr addrspace(1) %a, align 4155 %or = or i64 %loada, 1229782942255910911 ; 0x11111111ffff8fff156 store i64 %or, ptr addrspace(1) %out157 call void asm sideeffect "; use $0", "s"(i64 1229782942255910911)158 ret void159}160 161; SI-LABEL: {{^}}s_movk_i32_k12:162; SI-DAG: buffer_load_dwordx2 v[[[LO_VREG:[0-9]+]]:[[HI_VREG:[0-9]+]]],163; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0xffff7001, v[[LO_VREG]]164; SI-DAG: v_or_b32_e32 {{v[0-9]+}}, 0x11111111, v[[HI_VREG]]165; SI: s_endpgm166define amdgpu_kernel void @s_movk_i32_k12(ptr addrspace(1) %out, ptr addrspace(1) %a, ptr addrspace(1) %b) {167 %loada = load i64, ptr addrspace(1) %a, align 4168 %or = or i64 %loada, 1229782942255902721 ; 0x11111111ffff7001169 store i64 %or, ptr addrspace(1) %out170 call void asm sideeffect "; use $0", "s"(i64 1229782942255902721)171 ret void172}173