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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 < %s | FileCheck -check-prefix=SDAG %s3; RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -global-isel < %s | FileCheck -check-prefix=GISEL %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 < %s | FileCheck -check-prefix=SDAG %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -global-isel < %s | FileCheck -check-prefix=GISEL %s6 7define amdgpu_vs void @f32_olt(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {8; SDAG-LABEL: f32_olt:9; SDAG: ; %bb.0: ; %entry10; SDAG-NEXT: s_cmp_lt_f32 s2, s311; SDAG-NEXT: v_mov_b32_e32 v0, 012; SDAG-NEXT: s_cselect_b32 s2, -1, 013; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)14; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s215; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]16; SDAG-NEXT: s_endpgm17;18; GISEL-LABEL: f32_olt:19; GISEL: ; %bb.0: ; %entry20; GISEL-NEXT: s_cmp_lt_f32 s2, s321; GISEL-NEXT: v_mov_b32_e32 v1, 022; GISEL-NEXT: s_cselect_b32 s2, 1, 023; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)24; GISEL-NEXT: s_bfe_i32 s2, s2, 0x1000025; GISEL-NEXT: v_mov_b32_e32 v0, s226; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]27; GISEL-NEXT: s_endpgm28entry:29 %0 = fcmp olt float %a, %b30 %1 = sext i1 %0 to i3231 store i32 %1, ptr addrspace(1) %out32 ret void33}34 35define amdgpu_vs void @f32_oeq(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {36; SDAG-LABEL: f32_oeq:37; SDAG: ; %bb.0: ; %entry38; SDAG-NEXT: s_cmp_eq_f32 s2, s339; SDAG-NEXT: v_mov_b32_e32 v0, 040; SDAG-NEXT: s_cselect_b32 s2, -1, 041; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)42; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s243; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]44; SDAG-NEXT: s_endpgm45;46; GISEL-LABEL: f32_oeq:47; GISEL: ; %bb.0: ; %entry48; GISEL-NEXT: s_cmp_eq_f32 s2, s349; GISEL-NEXT: v_mov_b32_e32 v1, 050; GISEL-NEXT: s_cselect_b32 s2, 1, 051; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)52; GISEL-NEXT: s_bfe_i32 s2, s2, 0x1000053; GISEL-NEXT: v_mov_b32_e32 v0, s254; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]55; GISEL-NEXT: s_endpgm56entry:57 %0 = fcmp oeq float %a, %b58 %1 = sext i1 %0 to i3259 store i32 %1, ptr addrspace(1) %out60 ret void61}62 63define amdgpu_vs void @f32_ole(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {64; SDAG-LABEL: f32_ole:65; SDAG: ; %bb.0: ; %entry66; SDAG-NEXT: s_cmp_le_f32 s2, s367; SDAG-NEXT: v_mov_b32_e32 v0, 068; SDAG-NEXT: s_cselect_b32 s2, -1, 069; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)70; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s271; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]72; SDAG-NEXT: s_endpgm73;74; GISEL-LABEL: f32_ole:75; GISEL: ; %bb.0: ; %entry76; GISEL-NEXT: s_cmp_le_f32 s2, s377; GISEL-NEXT: v_mov_b32_e32 v1, 078; GISEL-NEXT: s_cselect_b32 s2, 1, 079; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)80; GISEL-NEXT: s_bfe_i32 s2, s2, 0x1000081; GISEL-NEXT: v_mov_b32_e32 v0, s282; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]83; GISEL-NEXT: s_endpgm84entry:85 %0 = fcmp ole float %a, %b86 %1 = sext i1 %0 to i3287 store i32 %1, ptr addrspace(1) %out88 ret void89}90 91define amdgpu_vs void @f32_ogt(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {92; SDAG-LABEL: f32_ogt:93; SDAG: ; %bb.0: ; %entry94; SDAG-NEXT: s_cmp_gt_f32 s2, s395; SDAG-NEXT: v_mov_b32_e32 v0, 096; SDAG-NEXT: s_cselect_b32 s2, -1, 097; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)98; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s299; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]100; SDAG-NEXT: s_endpgm101;102; GISEL-LABEL: f32_ogt:103; GISEL: ; %bb.0: ; %entry104; GISEL-NEXT: s_cmp_gt_f32 s2, s3105; GISEL-NEXT: v_mov_b32_e32 v1, 0106; GISEL-NEXT: s_cselect_b32 s2, 1, 0107; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)108; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000109; GISEL-NEXT: v_mov_b32_e32 v0, s2110; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]111; GISEL-NEXT: s_endpgm112entry:113 %0 = fcmp ogt float %a, %b114 %1 = sext i1 %0 to i32115 store i32 %1, ptr addrspace(1) %out116 ret void117}118 119define amdgpu_vs void @f32_one(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {120; SDAG-LABEL: f32_one:121; SDAG: ; %bb.0: ; %entry122; SDAG-NEXT: s_cmp_lg_f32 s2, s3123; SDAG-NEXT: v_mov_b32_e32 v0, 0124; SDAG-NEXT: s_cselect_b32 s2, -1, 0125; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)126; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2127; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]128; SDAG-NEXT: s_endpgm129;130; GISEL-LABEL: f32_one:131; GISEL: ; %bb.0: ; %entry132; GISEL-NEXT: s_cmp_lg_f32 s2, s3133; GISEL-NEXT: v_mov_b32_e32 v1, 0134; GISEL-NEXT: s_cselect_b32 s2, 1, 0135; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)136; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000137; GISEL-NEXT: v_mov_b32_e32 v0, s2138; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]139; GISEL-NEXT: s_endpgm140entry:141 %0 = fcmp one float %a, %b142 %1 = sext i1 %0 to i32143 store i32 %1, ptr addrspace(1) %out144 ret void145}146 147define amdgpu_vs void @f32_oge(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {148; SDAG-LABEL: f32_oge:149; SDAG: ; %bb.0: ; %entry150; SDAG-NEXT: s_cmp_ge_f32 s2, s3151; SDAG-NEXT: v_mov_b32_e32 v0, 0152; SDAG-NEXT: s_cselect_b32 s2, -1, 0153; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)154; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2155; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]156; SDAG-NEXT: s_endpgm157;158; GISEL-LABEL: f32_oge:159; GISEL: ; %bb.0: ; %entry160; GISEL-NEXT: s_cmp_ge_f32 s2, s3161; GISEL-NEXT: v_mov_b32_e32 v1, 0162; GISEL-NEXT: s_cselect_b32 s2, 1, 0163; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)164; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000165; GISEL-NEXT: v_mov_b32_e32 v0, s2166; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]167; GISEL-NEXT: s_endpgm168entry:169 %0 = fcmp oge float %a, %b170 %1 = sext i1 %0 to i32171 store i32 %1, ptr addrspace(1) %out172 ret void173}174 175define amdgpu_vs void @f32_ord(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {176; SDAG-LABEL: f32_ord:177; SDAG: ; %bb.0: ; %entry178; SDAG-NEXT: s_cmp_o_f32 s2, s3179; SDAG-NEXT: v_mov_b32_e32 v0, 0180; SDAG-NEXT: s_cselect_b32 s2, -1, 0181; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)182; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2183; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]184; SDAG-NEXT: s_endpgm185;186; GISEL-LABEL: f32_ord:187; GISEL: ; %bb.0: ; %entry188; GISEL-NEXT: s_cmp_o_f32 s2, s3189; GISEL-NEXT: v_mov_b32_e32 v1, 0190; GISEL-NEXT: s_cselect_b32 s2, 1, 0191; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)192; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000193; GISEL-NEXT: v_mov_b32_e32 v0, s2194; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]195; GISEL-NEXT: s_endpgm196entry:197 %0 = fcmp ord float %a, %b198 %1 = sext i1 %0 to i32199 store i32 %1, ptr addrspace(1) %out200 ret void201}202 203define amdgpu_vs void @f32_uno(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {204; SDAG-LABEL: f32_uno:205; SDAG: ; %bb.0: ; %entry206; SDAG-NEXT: s_cmp_u_f32 s2, s3207; SDAG-NEXT: v_mov_b32_e32 v0, 0208; SDAG-NEXT: s_cselect_b32 s2, -1, 0209; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)210; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2211; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]212; SDAG-NEXT: s_endpgm213;214; GISEL-LABEL: f32_uno:215; GISEL: ; %bb.0: ; %entry216; GISEL-NEXT: s_cmp_u_f32 s2, s3217; GISEL-NEXT: v_mov_b32_e32 v1, 0218; GISEL-NEXT: s_cselect_b32 s2, 1, 0219; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)220; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000221; GISEL-NEXT: v_mov_b32_e32 v0, s2222; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]223; GISEL-NEXT: s_endpgm224entry:225 %0 = fcmp uno float %a, %b226 %1 = sext i1 %0 to i32227 store i32 %1, ptr addrspace(1) %out228 ret void229}230 231define amdgpu_vs void @f32_ult(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {232; SDAG-LABEL: f32_ult:233; SDAG: ; %bb.0: ; %entry234; SDAG-NEXT: s_cmp_nge_f32 s2, s3235; SDAG-NEXT: v_mov_b32_e32 v0, 0236; SDAG-NEXT: s_cselect_b32 s2, -1, 0237; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)238; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2239; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]240; SDAG-NEXT: s_endpgm241;242; GISEL-LABEL: f32_ult:243; GISEL: ; %bb.0: ; %entry244; GISEL-NEXT: s_cmp_nge_f32 s2, s3245; GISEL-NEXT: v_mov_b32_e32 v1, 0246; GISEL-NEXT: s_cselect_b32 s2, 1, 0247; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)248; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000249; GISEL-NEXT: v_mov_b32_e32 v0, s2250; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]251; GISEL-NEXT: s_endpgm252entry:253 %0 = fcmp ult float %a, %b254 %1 = sext i1 %0 to i32255 store i32 %1, ptr addrspace(1) %out256 ret void257}258 259define amdgpu_vs void @f32_ueq(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {260; SDAG-LABEL: f32_ueq:261; SDAG: ; %bb.0: ; %entry262; SDAG-NEXT: s_cmp_nlg_f32 s2, s3263; SDAG-NEXT: v_mov_b32_e32 v0, 0264; SDAG-NEXT: s_cselect_b32 s2, -1, 0265; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)266; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2267; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]268; SDAG-NEXT: s_endpgm269;270; GISEL-LABEL: f32_ueq:271; GISEL: ; %bb.0: ; %entry272; GISEL-NEXT: s_cmp_nlg_f32 s2, s3273; GISEL-NEXT: v_mov_b32_e32 v1, 0274; GISEL-NEXT: s_cselect_b32 s2, 1, 0275; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)276; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000277; GISEL-NEXT: v_mov_b32_e32 v0, s2278; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]279; GISEL-NEXT: s_endpgm280entry:281 %0 = fcmp ueq float %a, %b282 %1 = sext i1 %0 to i32283 store i32 %1, ptr addrspace(1) %out284 ret void285}286 287define amdgpu_vs void @f32_ule(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {288; SDAG-LABEL: f32_ule:289; SDAG: ; %bb.0: ; %entry290; SDAG-NEXT: s_cmp_ngt_f32 s2, s3291; SDAG-NEXT: v_mov_b32_e32 v0, 0292; SDAG-NEXT: s_cselect_b32 s2, -1, 0293; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)294; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2295; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]296; SDAG-NEXT: s_endpgm297;298; GISEL-LABEL: f32_ule:299; GISEL: ; %bb.0: ; %entry300; GISEL-NEXT: s_cmp_ngt_f32 s2, s3301; GISEL-NEXT: v_mov_b32_e32 v1, 0302; GISEL-NEXT: s_cselect_b32 s2, 1, 0303; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)304; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000305; GISEL-NEXT: v_mov_b32_e32 v0, s2306; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]307; GISEL-NEXT: s_endpgm308entry:309 %0 = fcmp ule float %a, %b310 %1 = sext i1 %0 to i32311 store i32 %1, ptr addrspace(1) %out312 ret void313}314 315define amdgpu_vs void @f32_ugt(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {316; SDAG-LABEL: f32_ugt:317; SDAG: ; %bb.0: ; %entry318; SDAG-NEXT: s_cmp_nle_f32 s2, s3319; SDAG-NEXT: v_mov_b32_e32 v0, 0320; SDAG-NEXT: s_cselect_b32 s2, -1, 0321; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)322; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2323; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]324; SDAG-NEXT: s_endpgm325;326; GISEL-LABEL: f32_ugt:327; GISEL: ; %bb.0: ; %entry328; GISEL-NEXT: s_cmp_nle_f32 s2, s3329; GISEL-NEXT: v_mov_b32_e32 v1, 0330; GISEL-NEXT: s_cselect_b32 s2, 1, 0331; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)332; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000333; GISEL-NEXT: v_mov_b32_e32 v0, s2334; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]335; GISEL-NEXT: s_endpgm336entry:337 %0 = fcmp ugt float %a, %b338 %1 = sext i1 %0 to i32339 store i32 %1, ptr addrspace(1) %out340 ret void341}342 343define amdgpu_vs void @f32_une(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {344; SDAG-LABEL: f32_une:345; SDAG: ; %bb.0: ; %entry346; SDAG-NEXT: s_cmp_neq_f32 s2, s3347; SDAG-NEXT: v_mov_b32_e32 v0, 0348; SDAG-NEXT: s_cselect_b32 s2, -1, 0349; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)350; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2351; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]352; SDAG-NEXT: s_endpgm353;354; GISEL-LABEL: f32_une:355; GISEL: ; %bb.0: ; %entry356; GISEL-NEXT: s_cmp_neq_f32 s2, s3357; GISEL-NEXT: v_mov_b32_e32 v1, 0358; GISEL-NEXT: s_cselect_b32 s2, 1, 0359; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)360; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000361; GISEL-NEXT: v_mov_b32_e32 v0, s2362; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]363; GISEL-NEXT: s_endpgm364entry:365 %0 = fcmp une float %a, %b366 %1 = sext i1 %0 to i32367 store i32 %1, ptr addrspace(1) %out368 ret void369}370 371define amdgpu_vs void @f32_uge(ptr addrspace(1) inreg %out, float inreg %a, float inreg %b) {372; SDAG-LABEL: f32_uge:373; SDAG: ; %bb.0: ; %entry374; SDAG-NEXT: s_cmp_nlt_f32 s2, s3375; SDAG-NEXT: v_mov_b32_e32 v0, 0376; SDAG-NEXT: s_cselect_b32 s2, -1, 0377; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)378; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2379; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]380; SDAG-NEXT: s_endpgm381;382; GISEL-LABEL: f32_uge:383; GISEL: ; %bb.0: ; %entry384; GISEL-NEXT: s_cmp_nlt_f32 s2, s3385; GISEL-NEXT: v_mov_b32_e32 v1, 0386; GISEL-NEXT: s_cselect_b32 s2, 1, 0387; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)388; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000389; GISEL-NEXT: v_mov_b32_e32 v0, s2390; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]391; GISEL-NEXT: s_endpgm392entry:393 %0 = fcmp uge float %a, %b394 %1 = sext i1 %0 to i32395 store i32 %1, ptr addrspace(1) %out396 ret void397}398 399define amdgpu_vs void @f16_olt(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {400; SDAG-LABEL: f16_olt:401; SDAG: ; %bb.0: ; %entry402; SDAG-NEXT: s_cmp_lt_f16 s2, s3403; SDAG-NEXT: v_mov_b32_e32 v0, 0404; SDAG-NEXT: s_cselect_b32 s2, -1, 0405; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)406; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2407; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]408; SDAG-NEXT: s_endpgm409;410; GISEL-LABEL: f16_olt:411; GISEL: ; %bb.0: ; %entry412; GISEL-NEXT: s_cmp_lt_f16 s2, s3413; GISEL-NEXT: v_mov_b32_e32 v1, 0414; GISEL-NEXT: s_cselect_b32 s2, 1, 0415; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)416; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000417; GISEL-NEXT: v_mov_b32_e32 v0, s2418; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]419; GISEL-NEXT: s_endpgm420entry:421 %0 = fcmp olt half %a, %b422 %1 = sext i1 %0 to i32423 store i32 %1, ptr addrspace(1) %out424 ret void425}426 427define amdgpu_vs void @f16_oeq(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {428; SDAG-LABEL: f16_oeq:429; SDAG: ; %bb.0: ; %entry430; SDAG-NEXT: s_cmp_eq_f16 s2, s3431; SDAG-NEXT: v_mov_b32_e32 v0, 0432; SDAG-NEXT: s_cselect_b32 s2, -1, 0433; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)434; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2435; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]436; SDAG-NEXT: s_endpgm437;438; GISEL-LABEL: f16_oeq:439; GISEL: ; %bb.0: ; %entry440; GISEL-NEXT: s_cmp_eq_f16 s2, s3441; GISEL-NEXT: v_mov_b32_e32 v1, 0442; GISEL-NEXT: s_cselect_b32 s2, 1, 0443; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)444; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000445; GISEL-NEXT: v_mov_b32_e32 v0, s2446; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]447; GISEL-NEXT: s_endpgm448entry:449 %0 = fcmp oeq half %a, %b450 %1 = sext i1 %0 to i32451 store i32 %1, ptr addrspace(1) %out452 ret void453}454 455define amdgpu_vs void @f16_ole(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {456; SDAG-LABEL: f16_ole:457; SDAG: ; %bb.0: ; %entry458; SDAG-NEXT: s_cmp_le_f16 s2, s3459; SDAG-NEXT: v_mov_b32_e32 v0, 0460; SDAG-NEXT: s_cselect_b32 s2, -1, 0461; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)462; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2463; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]464; SDAG-NEXT: s_endpgm465;466; GISEL-LABEL: f16_ole:467; GISEL: ; %bb.0: ; %entry468; GISEL-NEXT: s_cmp_le_f16 s2, s3469; GISEL-NEXT: v_mov_b32_e32 v1, 0470; GISEL-NEXT: s_cselect_b32 s2, 1, 0471; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)472; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000473; GISEL-NEXT: v_mov_b32_e32 v0, s2474; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]475; GISEL-NEXT: s_endpgm476entry:477 %0 = fcmp ole half %a, %b478 %1 = sext i1 %0 to i32479 store i32 %1, ptr addrspace(1) %out480 ret void481}482 483define amdgpu_vs void @f16_ogt(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {484; SDAG-LABEL: f16_ogt:485; SDAG: ; %bb.0: ; %entry486; SDAG-NEXT: s_cmp_gt_f16 s2, s3487; SDAG-NEXT: v_mov_b32_e32 v0, 0488; SDAG-NEXT: s_cselect_b32 s2, -1, 0489; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)490; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2491; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]492; SDAG-NEXT: s_endpgm493;494; GISEL-LABEL: f16_ogt:495; GISEL: ; %bb.0: ; %entry496; GISEL-NEXT: s_cmp_gt_f16 s2, s3497; GISEL-NEXT: v_mov_b32_e32 v1, 0498; GISEL-NEXT: s_cselect_b32 s2, 1, 0499; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)500; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000501; GISEL-NEXT: v_mov_b32_e32 v0, s2502; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]503; GISEL-NEXT: s_endpgm504entry:505 %0 = fcmp ogt half %a, %b506 %1 = sext i1 %0 to i32507 store i32 %1, ptr addrspace(1) %out508 ret void509}510 511define amdgpu_vs void @f16_one(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {512; SDAG-LABEL: f16_one:513; SDAG: ; %bb.0: ; %entry514; SDAG-NEXT: s_cmp_lg_f16 s2, s3515; SDAG-NEXT: v_mov_b32_e32 v0, 0516; SDAG-NEXT: s_cselect_b32 s2, -1, 0517; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)518; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2519; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]520; SDAG-NEXT: s_endpgm521;522; GISEL-LABEL: f16_one:523; GISEL: ; %bb.0: ; %entry524; GISEL-NEXT: s_cmp_lg_f16 s2, s3525; GISEL-NEXT: v_mov_b32_e32 v1, 0526; GISEL-NEXT: s_cselect_b32 s2, 1, 0527; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)528; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000529; GISEL-NEXT: v_mov_b32_e32 v0, s2530; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]531; GISEL-NEXT: s_endpgm532entry:533 %0 = fcmp one half %a, %b534 %1 = sext i1 %0 to i32535 store i32 %1, ptr addrspace(1) %out536 ret void537}538 539define amdgpu_vs void @f16_oge(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {540; SDAG-LABEL: f16_oge:541; SDAG: ; %bb.0: ; %entry542; SDAG-NEXT: s_cmp_ge_f16 s2, s3543; SDAG-NEXT: v_mov_b32_e32 v0, 0544; SDAG-NEXT: s_cselect_b32 s2, -1, 0545; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)546; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2547; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]548; SDAG-NEXT: s_endpgm549;550; GISEL-LABEL: f16_oge:551; GISEL: ; %bb.0: ; %entry552; GISEL-NEXT: s_cmp_ge_f16 s2, s3553; GISEL-NEXT: v_mov_b32_e32 v1, 0554; GISEL-NEXT: s_cselect_b32 s2, 1, 0555; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)556; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000557; GISEL-NEXT: v_mov_b32_e32 v0, s2558; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]559; GISEL-NEXT: s_endpgm560entry:561 %0 = fcmp oge half %a, %b562 %1 = sext i1 %0 to i32563 store i32 %1, ptr addrspace(1) %out564 ret void565}566 567define amdgpu_vs void @f16_ord(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {568; SDAG-LABEL: f16_ord:569; SDAG: ; %bb.0: ; %entry570; SDAG-NEXT: s_cmp_o_f16 s2, s3571; SDAG-NEXT: v_mov_b32_e32 v0, 0572; SDAG-NEXT: s_cselect_b32 s2, -1, 0573; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)574; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2575; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]576; SDAG-NEXT: s_endpgm577;578; GISEL-LABEL: f16_ord:579; GISEL: ; %bb.0: ; %entry580; GISEL-NEXT: s_cmp_o_f16 s2, s3581; GISEL-NEXT: v_mov_b32_e32 v1, 0582; GISEL-NEXT: s_cselect_b32 s2, 1, 0583; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)584; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000585; GISEL-NEXT: v_mov_b32_e32 v0, s2586; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]587; GISEL-NEXT: s_endpgm588entry:589 %0 = fcmp ord half %a, %b590 %1 = sext i1 %0 to i32591 store i32 %1, ptr addrspace(1) %out592 ret void593}594 595define amdgpu_vs void @f16_uno(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {596; SDAG-LABEL: f16_uno:597; SDAG: ; %bb.0: ; %entry598; SDAG-NEXT: s_cmp_u_f16 s2, s3599; SDAG-NEXT: v_mov_b32_e32 v0, 0600; SDAG-NEXT: s_cselect_b32 s2, -1, 0601; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)602; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2603; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]604; SDAG-NEXT: s_endpgm605;606; GISEL-LABEL: f16_uno:607; GISEL: ; %bb.0: ; %entry608; GISEL-NEXT: s_cmp_u_f16 s2, s3609; GISEL-NEXT: v_mov_b32_e32 v1, 0610; GISEL-NEXT: s_cselect_b32 s2, 1, 0611; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)612; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000613; GISEL-NEXT: v_mov_b32_e32 v0, s2614; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]615; GISEL-NEXT: s_endpgm616entry:617 %0 = fcmp uno half %a, %b618 %1 = sext i1 %0 to i32619 store i32 %1, ptr addrspace(1) %out620 ret void621}622 623define amdgpu_vs void @f16_ult(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {624; SDAG-LABEL: f16_ult:625; SDAG: ; %bb.0: ; %entry626; SDAG-NEXT: s_cmp_nge_f16 s2, s3627; SDAG-NEXT: v_mov_b32_e32 v0, 0628; SDAG-NEXT: s_cselect_b32 s2, -1, 0629; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)630; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2631; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]632; SDAG-NEXT: s_endpgm633;634; GISEL-LABEL: f16_ult:635; GISEL: ; %bb.0: ; %entry636; GISEL-NEXT: s_cmp_nge_f16 s2, s3637; GISEL-NEXT: v_mov_b32_e32 v1, 0638; GISEL-NEXT: s_cselect_b32 s2, 1, 0639; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)640; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000641; GISEL-NEXT: v_mov_b32_e32 v0, s2642; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]643; GISEL-NEXT: s_endpgm644entry:645 %0 = fcmp ult half %a, %b646 %1 = sext i1 %0 to i32647 store i32 %1, ptr addrspace(1) %out648 ret void649}650 651define amdgpu_vs void @f16_ueq(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {652; SDAG-LABEL: f16_ueq:653; SDAG: ; %bb.0: ; %entry654; SDAG-NEXT: s_cmp_nlg_f16 s2, s3655; SDAG-NEXT: v_mov_b32_e32 v0, 0656; SDAG-NEXT: s_cselect_b32 s2, -1, 0657; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)658; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2659; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]660; SDAG-NEXT: s_endpgm661;662; GISEL-LABEL: f16_ueq:663; GISEL: ; %bb.0: ; %entry664; GISEL-NEXT: s_cmp_nlg_f16 s2, s3665; GISEL-NEXT: v_mov_b32_e32 v1, 0666; GISEL-NEXT: s_cselect_b32 s2, 1, 0667; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)668; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000669; GISEL-NEXT: v_mov_b32_e32 v0, s2670; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]671; GISEL-NEXT: s_endpgm672entry:673 %0 = fcmp ueq half %a, %b674 %1 = sext i1 %0 to i32675 store i32 %1, ptr addrspace(1) %out676 ret void677}678 679define amdgpu_vs void @f16_ule(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {680; SDAG-LABEL: f16_ule:681; SDAG: ; %bb.0: ; %entry682; SDAG-NEXT: s_cmp_ngt_f16 s2, s3683; SDAG-NEXT: v_mov_b32_e32 v0, 0684; SDAG-NEXT: s_cselect_b32 s2, -1, 0685; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)686; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2687; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]688; SDAG-NEXT: s_endpgm689;690; GISEL-LABEL: f16_ule:691; GISEL: ; %bb.0: ; %entry692; GISEL-NEXT: s_cmp_ngt_f16 s2, s3693; GISEL-NEXT: v_mov_b32_e32 v1, 0694; GISEL-NEXT: s_cselect_b32 s2, 1, 0695; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)696; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000697; GISEL-NEXT: v_mov_b32_e32 v0, s2698; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]699; GISEL-NEXT: s_endpgm700entry:701 %0 = fcmp ule half %a, %b702 %1 = sext i1 %0 to i32703 store i32 %1, ptr addrspace(1) %out704 ret void705}706 707define amdgpu_vs void @f16_ugt(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {708; SDAG-LABEL: f16_ugt:709; SDAG: ; %bb.0: ; %entry710; SDAG-NEXT: s_cmp_nle_f16 s2, s3711; SDAG-NEXT: v_mov_b32_e32 v0, 0712; SDAG-NEXT: s_cselect_b32 s2, -1, 0713; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)714; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2715; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]716; SDAG-NEXT: s_endpgm717;718; GISEL-LABEL: f16_ugt:719; GISEL: ; %bb.0: ; %entry720; GISEL-NEXT: s_cmp_nle_f16 s2, s3721; GISEL-NEXT: v_mov_b32_e32 v1, 0722; GISEL-NEXT: s_cselect_b32 s2, 1, 0723; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)724; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000725; GISEL-NEXT: v_mov_b32_e32 v0, s2726; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]727; GISEL-NEXT: s_endpgm728entry:729 %0 = fcmp ugt half %a, %b730 %1 = sext i1 %0 to i32731 store i32 %1, ptr addrspace(1) %out732 ret void733}734 735define amdgpu_vs void @f16_une(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {736; SDAG-LABEL: f16_une:737; SDAG: ; %bb.0: ; %entry738; SDAG-NEXT: s_cmp_neq_f16 s2, s3739; SDAG-NEXT: v_mov_b32_e32 v0, 0740; SDAG-NEXT: s_cselect_b32 s2, -1, 0741; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)742; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2743; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]744; SDAG-NEXT: s_endpgm745;746; GISEL-LABEL: f16_une:747; GISEL: ; %bb.0: ; %entry748; GISEL-NEXT: s_cmp_neq_f16 s2, s3749; GISEL-NEXT: v_mov_b32_e32 v1, 0750; GISEL-NEXT: s_cselect_b32 s2, 1, 0751; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)752; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000753; GISEL-NEXT: v_mov_b32_e32 v0, s2754; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]755; GISEL-NEXT: s_endpgm756entry:757 %0 = fcmp une half %a, %b758 %1 = sext i1 %0 to i32759 store i32 %1, ptr addrspace(1) %out760 ret void761}762 763define amdgpu_vs void @f16_uge(ptr addrspace(1) inreg %out, half inreg %a, half inreg %b) {764; SDAG-LABEL: f16_uge:765; SDAG: ; %bb.0: ; %entry766; SDAG-NEXT: s_cmp_nlt_f16 s2, s3767; SDAG-NEXT: v_mov_b32_e32 v0, 0768; SDAG-NEXT: s_cselect_b32 s2, -1, 0769; SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)770; SDAG-NEXT: v_cndmask_b32_e64 v1, 0, -1, s2771; SDAG-NEXT: global_store_b32 v0, v1, s[0:1]772; SDAG-NEXT: s_endpgm773;774; GISEL-LABEL: f16_uge:775; GISEL: ; %bb.0: ; %entry776; GISEL-NEXT: s_cmp_nlt_f16 s2, s3777; GISEL-NEXT: v_mov_b32_e32 v1, 0778; GISEL-NEXT: s_cselect_b32 s2, 1, 0779; GISEL-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)780; GISEL-NEXT: s_bfe_i32 s2, s2, 0x10000781; GISEL-NEXT: v_mov_b32_e32 v0, s2782; GISEL-NEXT: global_store_b32 v1, v0, s[0:1]783; GISEL-NEXT: s_endpgm784entry:785 %0 = fcmp uge half %a, %b786 %1 = sext i1 %0 to i32787 store i32 %1, ptr addrspace(1) %out788 ret void789}790