185 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefix=GFX900 %s3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 < %s | FileCheck -check-prefixes=GFX906 %s4; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 < %s | FileCheck -check-prefixes=GFX908 %s5; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck -check-prefixes=GFX90A %s6 7define amdgpu_kernel void @scalar_to_vector_v8i16(<2 x i32> %in, ptr %out) #0 {8; GFX900-LABEL: scalar_to_vector_v8i16:9; GFX900: ; %bb.0: ; %entry10; GFX900-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x011; GFX900-NEXT: v_lshlrev_b32_e32 v4, 4, v012; GFX900-NEXT: s_add_u32 flat_scratch_lo, s12, s1713; GFX900-NEXT: s_addc_u32 flat_scratch_hi, s13, 014; GFX900-NEXT: s_waitcnt lgkmcnt(0)15; GFX900-NEXT: v_mov_b32_e32 v5, s316; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, s2, v417; GFX900-NEXT: v_mov_b32_e32 v0, s018; GFX900-NEXT: v_mov_b32_e32 v1, s119; GFX900-NEXT: v_mov_b32_e32 v2, s020; GFX900-NEXT: v_mov_b32_e32 v3, s021; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc22; GFX900-NEXT: flat_store_dwordx4 v[4:5], v[0:3]23; GFX900-NEXT: s_endpgm24;25; GFX906-LABEL: scalar_to_vector_v8i16:26; GFX906: ; %bb.0: ; %entry27; GFX906-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x028; GFX906-NEXT: v_lshlrev_b32_e32 v4, 4, v029; GFX906-NEXT: s_add_u32 flat_scratch_lo, s12, s1730; GFX906-NEXT: s_addc_u32 flat_scratch_hi, s13, 031; GFX906-NEXT: s_waitcnt lgkmcnt(0)32; GFX906-NEXT: v_mov_b32_e32 v5, s333; GFX906-NEXT: v_add_co_u32_e32 v4, vcc, s2, v434; GFX906-NEXT: v_mov_b32_e32 v0, s035; GFX906-NEXT: v_mov_b32_e32 v1, s136; GFX906-NEXT: v_mov_b32_e32 v2, s037; GFX906-NEXT: v_mov_b32_e32 v3, s038; GFX906-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc39; GFX906-NEXT: flat_store_dwordx4 v[4:5], v[0:3]40; GFX906-NEXT: s_endpgm41;42; GFX908-LABEL: scalar_to_vector_v8i16:43; GFX908: ; %bb.0: ; %entry44; GFX908-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x045; GFX908-NEXT: v_lshlrev_b32_e32 v4, 4, v046; GFX908-NEXT: s_add_u32 flat_scratch_lo, s12, s1747; GFX908-NEXT: s_addc_u32 flat_scratch_hi, s13, 048; GFX908-NEXT: s_waitcnt lgkmcnt(0)49; GFX908-NEXT: v_mov_b32_e32 v5, s350; GFX908-NEXT: v_add_co_u32_e32 v4, vcc, s2, v451; GFX908-NEXT: v_mov_b32_e32 v0, s052; GFX908-NEXT: v_mov_b32_e32 v1, s153; GFX908-NEXT: v_mov_b32_e32 v2, s054; GFX908-NEXT: v_mov_b32_e32 v3, s055; GFX908-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc56; GFX908-NEXT: flat_store_dwordx4 v[4:5], v[0:3]57; GFX908-NEXT: s_endpgm58;59; GFX90A-LABEL: scalar_to_vector_v8i16:60; GFX90A: ; %bb.0: ; %entry61; GFX90A-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x062; GFX90A-NEXT: v_and_b32_e32 v0, 0x3ff, v063; GFX90A-NEXT: v_lshlrev_b32_e32 v0, 4, v064; GFX90A-NEXT: s_add_u32 flat_scratch_lo, s12, s1765; GFX90A-NEXT: s_addc_u32 flat_scratch_hi, s13, 066; GFX90A-NEXT: s_waitcnt lgkmcnt(0)67; GFX90A-NEXT: v_mov_b32_e32 v1, s368; GFX90A-NEXT: v_add_co_u32_e32 v0, vcc, s2, v069; GFX90A-NEXT: v_mov_b32_e32 v2, s070; GFX90A-NEXT: v_mov_b32_e32 v3, s171; GFX90A-NEXT: v_mov_b32_e32 v4, s072; GFX90A-NEXT: v_mov_b32_e32 v5, s073; GFX90A-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc74; GFX90A-NEXT: flat_store_dwordx4 v[0:1], v[2:5]75; GFX90A-NEXT: s_endpgm76entry:77 %val.1.i32 = extractelement <2 x i32> %in, i64 078 %val.2.vec2.i16 = bitcast i32 %val.1.i32 to <2 x i16>79 %val.3.vec8.i16 = shufflevector <2 x i16> %val.2.vec2.i16, <2 x i16> %val.2.vec2.i16, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>80 81 %val.4.vec4.i32 = shufflevector <2 x i32> %in, <2 x i32> %in, <4 x i32> <i32 0, i32 1, i32 2, i32 3>82 %val.5.vec8.i16 = bitcast <4 x i32> %val.4.vec4.i32 to <8 x i16>83 84 %val.6.vec8.i16 = shufflevector <8 x i16> %val.5.vec8.i16, <8 x i16> %val.3.vec8.i16, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>85 86 %tid = call i32 @llvm.amdgcn.workitem.id.x() #187 %tid.ext = sext i32 %tid to i6488 %out.gep = getelementptr inbounds <8 x i16>, ptr %out, i64 %tid.ext89 store <8 x i16> %val.6.vec8.i16, ptr %out.gep, align 1690 91 ret void92}93 94define amdgpu_kernel void @scalar_to_vector_v8f16(<2 x float> %in, ptr %out) #0 {95; GFX900-LABEL: scalar_to_vector_v8f16:96; GFX900: ; %bb.0: ; %entry97; GFX900-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x098; GFX900-NEXT: v_lshlrev_b32_e32 v4, 4, v099; GFX900-NEXT: s_add_u32 flat_scratch_lo, s12, s17100; GFX900-NEXT: s_addc_u32 flat_scratch_hi, s13, 0101; GFX900-NEXT: s_waitcnt lgkmcnt(0)102; GFX900-NEXT: v_mov_b32_e32 v5, s3103; GFX900-NEXT: v_add_co_u32_e32 v4, vcc, s2, v4104; GFX900-NEXT: v_mov_b32_e32 v0, s0105; GFX900-NEXT: v_mov_b32_e32 v1, s1106; GFX900-NEXT: v_mov_b32_e32 v3, s0107; GFX900-NEXT: v_mov_b32_e32 v2, s0108; GFX900-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc109; GFX900-NEXT: flat_store_dwordx4 v[4:5], v[0:3]110; GFX900-NEXT: s_endpgm111;112; GFX906-LABEL: scalar_to_vector_v8f16:113; GFX906: ; %bb.0: ; %entry114; GFX906-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0115; GFX906-NEXT: v_lshlrev_b32_e32 v4, 4, v0116; GFX906-NEXT: s_add_u32 flat_scratch_lo, s12, s17117; GFX906-NEXT: s_addc_u32 flat_scratch_hi, s13, 0118; GFX906-NEXT: s_waitcnt lgkmcnt(0)119; GFX906-NEXT: v_mov_b32_e32 v5, s3120; GFX906-NEXT: v_add_co_u32_e32 v4, vcc, s2, v4121; GFX906-NEXT: v_mov_b32_e32 v0, s0122; GFX906-NEXT: v_mov_b32_e32 v1, s1123; GFX906-NEXT: v_mov_b32_e32 v3, s0124; GFX906-NEXT: v_mov_b32_e32 v2, s0125; GFX906-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc126; GFX906-NEXT: flat_store_dwordx4 v[4:5], v[0:3]127; GFX906-NEXT: s_endpgm128;129; GFX908-LABEL: scalar_to_vector_v8f16:130; GFX908: ; %bb.0: ; %entry131; GFX908-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0132; GFX908-NEXT: v_lshlrev_b32_e32 v4, 4, v0133; GFX908-NEXT: s_add_u32 flat_scratch_lo, s12, s17134; GFX908-NEXT: s_addc_u32 flat_scratch_hi, s13, 0135; GFX908-NEXT: s_waitcnt lgkmcnt(0)136; GFX908-NEXT: v_mov_b32_e32 v5, s3137; GFX908-NEXT: v_add_co_u32_e32 v4, vcc, s2, v4138; GFX908-NEXT: v_mov_b32_e32 v0, s0139; GFX908-NEXT: v_mov_b32_e32 v1, s1140; GFX908-NEXT: v_mov_b32_e32 v3, s0141; GFX908-NEXT: v_mov_b32_e32 v2, s0142; GFX908-NEXT: v_addc_co_u32_e32 v5, vcc, 0, v5, vcc143; GFX908-NEXT: flat_store_dwordx4 v[4:5], v[0:3]144; GFX908-NEXT: s_endpgm145;146; GFX90A-LABEL: scalar_to_vector_v8f16:147; GFX90A: ; %bb.0: ; %entry148; GFX90A-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x0149; GFX90A-NEXT: v_and_b32_e32 v0, 0x3ff, v0150; GFX90A-NEXT: v_lshlrev_b32_e32 v0, 4, v0151; GFX90A-NEXT: s_add_u32 flat_scratch_lo, s12, s17152; GFX90A-NEXT: s_addc_u32 flat_scratch_hi, s13, 0153; GFX90A-NEXT: s_waitcnt lgkmcnt(0)154; GFX90A-NEXT: v_mov_b32_e32 v1, s3155; GFX90A-NEXT: v_add_co_u32_e32 v0, vcc, s2, v0156; GFX90A-NEXT: v_mov_b32_e32 v2, s0157; GFX90A-NEXT: v_mov_b32_e32 v3, s1158; GFX90A-NEXT: v_mov_b32_e32 v5, s0159; GFX90A-NEXT: v_mov_b32_e32 v4, s0160; GFX90A-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc161; GFX90A-NEXT: flat_store_dwordx4 v[0:1], v[2:5]162; GFX90A-NEXT: s_endpgm163entry:164 %val.1.float = extractelement <2 x float> %in, i64 0165 %val.2.vec2.half = bitcast float %val.1.float to <2 x half>166 %val.3.vec8.half = shufflevector <2 x half> %val.2.vec2.half, <2 x half> %val.2.vec2.half, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>167 168 %val.4.vec4.float = shufflevector <2 x float> %in, <2 x float> %in, <4 x i32> <i32 0, i32 1, i32 2, i32 3>169 %val.5.vec8.half = bitcast <4 x float> %val.4.vec4.float to <8 x half>170 171 %val.6.vec8.half = shufflevector <8 x half> %val.5.vec8.half, <8 x half> %val.3.vec8.half, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>172 173 %tid = call i32 @llvm.amdgcn.workitem.id.x() #1174 %tid.ext = sext i32 %tid to i64175 %out.gep = getelementptr inbounds <8 x half>, ptr %out, i64 %tid.ext176 store <8 x half> %val.6.vec8.half, ptr %out.gep, align 16177 178 ret void179}180 181declare i32 @llvm.amdgcn.workitem.id.x() #1182 183attributes #0 = { nounwind }184attributes #1 = { nounwind readnone }185