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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -run-pass=machine-scheduler -o - %s | FileCheck %s3 4---5name: buffer_load_lds_not_valu6tracksRegLiveness: true7body: |8 bb.0:9 liveins: $vgpr0_vgpr110 ; CHECK-LABEL: name: buffer_load_lds_not_valu11 ; CHECK: liveins: $vgpr0_vgpr112 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: $exec = IMPLICIT_DEF14 ; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF15 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:sgpr_128 = IMPLICIT_DEF16 ; CHECK-NEXT: [[DEF2:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF17 ; CHECK-NEXT: [[DEF3:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF18 ; CHECK-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF2]], [[DEF3]], implicit $exec19 ; CHECK-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[DEF3]], [[V_ADD_U32_e32_]], implicit $exec20 ; CHECK-NEXT: $m0 = S_MOV_B32 021 ; CHECK-NEXT: BUFFER_LOAD_DWORDX4_LDS_OFFEN [[DEF]], [[DEF1]], 0, 0, 0, 0, implicit $exec, implicit $m022 ; CHECK-NEXT: [[V_ADD_U32_e32_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_ADD_U32_e32_]], [[V_ADD_U32_e32_1]], implicit $exec23 ; CHECK-NEXT: [[V_ADD_U32_e32_3:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_ADD_U32_e32_1]], [[V_ADD_U32_e32_2]], implicit $exec24 ; CHECK-NEXT: $m0 = S_MOV_B32 125 ; CHECK-NEXT: BUFFER_LOAD_DWORDX4_LDS_OFFEN [[DEF]], [[DEF1]], 0, 0, 0, 0, implicit $exec, implicit $m026 ; CHECK-NEXT: [[V_ADD_U32_e32_4:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_ADD_U32_e32_2]], [[V_ADD_U32_e32_3]], implicit $exec27 ; CHECK-NEXT: [[V_ADD_U32_e32_5:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_ADD_U32_e32_3]], [[V_ADD_U32_e32_4]], implicit $exec28 ; CHECK-NEXT: [[V_ADD_U32_e32_6:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_ADD_U32_e32_4]], [[V_ADD_U32_e32_5]], implicit $exec29 ; CHECK-NEXT: dead [[V_ADD_U32_e32_7:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_ADD_U32_e32_5]], [[V_ADD_U32_e32_6]], implicit $exec30 ; CHECK-NEXT: SCHED_GROUP_BARRIER 2, 2, 031 ; CHECK-NEXT: SCHED_GROUP_BARRIER 4, 1, 032 ; CHECK-NEXT: SCHED_GROUP_BARRIER 2, 2, 033 ; CHECK-NEXT: SCHED_GROUP_BARRIER 4, 1, 034 ; CHECK-NEXT: SCHED_GROUP_BARRIER 2, 4, 035 ; CHECK-NEXT: S_ENDPGM 036 $exec = IMPLICIT_DEF37 %0:vgpr_32 = IMPLICIT_DEF38 %1:sgpr_128 = IMPLICIT_DEF39 %2:vgpr_32 = IMPLICIT_DEF40 %3:vgpr_32 = IMPLICIT_DEF41 %4:vgpr_32 = V_ADD_U32_e32 %2, %3, implicit $exec42 %5:vgpr_32 = V_ADD_U32_e32 %3, %4, implicit $exec43 $m0 = S_MOV_B32 044 BUFFER_LOAD_DWORDX4_LDS_OFFEN %0, %1, 0, 0, 0, 0, implicit $exec, implicit $m045 $m0 = S_MOV_B32 146 BUFFER_LOAD_DWORDX4_LDS_OFFEN %0, %1, 0, 0, 0, 0, implicit $exec, implicit $m047 %6:vgpr_32 = V_ADD_U32_e32 %4, %5, implicit $exec48 %7:vgpr_32 = V_ADD_U32_e32 %5, %6, implicit $exec49 %8:vgpr_32 = V_ADD_U32_e32 %6, %7, implicit $exec50 %9:vgpr_32 = V_ADD_U32_e32 %7, %8, implicit $exec51 %10:vgpr_32 = V_ADD_U32_e32 %8, %9, implicit $exec52 %11:vgpr_32 = V_ADD_U32_e32 %9, %10, implicit $exec53 SCHED_GROUP_BARRIER 2, 2, 054 SCHED_GROUP_BARRIER 4, 1 ,055 SCHED_GROUP_BARRIER 2, 2, 056 SCHED_GROUP_BARRIER 4, 1 ,057 SCHED_GROUP_BARRIER 2, 4, 058 S_ENDPGM 059...60