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1; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn < %s | FileCheck -check-prefix=FUNC -check-prefix=SI %s2 3; FIXME: This currently doesn't do a great job of clustering the4; loads, which end up with extra moves between them. Right now, it5; seems the only things areLoadsFromSameBasePtr is accomplishing is6; ordering the loads so that the lower address loads come first.7 8; FUNC-LABEL: {{^}}cluster_global_arg_loads:9; SI-DAG: buffer_load_dword [[REG0:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0{{$}}10; SI-DAG: buffer_load_dword [[REG1:v[0-9]+]], off, s{{\[[0-9]+:[0-9]+\]}}, 0 offset:811; SI: buffer_store_dword [[REG0]]12; SI: buffer_store_dword [[REG1]]13define amdgpu_kernel void @cluster_global_arg_loads(ptr addrspace(1) %out0, ptr addrspace(1) %out1, ptr addrspace(1) %ptr) #0 {14 %load0 = load i32, ptr addrspace(1) %ptr, align 415 %gep = getelementptr i32, ptr addrspace(1) %ptr, i32 216 %load1 = load i32, ptr addrspace(1) %gep, align 417 store i32 %load0, ptr addrspace(1) %out0, align 418 store i32 %load1, ptr addrspace(1) %out1, align 419 ret void20}21 22; Test for a crach in SIInstrInfo::areLoadsFromSameBasePtr() when checking23; an MUBUF load which does not have a vaddr operand.24; FUNC-LABEL: {{^}}same_base_ptr_crash:25; SI: buffer_load_dword26; SI: buffer_load_dword27define amdgpu_kernel void @same_base_ptr_crash(ptr addrspace(1) %out, ptr addrspace(1) %in, i32 %offset) {28entry:29 %out1 = getelementptr i32, ptr addrspace(1) %out, i32 %offset30 %tmp0 = load i32, ptr addrspace(1) %out31 %tmp1 = load i32, ptr addrspace(1) %out132 %tmp2 = add i32 %tmp0, %tmp133 store i32 %tmp2, ptr addrspace(1) %out34 ret void35}36 37attributes #0 = { nounwind }38attributes #1 = { nounwind readnone }39