747 lines · plain
1# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -start-before=machine-scheduler -stop-after=greedy,2 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s2# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -start-before=machine-scheduler -stop-after=greedy,2 -amdgpu-use-amdgpu-trackers=1 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN-GCNTRACKER %s3 4--- |5 define amdgpu_kernel void @no_sched_metric_due_to_spills() #0 {6 ret void7 }8 9 attributes #0 = { "amdgpu-flat-work-group-size"="1,256" }10...11 12# GCN-LABEL: name: no_sched_metric_due_to_spills13# GCN-NOT: SI_SPILL_14# GCN: S_ENDPGM15 16# GCN-GCNTRACKER-LABEL: name: no_sched_metric_due_to_spills17# GCN-GCNTRACKER: SI_SPILL_V32_SAVE18# GCN-GCNTRACKER: SI_SPILL_V32_SAVE19# GCN-GCNTRACKER: SI_SPILL_V32_SAVE20# GCN-GCNTRACKER: SI_SPILL_V32_SAVE21# GCN-GCNTRACKER: SI_SPILL_V32_SAVE22# GCN-GCNTRACKER: SI_SPILL_V32_SAVE23# GCN-GCNTRACKER: S_ENDPGM24 25# When using the GCN Trackers, the scheduler is able to acieve desired occupancy without running high-RP-reschedule stage. However, the RP is still high,26# and RA is unable to allocate without spills. By running the high-RP-reschedule schedule we would have furhter decreased RP, which provides increased27# flexibility for RA.28 29---30name: no_sched_metric_due_to_spills31tracksRegLiveness: true32machineFunctionInfo:33 stackPtrOffsetReg: '$sgpr32'34 occupancy: 435body: |36 bb.0:37 liveins: $vgpr0, $sgpr0_sgpr1, $sgpr1538 39 %0:sgpr_32 = COPY $sgpr1540 %1:sgpr_64(p4) = COPY $sgpr0_sgpr141 %2:vgpr_32(s32) = COPY $vgpr042 %3:sgpr_128 = S_LOAD_DWORDX4_IMM %1(p4), 0, 0 :: (dereferenceable invariant load (s128), addrspace 4)43 undef %4.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %1(p4), 16, 0 :: (dereferenceable invariant load (s64), align 16, addrspace 4)44 %5:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %1(p4), 32, 0 :: (dereferenceable invariant load (s32), align 8, addrspace 4)45 %6:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %1(p4), 64, 0 :: (dereferenceable invariant load (s32), align 8, addrspace 4)46 %7:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %1(p4), 84, 0 :: (dereferenceable invariant load (s32), addrspace 4)47 %8:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %1(p4), 112, 0 :: (dereferenceable invariant load (s32), align 8, addrspace 4)48 %9:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %1(p4), 128, 0 :: (dereferenceable invariant load (s32), align 8, addrspace 4)49 %10:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %1(p4), 176, 0 :: (dereferenceable invariant load (s32), align 8, addrspace 4)50 %11:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %1(p4), 192, 0 :: (dereferenceable invariant load (s32), align 8, addrspace 4)51 %12:sreg_64_xexec = S_LOAD_DWORDX2_IMM %1(p4), 216, 0 :: (dereferenceable invariant load (s64), addrspace 4)52 %13:sreg_32 = S_ADD_I32 %12.sub0, 127, implicit-def dead $scc53 %14:sreg_32 = S_ASHR_I32 %13, 31, implicit-def dead $scc54 %15:sreg_32 = S_LSHR_B32 %14, 25, implicit-def dead $scc55 %16:sreg_32 = S_ADD_I32 %13, %15, implicit-def dead $scc56 %17:sreg_32 = S_ASHR_I32 %16, 7, implicit-def dead $scc57 %18:sreg_32 = S_ADD_I32 %12.sub1, 255, implicit-def dead $scc58 %19:sreg_32 = S_ASHR_I32 %18, 31, implicit-def dead $scc59 %20:sreg_32 = S_LSHR_B32 %19, 24, implicit-def dead $scc60 %21:sreg_32 = S_ADD_I32 %18, %20, implicit-def dead $scc61 %22:sreg_32 = S_ASHR_I32 %21, 8, implicit-def dead $scc62 %23:sreg_32 = nsw S_MUL_I32 %22, %1763 %24:sreg_32 = S_ASHR_I32 %0, 31, implicit-def dead $scc64 %25:sreg_32 = S_ASHR_I32 %23, 31, implicit-def dead $scc65 %26:sreg_32 = S_ADD_I32 %0, %24, implicit-def dead $scc66 %27:sreg_32 = S_ADD_I32 %23, %25, implicit-def dead $scc67 %28:sreg_32 = S_XOR_B32 %26, %24, implicit-def dead $scc68 %29:sreg_32 = S_XOR_B32 %27, %25, implicit-def dead $scc69 %30:vgpr_32 = V_CVT_F32_U32_e64 %29, 0, 0, implicit $mode, implicit $exec70 %31:vgpr_32 = V_RCP_IFLAG_F32_e64 0, %30, 0, 0, implicit $mode, implicit $exec71 %32:vgpr_32 = V_MUL_F32_e64 0, 1333788670, 0, %31, 0, 0, implicit $mode, implicit $exec72 %33:vgpr_32 = V_CVT_U32_F32_e64 0, %32, 0, 0, implicit $mode, implicit $exec73 undef %34.sub0:sgpr_256 = S_MOV_B32 074 %35:sreg_32 = S_SUB_I32 0, %29, implicit-def dead $scc75 %36:sreg_32_xm0 = V_READFIRSTLANE_B32 %33, implicit $exec76 %37:sreg_32 = S_MUL_I32 %35, %3677 %38:sreg_32 = S_MUL_HI_U32 %36, %3778 %39:sreg_32 = S_ADD_I32 %36, %38, implicit-def dead $scc79 %40:sreg_32 = S_MUL_HI_U32 %28, %3980 %41:sreg_32 = S_MUL_I32 %40, %2981 %42:sreg_32 = S_SUB_I32 %28, %41, implicit-def dead $scc82 %43:sreg_32 = S_SUB_I32 %42, %29, implicit-def dead $scc83 S_CMP_GE_U32 %42, %29, implicit-def $scc84 %44:sreg_32 = S_CSELECT_B32 %43, %42, implicit killed $scc85 %45:sreg_32 = S_SUB_I32 %44, %29, implicit-def dead $scc86 S_CMP_GE_U32 %44, %29, implicit-def $scc87 %46:sreg_32 = S_CSELECT_B32 %45, %44, implicit killed $scc88 %47:sreg_32 = S_XOR_B32 %46, %24, implicit-def dead $scc89 %48:sreg_32 = S_SUB_I32 %47, %24, implicit-def dead $scc90 %49:sreg_32 = S_ASHR_I32 %48, 31, implicit-def dead $scc91 %50:sreg_32 = S_ASHR_I32 %22, 31, implicit-def dead $scc92 %51:sreg_32 = S_XOR_B32 %49, %50, implicit-def dead $scc93 %52:sreg_32 = S_ADD_I32 %48, %49, implicit-def dead $scc94 %53:sreg_32 = S_ADD_I32 %22, %50, implicit-def dead $scc95 %54:sreg_32 = S_XOR_B32 %52, %49, implicit-def dead $scc96 %55:sreg_32 = S_XOR_B32 %53, %50, implicit-def dead $scc97 %56:vgpr_32 = V_CVT_F32_U32_e64 %55, 0, 0, implicit $mode, implicit $exec98 %57:vgpr_32 = V_RCP_IFLAG_F32_e64 0, %56, 0, 0, implicit $mode, implicit $exec99 %58:vgpr_32 = V_MUL_F32_e64 0, 1333788670, 0, %57, 0, 0, implicit $mode, implicit $exec100 %59:vgpr_32 = V_CVT_U32_F32_e64 0, %58, 0, 0, implicit $mode, implicit $exec101 %60:sreg_32 = S_SUB_I32 0, %55, implicit-def dead $scc102 %61:sreg_32_xm0 = V_READFIRSTLANE_B32 %59, implicit $exec103 %62:sreg_32 = S_MUL_I32 %60, %61104 %63:sreg_32 = S_MUL_HI_U32 %61, %62105 %64:sreg_32 = S_ADD_I32 %61, %63, implicit-def dead $scc106 %65:sreg_32 = S_MUL_HI_U32 %54, %64107 %66:sreg_32 = S_MUL_I32 %65, %55108 %67:sreg_32 = S_SUB_I32 %54, %66, implicit-def dead $scc109 %68:sreg_32 = S_ADD_I32 %65, 1, implicit-def dead $scc110 %69:sreg_32 = S_SUB_I32 %67, %55, implicit-def dead $scc111 S_CMP_GE_U32 %67, %55, implicit-def $scc112 %70:sreg_32 = S_CSELECT_B32 %68, %65, implicit $scc113 %71:sreg_32 = S_CSELECT_B32 %69, %67, implicit killed $scc114 %72:sreg_32 = S_ADD_I32 %70, 1, implicit-def dead $scc115 S_CMP_GE_U32 %71, %55, implicit-def $scc116 %73:sreg_32 = S_CSELECT_B32 %72, %70, implicit killed $scc117 %74:sreg_32 = S_XOR_B32 %73, %51, implicit-def dead $scc118 %75:sreg_32 = S_SUB_I32 %74, %51, implicit-def dead $scc119 %76:sreg_32 = S_ASHR_I32 %16, 31, implicit-def dead $scc120 %77:sreg_32 = S_ASHR_I32 %11, 31, implicit-def dead $scc121 %78:sreg_32 = S_ADD_I32 %17, %76, implicit-def dead $scc122 %79:sreg_32 = S_ADD_I32 %11, %77, implicit-def dead $scc123 %80:sreg_32 = S_XOR_B32 %78, %76, implicit-def dead $scc124 %81:sreg_32 = S_XOR_B32 %79, %77, implicit-def dead $scc125 %82:vgpr_32 = V_CVT_F32_U32_e64 %81, 0, 0, implicit $mode, implicit $exec126 %83:vgpr_32 = V_RCP_IFLAG_F32_e64 0, %82, 0, 0, implicit $mode, implicit $exec127 %84:vgpr_32 = V_MUL_F32_e64 0, 1333788670, 0, %83, 0, 0, implicit $mode, implicit $exec128 %85:vgpr_32 = V_CVT_U32_F32_e64 0, %84, 0, 0, implicit $mode, implicit $exec129 %86:sreg_32 = S_SUB_I32 0, %81, implicit-def dead $scc130 %87:sreg_32_xm0 = V_READFIRSTLANE_B32 %85, implicit $exec131 %88:sreg_32 = S_MUL_I32 %86, %87132 %89:sreg_32 = S_MUL_HI_U32 %87, %88133 %90:sreg_32 = S_ADD_I32 %87, %89, implicit-def dead $scc134 %91:sreg_32 = S_MUL_HI_U32 %80, %90135 %92:sreg_32 = S_MUL_I32 %91, %81136 %93:sreg_32 = S_SUB_I32 %80, %92, implicit-def dead $scc137 %94:sreg_32 = S_SUB_I32 %93, %81, implicit-def dead $scc138 S_CMP_GE_U32 %93, %81, implicit-def $scc139 %95:sreg_32 = S_CSELECT_B32 %94, %93, implicit killed $scc140 %96:sreg_32 = S_SUB_I32 %95, %81, implicit-def dead $scc141 S_CMP_GE_U32 %95, %81, implicit-def $scc142 %97:sreg_32 = S_CSELECT_B32 %96, %95, implicit killed $scc143 %98:sreg_32 = S_XOR_B32 %97, %76, implicit-def dead $scc144 %99:sreg_32 = S_SUB_I32 %98, %76, implicit-def dead $scc145 %100:sreg_32 = nsw S_SUB_I32 %17, %99, implicit-def dead $scc146 S_CMP_LT_I32 %75, %100, implicit-def $scc147 %101:sreg_32 = S_CSELECT_B32 %11, %99, implicit killed $scc148 %102:sreg_32 = S_MUL_I32 %75, %22149 %103:sreg_32 = S_SUB_I32 %48, %102, implicit-def dead $scc150 %104:sreg_32 = S_ASHR_I32 %75, 31, implicit-def dead $scc151 %105:sreg_32 = S_ADD_I32 %75, %104, implicit-def dead $scc152 %106:sreg_32 = S_XOR_B32 %105, %104, implicit-def dead $scc153 %107:sreg_32 = S_MUL_HI_U32 %106, %90154 %108:sreg_32 = S_MUL_I32 %107, %81155 %109:sreg_32 = S_SUB_I32 %106, %108, implicit-def dead $scc156 %110:sreg_32 = S_SUB_I32 %109, %81, implicit-def dead $scc157 S_CMP_GE_U32 %109, %81, implicit-def $scc158 %111:sreg_32 = S_CSELECT_B32 %110, %109, implicit killed $scc159 %112:sreg_32 = S_SUB_I32 %111, %81, implicit-def dead $scc160 S_CMP_GE_U32 %111, %81, implicit-def $scc161 %113:sreg_32 = S_CSELECT_B32 %112, %111, implicit killed $scc162 %114:sreg_32 = S_XOR_B32 %113, %104, implicit-def dead $scc163 %115:sreg_32 = S_SUB_I32 %114, %104, implicit-def dead $scc164 %116:sreg_32 = nsw S_MUL_I32 %115, %22165 %117:sreg_32 = nsw S_ADD_I32 %116, %103, implicit-def dead $scc166 %118:sreg_32 = S_ASHR_I32 %117, 31, implicit-def dead $scc167 %119:sreg_32 = S_ASHR_I32 %101, 31, implicit-def dead $scc168 %120:sreg_32 = S_XOR_B32 %118, %119, implicit-def dead $scc169 %121:sreg_32 = S_ADD_I32 %117, %118, implicit-def dead $scc170 %122:sreg_32 = S_ADD_I32 %101, %119, implicit-def dead $scc171 %123:sreg_32 = S_XOR_B32 %121, %118, implicit-def dead $scc172 %124:sreg_32 = S_XOR_B32 %122, %119, implicit-def dead $scc173 %125:vgpr_32 = V_CVT_F32_U32_e64 %124, 0, 0, implicit $mode, implicit $exec174 %126:vgpr_32 = V_RCP_IFLAG_F32_e64 0, %125, 0, 0, implicit $mode, implicit $exec175 %127:vgpr_32 = V_MUL_F32_e64 0, 1333788670, 0, %126, 0, 0, implicit $mode, implicit $exec176 %128:vgpr_32 = V_CVT_U32_F32_e64 0, %127, 0, 0, implicit $mode, implicit $exec177 %129:sreg_32 = S_SUB_I32 0, %124, implicit-def dead $scc178 %130:sreg_32_xm0 = V_READFIRSTLANE_B32 %128, implicit $exec179 %131:sreg_32 = S_MUL_I32 %129, %130180 %132:sreg_32 = S_MUL_HI_U32 %130, %131181 %133:sreg_32 = S_ADD_I32 %130, %132, implicit-def dead $scc182 %134:sreg_32 = S_MUL_HI_U32 %123, %133183 %135:sreg_32 = S_MUL_I32 %134, %124184 %136:sreg_32 = S_SUB_I32 %123, %135, implicit-def dead $scc185 %137:sreg_32 = S_ADD_I32 %134, 1, implicit-def dead $scc186 %138:sreg_32 = S_SUB_I32 %136, %124, implicit-def dead $scc187 S_CMP_GE_U32 %136, %124, implicit-def $scc188 %139:sreg_32 = S_CSELECT_B32 %137, %134, implicit $scc189 %140:sreg_32 = S_CSELECT_B32 %138, %136, implicit killed $scc190 %141:sreg_32 = S_ADD_I32 %139, 1, implicit-def dead $scc191 S_CMP_GE_U32 %140, %124, implicit-def $scc192 %142:sreg_32 = S_CSELECT_B32 %141, %139, implicit killed $scc193 %143:sreg_32 = S_XOR_B32 %142, %120, implicit-def dead $scc194 %144:sreg_32 = S_SUB_I32 %143, %120, implicit-def dead $scc195 %145:sreg_32 = S_MUL_I32 %144, %101196 %146:sreg_32 = S_SUB_I32 %117, %145, implicit-def dead $scc197 %147:sreg_32 = nsw S_SUB_I32 %75, %115, implicit-def dead $scc198 %148:sreg_32 = S_ADD_I32 %147, %146, implicit-def dead $scc199 %149:sreg_32 = S_LSHL_B32 %148, 7, implicit-def dead $scc200 %150:sreg_32 = nsw S_LSHL_B32 %144, 8, implicit-def dead $scc201 %151:vgpr_32 = nuw nsw V_LSHLREV_B32_e64 1, %2(s32), implicit $exec202 %152:vgpr_32 = V_AND_B32_e64 6, %151, implicit $exec203 %153:vgpr_32 = V_LSHRREV_B32_e64 1, %2(s32), implicit $exec204 %154:vgpr_32 = V_AND_B32_e64 126, %153, implicit $exec205 %155:vgpr_32 = nsw V_ADD_U32_e64 %149, %154, 0, implicit $exec206 undef %156.sub0:vreg_64 = nuw nsw V_LSHLREV_B32_e64 3, %152, implicit $exec207 early-clobber %157:vreg_64, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %155, %5, %156, 0, implicit $exec208 %158:vgpr_32 = V_MUL_U32_U24_e64 1032, %152, 0, implicit $exec209 %159:vgpr_32 = nuw nsw V_LSHLREV_B32_e64 3, %154, implicit $exec210 %160:vgpr_32 = V_AND_B32_e64 252, %2(s32), implicit $exec211 %161:vgpr_32 = nsw V_ADD_U32_e64 %150, %160, 0, implicit $exec212 early-clobber %162:vreg_64, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %161, %7, %156, 0, implicit $exec213 %163:vgpr_32 = V_MUL_U32_U24_e64 2056, %152, 0, implicit $exec214 %164:vgpr_32 = nuw nsw V_LSHLREV_B32_e64 3, %160, implicit $exec215 %165:vgpr_32 = nuw nsw V_LSHLREV_B32_e64 3, %2(s32), implicit $exec216 %166:vgpr_32 = V_BFE_U32_e64 %2(s32), 1, 3, implicit $exec217 %167:vgpr_32 = V_AND_OR_B32_e64 %165, 8, %166, implicit $exec218 %168:vgpr_32 = V_AND_B32_e64 128, %2(s32), implicit $exec219 %169:vgpr_32 = V_AND_B32_e64 15, %2(s32), implicit $exec220 %170:vgpr_32 = V_AND_OR_B32_e64 %153, 48, %169, implicit $exec221 undef %171.sub2:sgpr_128 = S_LSHL_B32 %6, 1, implicit-def dead $scc222 %171.sub3:sgpr_128 = S_MOV_B32 268566528223 %171.sub0:sgpr_128 = COPY %3.sub0224 %171.sub1:sgpr_128 = COPY %3.sub1225 %172:vgpr_32 = V_LSHLREV_B32_e64 1, %157.sub0, implicit $exec226 %173:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %172, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)227 %174:vgpr_32 = V_ADD_U32_e64 8, %157.sub0, 0, implicit $exec228 %175:vgpr_32 = V_LSHLREV_B32_e64 1, %174, implicit $exec229 %176:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %175, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)230 %177:vgpr_32 = V_ADD_LSHL_U32_e64 %174, %5, 1, implicit $exec231 %178:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %177, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)232 %179:vgpr_32 = V_ADD_LSHL_U32_e64 %157.sub0, %5, 1, implicit $exec233 %180:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %179, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)234 %171.sub2:sgpr_128 = S_LSHL_B32 %8, 1, implicit-def dead $scc235 %171.sub0:sgpr_128 = COPY %3.sub2236 %171.sub1:sgpr_128 = COPY %3.sub3237 %181:vgpr_32 = V_LSHLREV_B32_e64 1, %162.sub0, implicit $exec238 %182:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %181, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)239 %183:vgpr_32 = V_ADD_U32_e64 8, %162.sub0, 0, implicit $exec240 %184:vgpr_32 = V_LSHLREV_B32_e64 1, %183, implicit $exec241 %185:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %184, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)242 %186:vgpr_32 = V_ADD_LSHL_U32_e64 %183, %7, 1, implicit $exec243 %187:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %186, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)244 %188:vgpr_32 = V_ADD_U32_e64 %7, %162.sub0, 0, implicit $exec245 %189:vgpr_32 = V_LSHLREV_B32_e64 1, %188, implicit $exec246 %190:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %189, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)247 %191:vgpr_32 = V_ADD_U32_e64 %7, %188, 0, implicit $exec248 %192:vgpr_32 = V_LSHLREV_B32_e64 1, %191, implicit $exec249 %193:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %192, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)250 %194:vgpr_32 = V_ADD_U32_e64 8, %191, 0, implicit $exec251 %195:vgpr_32 = V_LSHLREV_B32_e64 1, %194, implicit $exec252 %196:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %195, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)253 %197:vgpr_32 = V_ADD_LSHL_U32_e64 %194, %7, 1, implicit $exec254 %198:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %197, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)255 %199:vgpr_32 = V_ADD_LSHL_U32_e64 %191, %7, 1, implicit $exec256 %200:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN %199, %171, 0, 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 7)257 %201:vgpr_32 = V_ADD_LSHL_U32_e64 %158, %159, 1, implicit $exec258 DS_WRITE_B128_gfx9 %201, %173, 0, 0, implicit $exec :: (store (s128), addrspace 3)259 DS_WRITE_B128_gfx9 %201, %180, 16, 0, implicit $exec :: (store (s128), addrspace 3)260 DS_WRITE_B128_gfx9 %201, %178, 2080, 0, implicit $exec :: (store (s128), addrspace 3)261 DS_WRITE_B128_gfx9 %201, %176, 2064, 0, implicit $exec :: (store (s128), addrspace 3)262 %202:vgpr_32 = V_ADD_LSHL_U32_e64 %163, %164, 1, implicit $exec263 DS_WRITE_B128_gfx9 %202, %182, 16496, 0, implicit $exec :: (store (s128), addrspace 3)264 DS_WRITE_B128_gfx9 %202, %190, 16512, 0, implicit $exec :: (store (s128), addrspace 3)265 DS_WRITE_B128_gfx9 %202, %193, 16528, 0, implicit $exec :: (store (s128), addrspace 3)266 DS_WRITE_B128_gfx9 %202, %200, 16544, 0, implicit $exec :: (store (s128), addrspace 3)267 DS_WRITE_B128_gfx9 %202, %198, 20656, 0, implicit $exec :: (store (s128), addrspace 3)268 DS_WRITE_B128_gfx9 %202, %196, 20640, 0, implicit $exec :: (store (s128), addrspace 3)269 DS_WRITE_B128_gfx9 %202, %187, 20624, 0, implicit $exec :: (store (s128), addrspace 3)270 DS_WRITE_B128_gfx9 %202, %185, 20608, 0, implicit $exec :: (store (s128), addrspace 3)271 %203:vgpr_32 = V_LSHLREV_B32_e64 1, %168, implicit $exec272 %204:vgpr_32 = V_LSHL_OR_B32_e64 %167, 4, %203, implicit $exec273 undef %205.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 0, 0, implicit $exec :: (load (s128), addrspace 3)274 %205.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 2064, 0, implicit $exec :: (load (s128), addrspace 3)275 %206:vgpr_32 = V_LSHLREV_B32_e64 4, %170, implicit $exec276 undef %207.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, 16496, 0, implicit $exec :: (load (s128), addrspace 3)277 %207.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, 20608, 0, implicit $exec :: (load (s128), addrspace 3)278 undef %208.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, 17520, 0, implicit $exec :: (load (s128), addrspace 3)279 %208.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, 21632, 0, implicit $exec :: (load (s128), addrspace 3)280 undef %209.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, 18544, 0, implicit $exec :: (load (s128), addrspace 3)281 %209.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, 22656, 0, implicit $exec :: (load (s128), addrspace 3)282 undef %210.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, 19568, 0, implicit $exec :: (load (s128), addrspace 3)283 %210.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, 23680, 0, implicit $exec :: (load (s128), addrspace 3)284 undef %211.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 512, 0, implicit $exec :: (load (s128), addrspace 3)285 %211.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 2576, 0, implicit $exec :: (load (s128), addrspace 3)286 %34.sub1:sgpr_256 = COPY %34.sub0287 %34.sub2:sgpr_256 = COPY %34.sub0288 %34.sub3:sgpr_256 = COPY %34.sub0289 %34.sub4:sgpr_256 = COPY %34.sub0290 %34.sub5:sgpr_256 = COPY %34.sub0291 %34.sub6:sgpr_256 = COPY %34.sub0292 %34.sub7:sgpr_256 = COPY %34.sub0293 %212:vreg_256 = COPY %34294 early-clobber %213:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %211, 8, %207, 8, %212, 0, 0, implicit $exec, implicit $exec295 early-clobber %214:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %211, 8, %209, 8, %212, 0, 0, implicit $exec, implicit $exec296 undef %215.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 1024, 0, implicit $exec :: (load (s128), addrspace 3)297 %215.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 3088, 0, implicit $exec :: (load (s128), addrspace 3)298 early-clobber %216:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %215, 8, %207, 8, %212, 0, 0, implicit $exec, implicit $exec299 early-clobber %217:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %215, 8, %209, 8, %212, 0, 0, implicit $exec, implicit $exec300 undef %218.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 1536, 0, implicit $exec :: (load (s128), addrspace 3)301 %218.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 3600, 0, implicit $exec :: (load (s128), addrspace 3)302 early-clobber %219:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %218, 8, %207, 8, %212, 0, 0, implicit $exec, implicit $exec303 early-clobber %220:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %218, 8, %209, 8, %212, 0, 0, implicit $exec, implicit $exec304 undef %221.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 4128, 0, implicit $exec :: (load (s128), addrspace 3)305 %221.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 6192, 0, implicit $exec :: (load (s128), addrspace 3)306 undef %222.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, 24720, 0, implicit $exec :: (load (s128), addrspace 3)307 %222.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, 28832, 0, implicit $exec :: (load (s128), addrspace 3)308 undef %223.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, 25744, 0, implicit $exec :: (load (s128), addrspace 3)309 %223.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, 29856, 0, implicit $exec :: (load (s128), addrspace 3)310 undef %224.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, 26768, 0, implicit $exec :: (load (s128), addrspace 3)311 %224.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, 30880, 0, implicit $exec :: (load (s128), addrspace 3)312 undef %225.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, 27792, 0, implicit $exec :: (load (s128), addrspace 3)313 %225.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, 31904, 0, implicit $exec :: (load (s128), addrspace 3)314 undef %226.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 4640, 0, implicit $exec :: (load (s128), addrspace 3)315 %226.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 6704, 0, implicit $exec :: (load (s128), addrspace 3)316 early-clobber %213:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %226, 8, %222, 8, %213, 0, 0, implicit $exec317 early-clobber %214:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %226, 8, %224, 8, %214, 0, 0, implicit $exec318 undef %227.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 5152, 0, implicit $exec :: (load (s128), addrspace 3)319 %227.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 7216, 0, implicit $exec :: (load (s128), addrspace 3)320 early-clobber %216:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %227, 8, %222, 8, %216, 0, 0, implicit $exec321 early-clobber %217:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %227, 8, %224, 8, %217, 0, 0, implicit $exec322 undef %228.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 5664, 0, implicit $exec :: (load (s128), addrspace 3)323 %228.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 7728, 0, implicit $exec :: (load (s128), addrspace 3)324 early-clobber %219:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %228, 8, %222, 8, %219, 0, 0, implicit $exec325 early-clobber %220:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %228, 8, %224, 8, %220, 0, 0, implicit $exec326 undef %229.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 8256, 0, implicit $exec :: (load (s128), addrspace 3)327 %229.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 10320, 0, implicit $exec :: (load (s128), addrspace 3)328 undef %230.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, -32592, 0, implicit $exec :: (load (s128), addrspace 3)329 %230.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, -28480, 0, implicit $exec :: (load (s128), addrspace 3)330 undef %231.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, -31568, 0, implicit $exec :: (load (s128), addrspace 3)331 %231.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, -27456, 0, implicit $exec :: (load (s128), addrspace 3)332 undef %232.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, -30544, 0, implicit $exec :: (load (s128), addrspace 3)333 %232.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, -26432, 0, implicit $exec :: (load (s128), addrspace 3)334 undef %233.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, -29520, 0, implicit $exec :: (load (s128), addrspace 3)335 %233.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, -25408, 0, implicit $exec :: (load (s128), addrspace 3)336 undef %234.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 8768, 0, implicit $exec :: (load (s128), addrspace 3)337 %234.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 10832, 0, implicit $exec :: (load (s128), addrspace 3)338 early-clobber %213:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %234, 8, %230, 8, %213, 0, 0, implicit $exec339 early-clobber %214:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %234, 8, %232, 8, %214, 0, 0, implicit $exec340 undef %235.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 9280, 0, implicit $exec :: (load (s128), addrspace 3)341 %235.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 11344, 0, implicit $exec :: (load (s128), addrspace 3)342 early-clobber %216:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %235, 8, %230, 8, %216, 0, 0, implicit $exec343 early-clobber %217:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %235, 8, %232, 8, %217, 0, 0, implicit $exec344 undef %236.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 9792, 0, implicit $exec :: (load (s128), addrspace 3)345 %236.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 11856, 0, implicit $exec :: (load (s128), addrspace 3)346 early-clobber %219:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %236, 8, %230, 8, %219, 0, 0, implicit $exec347 early-clobber %220:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %236, 8, %232, 8, %220, 0, 0, implicit $exec348 undef %237.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 12384, 0, implicit $exec :: (load (s128), addrspace 3)349 %237.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 14448, 0, implicit $exec :: (load (s128), addrspace 3)350 undef %238.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, -24368, 0, implicit $exec :: (load (s128), addrspace 3)351 %238.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, -20256, 0, implicit $exec :: (load (s128), addrspace 3)352 undef %239.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, -23344, 0, implicit $exec :: (load (s128), addrspace 3)353 %239.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, -19232, 0, implicit $exec :: (load (s128), addrspace 3)354 undef %240.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, -22320, 0, implicit $exec :: (load (s128), addrspace 3)355 %240.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, -18208, 0, implicit $exec :: (load (s128), addrspace 3)356 undef %241.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %206, -21296, 0, implicit $exec :: (load (s128), addrspace 3)357 %241.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %206, -17184, 0, implicit $exec :: (load (s128), addrspace 3)358 undef %242.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 12896, 0, implicit $exec :: (load (s128), addrspace 3)359 %242.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 14960, 0, implicit $exec :: (load (s128), addrspace 3)360 early-clobber %213:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %242, 8, %238, 8, %213, 0, 0, implicit $exec361 early-clobber %214:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %242, 8, %240, 8, %214, 0, 0, implicit $exec362 undef %243.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 13408, 0, implicit $exec :: (load (s128), addrspace 3)363 %243.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 15472, 0, implicit $exec :: (load (s128), addrspace 3)364 early-clobber %216:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %243, 8, %238, 8, %216, 0, 0, implicit $exec365 early-clobber %217:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %243, 8, %240, 8, %217, 0, 0, implicit $exec366 undef %244.sub0_sub1_sub2_sub3:vreg_256 = DS_READ_B128_gfx9 %204, 13920, 0, implicit $exec :: (load (s128), addrspace 3)367 %244.sub4_sub5_sub6_sub7:vreg_256 = DS_READ_B128_gfx9 %204, 15984, 0, implicit $exec :: (load (s128), addrspace 3)368 early-clobber %219:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %244, 8, %238, 8, %219, 0, 0, implicit $exec369 early-clobber %220:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %244, 8, %240, 8, %220, 0, 0, implicit $exec370 early-clobber %245:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %205, 8, %207, 8, %212, 0, 0, implicit $exec, implicit $exec371 early-clobber %246:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %205, 8, %209, 8, %212, 0, 0, implicit $exec, implicit $exec372 early-clobber %247:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %211, 8, %208, 8, %212, 0, 0, implicit $exec, implicit $exec373 early-clobber %248:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %215, 8, %208, 8, %212, 0, 0, implicit $exec, implicit $exec374 early-clobber %249:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %218, 8, %208, 8, %212, 0, 0, implicit $exec, implicit $exec375 early-clobber %245:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %221, 8, %222, 8, %245, 0, 0, implicit $exec376 early-clobber %246:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %221, 8, %224, 8, %246, 0, 0, implicit $exec377 early-clobber %247:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %226, 8, %223, 8, %247, 0, 0, implicit $exec378 early-clobber %248:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %227, 8, %223, 8, %248, 0, 0, implicit $exec379 early-clobber %249:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %228, 8, %223, 8, %249, 0, 0, implicit $exec380 early-clobber %245:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %229, 8, %230, 8, %245, 0, 0, implicit $exec381 early-clobber %246:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %229, 8, %232, 8, %246, 0, 0, implicit $exec382 early-clobber %247:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %234, 8, %231, 8, %247, 0, 0, implicit $exec383 early-clobber %248:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %235, 8, %231, 8, %248, 0, 0, implicit $exec384 early-clobber %249:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %236, 8, %231, 8, %249, 0, 0, implicit $exec385 early-clobber %245:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %237, 8, %238, 8, %245, 0, 0, implicit $exec386 early-clobber %246:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %237, 8, %240, 8, %246, 0, 0, implicit $exec387 early-clobber %247:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %242, 8, %239, 8, %247, 0, 0, implicit $exec388 early-clobber %248:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %243, 8, %239, 8, %248, 0, 0, implicit $exec389 early-clobber %249:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %244, 8, %239, 8, %249, 0, 0, implicit $exec390 early-clobber %250:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %205, 8, %210, 8, %212, 0, 0, implicit $exec, implicit $exec391 early-clobber %251:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %215, 8, %210, 8, %212, 0, 0, implicit $exec, implicit $exec392 early-clobber %252:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %218, 8, %210, 8, %212, 0, 0, implicit $exec, implicit $exec393 early-clobber %250:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %221, 8, %225, 8, %250, 0, 0, implicit $exec394 early-clobber %251:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %227, 8, %225, 8, %251, 0, 0, implicit $exec395 early-clobber %252:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %228, 8, %225, 8, %252, 0, 0, implicit $exec396 early-clobber %250:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %229, 8, %233, 8, %250, 0, 0, implicit $exec397 early-clobber %251:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %235, 8, %233, 8, %251, 0, 0, implicit $exec398 early-clobber %252:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %236, 8, %233, 8, %252, 0, 0, implicit $exec399 early-clobber %250:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %237, 8, %241, 8, %250, 0, 0, implicit $exec400 early-clobber %251:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %243, 8, %241, 8, %251, 0, 0, implicit $exec401 early-clobber %253:vreg_256 = V_WMMA_F32_16X16X16_F16_threeaddr_w32 8, %211, 8, %210, 8, %212, 0, 0, implicit $exec, implicit $exec402 early-clobber %253:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %226, 8, %225, 8, %253, 0, 0, implicit $exec403 early-clobber %253:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %234, 8, %233, 8, %253, 0, 0, implicit $exec404 early-clobber %253:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %242, 8, %241, 8, %253, 0, 0, implicit $exec405 early-clobber %212:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %205, 8, %208, 8, %212, 0, 0, implicit $exec406 early-clobber %212:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %221, 8, %223, 8, %212, 0, 0, implicit $exec407 early-clobber %212:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %229, 8, %231, 8, %212, 0, 0, implicit $exec408 early-clobber %212:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %237, 8, %239, 8, %212, 0, 0, implicit $exec409 early-clobber %252:vreg_256 = V_WMMA_F32_16X16X16_F16_twoaddr_w32 8, %244, 8, %241, 8, %252, 0, 0, implicit $exec410 %254:vgpr_32 = V_LSHRREV_B32_e64 3, %2(s32), implicit $exec411 %255:vgpr_32 = V_AND_B32_e64 8, %153, implicit $exec412 %256:vgpr_32 = V_AND_OR_B32_e64 %254, 16, %255, implicit $exec413 %257:vgpr_32 = V_AND_B32_e64 56, %165, implicit $exec414 undef %258.sub0:vreg_64 = V_OR_B32_e64 %150, %257, implicit $exec415 %259:vgpr_32 = V_OR_B32_e64 %149, %254, implicit $exec416 early-clobber %260:vreg_64, $sgpr_null = V_MAD_U64_U32_gfx11_e64 %259, %9, %258, 0, implicit $exec417 %261:vgpr_32 = V_LSHLREV_B32_e64 2, %170, implicit $exec418 %262:vgpr_32 = V_LSHL_OR_B32_e64 %256, 8, %261, implicit $exec419 DS_WRITE2ST64_B32_gfx9 %262, %245.sub0, %245.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)420 DS_WRITE2ST64_B32_gfx9 %262, %245.sub2, %245.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)421 DS_WRITE2ST64_B32_gfx9 %262, %245.sub4, %245.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)422 DS_WRITE2ST64_B32_gfx9 %262, %245.sub6, %245.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)423 %263:vgpr_32 = V_LSHLREV_B32_e64 2, %257, implicit $exec424 %264:vgpr_32 = V_LSHL_OR_B32_e64 %254, 8, %263, implicit $exec425 %265:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)426 %266:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)427 %267:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %265.sub0, 0, 0, implicit $mode, implicit $exec428 %268:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %265.sub1, 0, 0, implicit $mode, implicit $exec429 %269:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %265.sub2, 0, 0, implicit $mode, implicit $exec430 %270:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %265.sub3, 0, 0, implicit $mode, implicit $exec431 %271:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %266.sub0, 0, 0, implicit $mode, implicit $exec432 %272:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %266.sub1, 0, 0, implicit $mode, implicit $exec433 %273:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %266.sub2, 0, 0, implicit $mode, implicit $exec434 %274:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %266.sub3, 0, 0, implicit $mode, implicit $exec435 undef %275.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %273, 0, %274, 0, 0, implicit $mode, implicit $exec436 %275.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %271, 0, %272, 0, 0, implicit $mode, implicit $exec437 %275.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %269, 0, %270, 0, 0, implicit $mode, implicit $exec438 %275.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %267, 0, %268, 0, 0, implicit $mode, implicit $exec439 %4.sub2:sgpr_128 = S_LSHL_B32 %10, 1, implicit-def dead $scc440 %4.sub3:sgpr_128 = COPY %171.sub3441 %276:vgpr_32 = V_LSHLREV_B32_e64 1, %260.sub0, implicit $exec442 BUFFER_STORE_DWORDX4_OFFEN_exact %275, %276, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)443 DS_WRITE2ST64_B32_gfx9 %262, %212.sub0, %212.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)444 DS_WRITE2ST64_B32_gfx9 %262, %212.sub2, %212.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)445 DS_WRITE2ST64_B32_gfx9 %262, %212.sub4, %212.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)446 DS_WRITE2ST64_B32_gfx9 %262, %212.sub6, %212.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)447 %277:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)448 %278:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)449 %279:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %277.sub0, 0, 0, implicit $mode, implicit $exec450 %280:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %277.sub1, 0, 0, implicit $mode, implicit $exec451 %281:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %277.sub2, 0, 0, implicit $mode, implicit $exec452 %282:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %277.sub3, 0, 0, implicit $mode, implicit $exec453 %283:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %278.sub0, 0, 0, implicit $mode, implicit $exec454 %284:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %278.sub1, 0, 0, implicit $mode, implicit $exec455 %285:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %278.sub2, 0, 0, implicit $mode, implicit $exec456 %286:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %278.sub3, 0, 0, implicit $mode, implicit $exec457 undef %287.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %285, 0, %286, 0, 0, implicit $mode, implicit $exec458 %287.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %283, 0, %284, 0, 0, implicit $mode, implicit $exec459 %287.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %281, 0, %282, 0, 0, implicit $mode, implicit $exec460 %287.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %279, 0, %280, 0, 0, implicit $mode, implicit $exec461 BUFFER_STORE_DWORDX4_OFFEN_exact %287, %276, %4, 0, 128, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)462 DS_WRITE2ST64_B32_gfx9 %262, %246.sub0, %246.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)463 DS_WRITE2ST64_B32_gfx9 %262, %246.sub2, %246.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)464 DS_WRITE2ST64_B32_gfx9 %262, %246.sub4, %246.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)465 DS_WRITE2ST64_B32_gfx9 %262, %246.sub6, %246.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)466 %288:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)467 %289:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)468 %290:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %288.sub0, 0, 0, implicit $mode, implicit $exec469 %291:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %288.sub1, 0, 0, implicit $mode, implicit $exec470 %292:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %288.sub2, 0, 0, implicit $mode, implicit $exec471 %293:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %288.sub3, 0, 0, implicit $mode, implicit $exec472 %294:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %289.sub0, 0, 0, implicit $mode, implicit $exec473 %295:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %289.sub1, 0, 0, implicit $mode, implicit $exec474 %296:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %289.sub2, 0, 0, implicit $mode, implicit $exec475 %297:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %289.sub3, 0, 0, implicit $mode, implicit $exec476 undef %298.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %296, 0, %297, 0, 0, implicit $mode, implicit $exec477 %298.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %294, 0, %295, 0, 0, implicit $mode, implicit $exec478 %298.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %292, 0, %293, 0, 0, implicit $mode, implicit $exec479 %298.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %290, 0, %291, 0, 0, implicit $mode, implicit $exec480 BUFFER_STORE_DWORDX4_OFFEN_exact %298, %276, %4, 0, 256, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)481 %299:vgpr_32 = V_ADD_U32_e64 192, %260.sub0, 0, implicit $exec482 DS_WRITE2ST64_B32_gfx9 %262, %250.sub0, %250.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)483 DS_WRITE2ST64_B32_gfx9 %262, %250.sub2, %250.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)484 DS_WRITE2ST64_B32_gfx9 %262, %250.sub4, %250.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)485 DS_WRITE2ST64_B32_gfx9 %262, %250.sub6, %250.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)486 %300:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)487 %301:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)488 %302:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %300.sub0, 0, 0, implicit $mode, implicit $exec489 %303:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %300.sub1, 0, 0, implicit $mode, implicit $exec490 %304:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %300.sub2, 0, 0, implicit $mode, implicit $exec491 %305:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %300.sub3, 0, 0, implicit $mode, implicit $exec492 %306:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %301.sub0, 0, 0, implicit $mode, implicit $exec493 %307:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %301.sub1, 0, 0, implicit $mode, implicit $exec494 %308:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %301.sub2, 0, 0, implicit $mode, implicit $exec495 %309:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %301.sub3, 0, 0, implicit $mode, implicit $exec496 undef %310.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %308, 0, %309, 0, 0, implicit $mode, implicit $exec497 %310.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %306, 0, %307, 0, 0, implicit $mode, implicit $exec498 %310.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %304, 0, %305, 0, 0, implicit $mode, implicit $exec499 %310.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %302, 0, %303, 0, 0, implicit $mode, implicit $exec500 %311:vgpr_32 = V_LSHLREV_B32_e64 1, %299, implicit $exec501 BUFFER_STORE_DWORDX4_OFFEN_exact %310, %311, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)502 %312:sreg_32 = nsw S_LSHL_B32 %9, 5, implicit-def dead $scc503 DS_WRITE2ST64_B32_gfx9 %262, %253.sub0, %253.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)504 DS_WRITE2ST64_B32_gfx9 %262, %253.sub2, %253.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)505 DS_WRITE2ST64_B32_gfx9 %262, %253.sub4, %253.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)506 DS_WRITE2ST64_B32_gfx9 %262, %253.sub6, %253.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)507 %313:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)508 %314:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)509 %315:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %313.sub0, 0, 0, implicit $mode, implicit $exec510 %316:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %313.sub1, 0, 0, implicit $mode, implicit $exec511 %317:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %313.sub2, 0, 0, implicit $mode, implicit $exec512 %318:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %313.sub3, 0, 0, implicit $mode, implicit $exec513 %319:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %314.sub0, 0, 0, implicit $mode, implicit $exec514 %320:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %314.sub1, 0, 0, implicit $mode, implicit $exec515 %321:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %314.sub2, 0, 0, implicit $mode, implicit $exec516 %322:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %314.sub3, 0, 0, implicit $mode, implicit $exec517 undef %323.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %321, 0, %322, 0, 0, implicit $mode, implicit $exec518 %323.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %319, 0, %320, 0, 0, implicit $mode, implicit $exec519 %323.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %317, 0, %318, 0, 0, implicit $mode, implicit $exec520 %323.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %315, 0, %316, 0, 0, implicit $mode, implicit $exec521 %324:vgpr_32 = V_ADD_LSHL_U32_e64 %299, %312, 1, implicit $exec522 BUFFER_STORE_DWORDX4_OFFEN_exact %323, %324, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)523 DS_WRITE2ST64_B32_gfx9 %262, %214.sub0, %214.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)524 DS_WRITE2ST64_B32_gfx9 %262, %214.sub2, %214.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)525 DS_WRITE2ST64_B32_gfx9 %262, %214.sub4, %214.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)526 DS_WRITE2ST64_B32_gfx9 %262, %214.sub6, %214.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)527 %325:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)528 %326:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)529 %327:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %325.sub0, 0, 0, implicit $mode, implicit $exec530 %328:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %325.sub1, 0, 0, implicit $mode, implicit $exec531 %329:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %325.sub2, 0, 0, implicit $mode, implicit $exec532 %330:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %325.sub3, 0, 0, implicit $mode, implicit $exec533 %331:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %326.sub0, 0, 0, implicit $mode, implicit $exec534 %332:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %326.sub1, 0, 0, implicit $mode, implicit $exec535 %333:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %326.sub2, 0, 0, implicit $mode, implicit $exec536 %334:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %326.sub3, 0, 0, implicit $mode, implicit $exec537 undef %335.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %333, 0, %334, 0, 0, implicit $mode, implicit $exec538 %335.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %331, 0, %332, 0, 0, implicit $mode, implicit $exec539 %335.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %329, 0, %330, 0, 0, implicit $mode, implicit $exec540 %335.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %327, 0, %328, 0, 0, implicit $mode, implicit $exec541 %336:vgpr_32 = V_ADD_U32_e64 -128, %324, 0, implicit $exec542 BUFFER_STORE_DWORDX4_OFFEN_exact %335, %336, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)543 DS_WRITE2ST64_B32_gfx9 %262, %247.sub0, %247.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)544 DS_WRITE2ST64_B32_gfx9 %262, %247.sub2, %247.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)545 DS_WRITE2ST64_B32_gfx9 %262, %247.sub4, %247.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)546 DS_WRITE2ST64_B32_gfx9 %262, %247.sub6, %247.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)547 %337:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)548 %338:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)549 %339:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %337.sub0, 0, 0, implicit $mode, implicit $exec550 %340:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %337.sub1, 0, 0, implicit $mode, implicit $exec551 %341:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %337.sub2, 0, 0, implicit $mode, implicit $exec552 %342:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %337.sub3, 0, 0, implicit $mode, implicit $exec553 %343:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %338.sub0, 0, 0, implicit $mode, implicit $exec554 %344:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %338.sub1, 0, 0, implicit $mode, implicit $exec555 %345:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %338.sub2, 0, 0, implicit $mode, implicit $exec556 %346:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %338.sub3, 0, 0, implicit $mode, implicit $exec557 undef %347.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %345, 0, %346, 0, 0, implicit $mode, implicit $exec558 %347.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %343, 0, %344, 0, 0, implicit $mode, implicit $exec559 %347.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %341, 0, %342, 0, 0, implicit $mode, implicit $exec560 %347.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %339, 0, %340, 0, 0, implicit $mode, implicit $exec561 %348:vgpr_32 = V_ADD_U32_e64 -256, %324, 0, implicit $exec562 BUFFER_STORE_DWORDX4_OFFEN_exact %347, %348, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)563 %349:vgpr_32 = V_ADD_U32_e64 %312, %260.sub0, 0, implicit $exec564 DS_WRITE2ST64_B32_gfx9 %262, %213.sub0, %213.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)565 DS_WRITE2ST64_B32_gfx9 %262, %213.sub2, %213.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)566 DS_WRITE2ST64_B32_gfx9 %262, %213.sub4, %213.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)567 DS_WRITE2ST64_B32_gfx9 %262, %213.sub6, %213.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)568 %350:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)569 %351:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)570 %352:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %350.sub0, 0, 0, implicit $mode, implicit $exec571 %353:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %350.sub1, 0, 0, implicit $mode, implicit $exec572 %354:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %350.sub2, 0, 0, implicit $mode, implicit $exec573 %355:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %350.sub3, 0, 0, implicit $mode, implicit $exec574 %356:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %351.sub0, 0, 0, implicit $mode, implicit $exec575 %357:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %351.sub1, 0, 0, implicit $mode, implicit $exec576 %358:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %351.sub2, 0, 0, implicit $mode, implicit $exec577 %359:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %351.sub3, 0, 0, implicit $mode, implicit $exec578 undef %360.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %358, 0, %359, 0, 0, implicit $mode, implicit $exec579 %360.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %356, 0, %357, 0, 0, implicit $mode, implicit $exec580 %360.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %354, 0, %355, 0, 0, implicit $mode, implicit $exec581 %360.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %352, 0, %353, 0, 0, implicit $mode, implicit $exec582 %361:vgpr_32 = V_LSHLREV_B32_e64 1, %349, implicit $exec583 BUFFER_STORE_DWORDX4_OFFEN_exact %360, %361, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)584 %362:vgpr_32 = V_ADD_U32_e64 %312, %349, 0, implicit $exec585 DS_WRITE2ST64_B32_gfx9 %262, %216.sub0, %216.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)586 DS_WRITE2ST64_B32_gfx9 %262, %216.sub2, %216.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)587 DS_WRITE2ST64_B32_gfx9 %262, %216.sub4, %216.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)588 DS_WRITE2ST64_B32_gfx9 %262, %216.sub6, %216.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)589 %363:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)590 %364:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)591 %365:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %363.sub0, 0, 0, implicit $mode, implicit $exec592 %366:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %363.sub1, 0, 0, implicit $mode, implicit $exec593 %367:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %363.sub2, 0, 0, implicit $mode, implicit $exec594 %368:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %363.sub3, 0, 0, implicit $mode, implicit $exec595 %369:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %364.sub0, 0, 0, implicit $mode, implicit $exec596 %370:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %364.sub1, 0, 0, implicit $mode, implicit $exec597 %371:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %364.sub2, 0, 0, implicit $mode, implicit $exec598 %372:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %364.sub3, 0, 0, implicit $mode, implicit $exec599 undef %373.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %371, 0, %372, 0, 0, implicit $mode, implicit $exec600 %373.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %369, 0, %370, 0, 0, implicit $mode, implicit $exec601 %373.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %367, 0, %368, 0, 0, implicit $mode, implicit $exec602 %373.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %365, 0, %366, 0, 0, implicit $mode, implicit $exec603 %374:vgpr_32 = V_LSHLREV_B32_e64 1, %362, implicit $exec604 BUFFER_STORE_DWORDX4_OFFEN_exact %373, %374, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)605 DS_WRITE2ST64_B32_gfx9 %262, %248.sub0, %248.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)606 DS_WRITE2ST64_B32_gfx9 %262, %248.sub2, %248.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)607 DS_WRITE2ST64_B32_gfx9 %262, %248.sub4, %248.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)608 DS_WRITE2ST64_B32_gfx9 %262, %248.sub6, %248.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)609 %375:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)610 %376:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)611 %377:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %375.sub0, 0, 0, implicit $mode, implicit $exec612 %378:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %375.sub1, 0, 0, implicit $mode, implicit $exec613 %379:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %375.sub2, 0, 0, implicit $mode, implicit $exec614 %380:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %375.sub3, 0, 0, implicit $mode, implicit $exec615 %381:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %376.sub0, 0, 0, implicit $mode, implicit $exec616 %382:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %376.sub1, 0, 0, implicit $mode, implicit $exec617 %383:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %376.sub2, 0, 0, implicit $mode, implicit $exec618 %384:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %376.sub3, 0, 0, implicit $mode, implicit $exec619 undef %385.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %383, 0, %384, 0, 0, implicit $mode, implicit $exec620 %385.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %381, 0, %382, 0, 0, implicit $mode, implicit $exec621 %385.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %379, 0, %380, 0, 0, implicit $mode, implicit $exec622 %385.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %377, 0, %378, 0, 0, implicit $mode, implicit $exec623 BUFFER_STORE_DWORDX4_OFFEN_exact %385, %374, %4, 0, 128, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)624 DS_WRITE2ST64_B32_gfx9 %262, %217.sub0, %217.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)625 DS_WRITE2ST64_B32_gfx9 %262, %217.sub2, %217.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)626 DS_WRITE2ST64_B32_gfx9 %262, %217.sub4, %217.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)627 DS_WRITE2ST64_B32_gfx9 %262, %217.sub6, %217.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)628 %386:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)629 %387:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)630 %388:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %386.sub0, 0, 0, implicit $mode, implicit $exec631 %389:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %386.sub1, 0, 0, implicit $mode, implicit $exec632 %390:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %386.sub2, 0, 0, implicit $mode, implicit $exec633 %391:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %386.sub3, 0, 0, implicit $mode, implicit $exec634 %392:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %387.sub0, 0, 0, implicit $mode, implicit $exec635 %393:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %387.sub1, 0, 0, implicit $mode, implicit $exec636 %394:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %387.sub2, 0, 0, implicit $mode, implicit $exec637 %395:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %387.sub3, 0, 0, implicit $mode, implicit $exec638 undef %396.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %394, 0, %395, 0, 0, implicit $mode, implicit $exec639 %396.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %392, 0, %393, 0, 0, implicit $mode, implicit $exec640 %396.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %390, 0, %391, 0, 0, implicit $mode, implicit $exec641 %396.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %388, 0, %389, 0, 0, implicit $mode, implicit $exec642 BUFFER_STORE_DWORDX4_OFFEN_exact %396, %374, %4, 0, 256, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)643 %397:vgpr_32 = V_ADD_U32_e64 192, %362, 0, implicit $exec644 DS_WRITE2ST64_B32_gfx9 %262, %251.sub0, %251.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)645 DS_WRITE2ST64_B32_gfx9 %262, %251.sub2, %251.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)646 DS_WRITE2ST64_B32_gfx9 %262, %251.sub4, %251.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)647 DS_WRITE2ST64_B32_gfx9 %262, %251.sub6, %251.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)648 %398:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)649 %399:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)650 %400:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %398.sub0, 0, 0, implicit $mode, implicit $exec651 %401:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %398.sub1, 0, 0, implicit $mode, implicit $exec652 %402:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %398.sub2, 0, 0, implicit $mode, implicit $exec653 %403:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %398.sub3, 0, 0, implicit $mode, implicit $exec654 %404:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %399.sub0, 0, 0, implicit $mode, implicit $exec655 %405:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %399.sub1, 0, 0, implicit $mode, implicit $exec656 %406:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %399.sub2, 0, 0, implicit $mode, implicit $exec657 %407:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %399.sub3, 0, 0, implicit $mode, implicit $exec658 undef %408.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %406, 0, %407, 0, 0, implicit $mode, implicit $exec659 %408.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %404, 0, %405, 0, 0, implicit $mode, implicit $exec660 %408.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %402, 0, %403, 0, 0, implicit $mode, implicit $exec661 %408.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %400, 0, %401, 0, 0, implicit $mode, implicit $exec662 %409:vgpr_32 = V_LSHLREV_B32_e64 1, %397, implicit $exec663 BUFFER_STORE_DWORDX4_OFFEN_exact %408, %409, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)664 DS_WRITE2ST64_B32_gfx9 %262, %252.sub0, %252.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)665 DS_WRITE2ST64_B32_gfx9 %262, %252.sub2, %252.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)666 DS_WRITE2ST64_B32_gfx9 %262, %252.sub4, %252.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)667 DS_WRITE2ST64_B32_gfx9 %262, %252.sub6, %252.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)668 %410:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)669 %411:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)670 %412:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %410.sub0, 0, 0, implicit $mode, implicit $exec671 %413:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %410.sub1, 0, 0, implicit $mode, implicit $exec672 %414:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %410.sub2, 0, 0, implicit $mode, implicit $exec673 %415:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %410.sub3, 0, 0, implicit $mode, implicit $exec674 %416:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %411.sub0, 0, 0, implicit $mode, implicit $exec675 %417:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %411.sub1, 0, 0, implicit $mode, implicit $exec676 %418:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %411.sub2, 0, 0, implicit $mode, implicit $exec677 %419:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %411.sub3, 0, 0, implicit $mode, implicit $exec678 undef %420.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %418, 0, %419, 0, 0, implicit $mode, implicit $exec679 %420.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %416, 0, %417, 0, 0, implicit $mode, implicit $exec680 %420.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %414, 0, %415, 0, 0, implicit $mode, implicit $exec681 %420.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %412, 0, %413, 0, 0, implicit $mode, implicit $exec682 %421:vgpr_32 = V_ADD_LSHL_U32_e64 %397, %312, 1, implicit $exec683 BUFFER_STORE_DWORDX4_OFFEN_exact %420, %421, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)684 DS_WRITE2ST64_B32_gfx9 %262, %220.sub0, %220.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)685 DS_WRITE2ST64_B32_gfx9 %262, %220.sub2, %220.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)686 DS_WRITE2ST64_B32_gfx9 %262, %220.sub4, %220.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)687 DS_WRITE2ST64_B32_gfx9 %262, %220.sub6, %220.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)688 %422:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)689 %423:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)690 %424:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %422.sub0, 0, 0, implicit $mode, implicit $exec691 %425:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %422.sub1, 0, 0, implicit $mode, implicit $exec692 %426:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %422.sub2, 0, 0, implicit $mode, implicit $exec693 %427:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %422.sub3, 0, 0, implicit $mode, implicit $exec694 %428:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %423.sub0, 0, 0, implicit $mode, implicit $exec695 %429:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %423.sub1, 0, 0, implicit $mode, implicit $exec696 %430:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %423.sub2, 0, 0, implicit $mode, implicit $exec697 %431:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %423.sub3, 0, 0, implicit $mode, implicit $exec698 undef %432.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %430, 0, %431, 0, 0, implicit $mode, implicit $exec699 %432.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %428, 0, %429, 0, 0, implicit $mode, implicit $exec700 %432.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %426, 0, %427, 0, 0, implicit $mode, implicit $exec701 %432.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %424, 0, %425, 0, 0, implicit $mode, implicit $exec702 %433:vgpr_32 = V_ADD_U32_e64 -128, %421, 0, implicit $exec703 BUFFER_STORE_DWORDX4_OFFEN_exact %432, %433, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)704 DS_WRITE2ST64_B32_gfx9 %262, %249.sub0, %249.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)705 DS_WRITE2ST64_B32_gfx9 %262, %249.sub2, %249.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)706 DS_WRITE2ST64_B32_gfx9 %262, %249.sub4, %249.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)707 DS_WRITE2ST64_B32_gfx9 %262, %249.sub6, %249.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)708 %434:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)709 %435:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)710 %436:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %434.sub0, 0, 0, implicit $mode, implicit $exec711 %437:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %434.sub1, 0, 0, implicit $mode, implicit $exec712 %438:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %434.sub2, 0, 0, implicit $mode, implicit $exec713 %439:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %434.sub3, 0, 0, implicit $mode, implicit $exec714 %440:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %435.sub0, 0, 0, implicit $mode, implicit $exec715 %441:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %435.sub1, 0, 0, implicit $mode, implicit $exec716 %442:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %435.sub2, 0, 0, implicit $mode, implicit $exec717 %443:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %435.sub3, 0, 0, implicit $mode, implicit $exec718 undef %444.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %442, 0, %443, 0, 0, implicit $mode, implicit $exec719 %444.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %440, 0, %441, 0, 0, implicit $mode, implicit $exec720 %444.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %438, 0, %439, 0, 0, implicit $mode, implicit $exec721 %444.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %436, 0, %437, 0, 0, implicit $mode, implicit $exec722 %445:vgpr_32 = V_ADD_U32_e64 -256, %421, 0, implicit $exec723 BUFFER_STORE_DWORDX4_OFFEN_exact %444, %445, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)724 DS_WRITE2ST64_B32_gfx9 %262, %219.sub0, %219.sub1, 0, 1, 0, implicit $exec :: (store (s32), addrspace 3)725 DS_WRITE2ST64_B32_gfx9 %262, %219.sub2, %219.sub3, 2, 3, 0, implicit $exec :: (store (s32), addrspace 3)726 DS_WRITE2ST64_B32_gfx9 %262, %219.sub4, %219.sub5, 4, 5, 0, implicit $exec :: (store (s32), addrspace 3)727 DS_WRITE2ST64_B32_gfx9 %262, %219.sub6, %219.sub7, 6, 7, 0, implicit $exec :: (store (s32), addrspace 3)728 %446:vreg_128 = DS_READ_B128_gfx9 %264, 0, 0, implicit $exec :: (load (s128), addrspace 3)729 %447:vreg_128 = DS_READ_B128_gfx9 %264, 16, 0, implicit $exec :: (load (s128), addrspace 3)730 %448:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %446.sub0, 0, 0, implicit $mode, implicit $exec731 %449:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %446.sub1, 0, 0, implicit $mode, implicit $exec732 %450:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %446.sub2, 0, 0, implicit $mode, implicit $exec733 %451:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %446.sub3, 0, 0, implicit $mode, implicit $exec734 %452:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %447.sub0, 0, 0, implicit $mode, implicit $exec735 %453:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %447.sub1, 0, 0, implicit $mode, implicit $exec736 %454:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %447.sub2, 0, 0, implicit $mode, implicit $exec737 %455:vgpr_32 = V_CVT_F16_F32_fake16_e64 0, %447.sub3, 0, 0, implicit $mode, implicit $exec738 undef %456.sub3:vreg_128 = V_PACK_B32_F16_e64 0, %454, 0, %455, 0, 0, implicit $mode, implicit $exec739 %456.sub2:vreg_128 = V_PACK_B32_F16_e64 0, %452, 0, %453, 0, 0, implicit $mode, implicit $exec740 %456.sub1:vreg_128 = V_PACK_B32_F16_e64 0, %450, 0, %451, 0, 0, implicit $mode, implicit $exec741 %456.sub0:vreg_128 = V_PACK_B32_F16_e64 0, %448, 0, %449, 0, 0, implicit $mode, implicit $exec742 %457:vgpr_32 = V_ADD_LSHL_U32_e64 %362, %312, 1, implicit $exec743 BUFFER_STORE_DWORDX4_OFFEN_exact %456, %457, %4, 0, 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 7)744 S_ENDPGM 0745 746...747