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1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s3; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s4 5; FUNC-LABEL: {{^}}sdiv24_i8:6; SI: v_cvt_f32_i327; SI: v_cvt_f32_i328; SI: v_rcp_iflag_f329; SI: v_cvt_i32_f3210 11; EG: INT_TO_FLT12; EG-DAG: INT_TO_FLT13; EG-DAG: RECIP_IEEE14; EG: FLT_TO_INT15define amdgpu_kernel void @sdiv24_i8(ptr addrspace(1) %out, ptr addrspace(1) %in) {16  %den_ptr = getelementptr i8, ptr addrspace(1) %in, i8 117  %num = load i8, ptr addrspace(1) %in18  %den = load i8, ptr addrspace(1) %den_ptr19  %result = sdiv i8 %num, %den20  store i8 %result, ptr addrspace(1) %out21  ret void22}23 24; FUNC-LABEL: {{^}}sdiv24_i16:25; SI: v_cvt_f32_i3226; SI: v_cvt_f32_i3227; SI: v_rcp_iflag_f3228; SI: v_cvt_i32_f3229 30; EG: INT_TO_FLT31; EG-DAG: INT_TO_FLT32; EG-DAG: RECIP_IEEE33; EG: FLT_TO_INT34define amdgpu_kernel void @sdiv24_i16(ptr addrspace(1) %out, ptr addrspace(1) %in) {35  %den_ptr = getelementptr i16, ptr addrspace(1) %in, i16 136  %num = load i16, ptr addrspace(1) %in, align 237  %den = load i16, ptr addrspace(1) %den_ptr, align 238  %result = sdiv i16 %num, %den39  store i16 %result, ptr addrspace(1) %out, align 240  ret void41}42 43; FUNC-LABEL: {{^}}sdiv24_i32:44; SI: v_cvt_f32_i3245; SI: v_cvt_f32_i3246; SI: v_rcp_iflag_f3247; SI: v_cvt_i32_f3248 49; EG: INT_TO_FLT50; EG-DAG: INT_TO_FLT51; EG-DAG: RECIP_IEEE52; EG: FLT_TO_INT53define amdgpu_kernel void @sdiv24_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {54  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 155  %num = load i32, ptr addrspace(1) %in, align 456  %den = load i32, ptr addrspace(1) %den_ptr, align 457  %num.i24.0 = shl i32 %num, 858  %den.i24.0 = shl i32 %den, 859  %num.i24 = ashr i32 %num.i24.0, 860  %den.i24 = ashr i32 %den.i24.0, 861  %result = sdiv i32 %num.i24, %den.i2462  store i32 %result, ptr addrspace(1) %out, align 463  ret void64}65 66; FUNC-LABEL: {{^}}sdiv25_i32:67; SI-NOT: v_cvt_f32_i3268; SI-NOT: v_rcp_f3269 70; EG-NOT: INT_TO_FLT71; EG-NOT: RECIP_IEEE72define amdgpu_kernel void @sdiv25_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {73  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 174  %num = load i32, ptr addrspace(1) %in, align 475  %den = load i32, ptr addrspace(1) %den_ptr, align 476  %num.i24.0 = shl i32 %num, 777  %den.i24.0 = shl i32 %den, 778  %num.i24 = ashr i32 %num.i24.0, 779  %den.i24 = ashr i32 %den.i24.0, 780  %result = sdiv i32 %num.i24, %den.i2481  store i32 %result, ptr addrspace(1) %out, align 482  ret void83}84 85; FUNC-LABEL: {{^}}test_no_sdiv24_i32_1:86; SI-NOT: v_cvt_f32_i3287; SI-NOT: v_rcp_f3288 89; EG-NOT: INT_TO_FLT90; EG-NOT: RECIP_IEEE91define amdgpu_kernel void @test_no_sdiv24_i32_1(ptr addrspace(1) %out, ptr addrspace(1) %in) {92  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 193  %num = load i32, ptr addrspace(1) %in, align 494  %den = load i32, ptr addrspace(1) %den_ptr, align 495  %num.i24.0 = shl i32 %num, 896  %den.i24.0 = shl i32 %den, 797  %num.i24 = ashr i32 %num.i24.0, 898  %den.i24 = ashr i32 %den.i24.0, 799  %result = sdiv i32 %num.i24, %den.i24100  store i32 %result, ptr addrspace(1) %out, align 4101  ret void102}103 104; FUNC-LABEL: {{^}}test_no_sdiv24_i32_2:105; SI-NOT: v_cvt_f32_i32106; SI-NOT: v_rcp_f32107 108; EG-NOT: INT_TO_FLT109; EG-NOT: RECIP_IEEE110define amdgpu_kernel void @test_no_sdiv24_i32_2(ptr addrspace(1) %out, ptr addrspace(1) %in) {111  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1112  %num = load i32, ptr addrspace(1) %in, align 4113  %den = load i32, ptr addrspace(1) %den_ptr, align 4114  %num.i24.0 = shl i32 %num, 7115  %den.i24.0 = shl i32 %den, 8116  %num.i24 = ashr i32 %num.i24.0, 7117  %den.i24 = ashr i32 %den.i24.0, 8118  %result = sdiv i32 %num.i24, %den.i24119  store i32 %result, ptr addrspace(1) %out, align 4120  ret void121}122 123; FUNC-LABEL: {{^}}srem24_i8:124; SI: v_cvt_f32_i32125; SI: v_cvt_f32_i32126; SI: v_rcp_iflag_f32127; SI: v_cvt_i32_f32128 129; EG: INT_TO_FLT130; EG-DAG: INT_TO_FLT131; EG-DAG: RECIP_IEEE132; EG: FLT_TO_INT133define amdgpu_kernel void @srem24_i8(ptr addrspace(1) %out, ptr addrspace(1) %in) {134  %den_ptr = getelementptr i8, ptr addrspace(1) %in, i8 1135  %num = load i8, ptr addrspace(1) %in136  %den = load i8, ptr addrspace(1) %den_ptr137  %result = srem i8 %num, %den138  store i8 %result, ptr addrspace(1) %out139  ret void140}141 142; FUNC-LABEL: {{^}}srem24_i16:143; SI: v_cvt_f32_i32144; SI: v_cvt_f32_i32145; SI: v_rcp_iflag_f32146; SI: v_cvt_i32_f32147 148; EG: INT_TO_FLT149; EG-DAG: INT_TO_FLT150; EG-DAG: RECIP_IEEE151; EG: FLT_TO_INT152define amdgpu_kernel void @srem24_i16(ptr addrspace(1) %out, ptr addrspace(1) %in) {153  %den_ptr = getelementptr i16, ptr addrspace(1) %in, i16 1154  %num = load i16, ptr addrspace(1) %in, align 2155  %den = load i16, ptr addrspace(1) %den_ptr, align 2156  %result = srem i16 %num, %den157  store i16 %result, ptr addrspace(1) %out, align 2158  ret void159}160 161; FUNC-LABEL: {{^}}srem24_i32:162; SI: v_cvt_f32_i32163; SI: v_cvt_f32_i32164; SI: v_rcp_iflag_f32165; SI: v_cvt_i32_f32166 167; EG: INT_TO_FLT168; EG-DAG: INT_TO_FLT169; EG-DAG: RECIP_IEEE170; EG: FLT_TO_INT171define amdgpu_kernel void @srem24_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {172  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1173  %num = load i32, ptr addrspace(1) %in, align 4174  %den = load i32, ptr addrspace(1) %den_ptr, align 4175  %num.i24.0 = shl i32 %num, 8176  %den.i24.0 = shl i32 %den, 8177  %num.i24 = ashr i32 %num.i24.0, 8178  %den.i24 = ashr i32 %den.i24.0, 8179  %result = srem i32 %num.i24, %den.i24180  store i32 %result, ptr addrspace(1) %out, align 4181  ret void182}183 184; FUNC-LABEL: {{^}}no_srem25_i32:185; SI-NOT: v_cvt_f32_i32186; SI-NOT: v_rcp_f32187 188; EG-NOT: INT_TO_FLT189; EG-NOT: RECIP_IEEE190define amdgpu_kernel void @no_srem25_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {191  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1192  %num = load i32, ptr addrspace(1) %in, align 4193  %den = load i32, ptr addrspace(1) %den_ptr, align 4194  %num.i24.0 = shl i32 %num, 7195  %den.i24.0 = shl i32 %den, 7196  %num.i24 = ashr i32 %num.i24.0, 7197  %den.i24 = ashr i32 %den.i24.0, 7198  %result = srem i32 %num.i24, %den.i24199  store i32 %result, ptr addrspace(1) %out, align 4200  ret void201}202 203; FUNC-LABEL: {{^}}no_sdiv25_i24_i25_i32:204; SI-NOT: v_cvt_f32_i32205; SI-NOT: v_rcp_f32206 207; EG-NOT: INT_TO_FLT208; EG-NOT: RECIP_IEEE209define amdgpu_kernel void @no_sdiv25_i24_i25_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {210  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1211  %num = load i32, ptr addrspace(1) %in, align 4212  %den = load i32, ptr addrspace(1) %den_ptr, align 4213  %num.i24.0 = shl i32 %num, 8214  %den.i25.0 = shl i32 %den, 7215  %num.i24 = ashr i32 %num.i24.0, 8216  %den.i25 = ashr i32 %den.i25.0, 7217  %result = sdiv i32 %num.i24, %den.i25218  store i32 %result, ptr addrspace(1) %out, align 4219  ret void220}221 222; FUNC-LABEL: {{^}}no_sdiv25_i25_i24_i32:223; SI-NOT: v_cvt_f32_i32224; SI-NOT: v_rcp_f32225 226; EG-NOT: INT_TO_FLT227; EG-NOT: RECIP_IEEE228define amdgpu_kernel void @no_sdiv25_i25_i24_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {229  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1230  %num = load i32, ptr addrspace(1) %in, align 4231  %den = load i32, ptr addrspace(1) %den_ptr, align 4232  %num.i25.0 = shl i32 %num, 7233  %den.i24.0 = shl i32 %den, 8234  %num.i25 = ashr i32 %num.i25.0, 7235  %den.i24 = ashr i32 %den.i24.0, 8236  %result = sdiv i32 %num.i25, %den.i24237  store i32 %result, ptr addrspace(1) %out, align 4238  ret void239}240 241; FUNC-LABEL: {{^}}no_srem25_i24_i25_i32:242; SI-NOT: v_cvt_f32_i32243; SI-NOT: v_rcp_f32244 245; EG-NOT: INT_TO_FLT246; EG-NOT: RECIP_IEEE247define amdgpu_kernel void @no_srem25_i24_i25_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {248  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1249  %num = load i32, ptr addrspace(1) %in, align 4250  %den = load i32, ptr addrspace(1) %den_ptr, align 4251  %num.i24.0 = shl i32 %num, 8252  %den.i25.0 = shl i32 %den, 7253  %num.i24 = ashr i32 %num.i24.0, 8254  %den.i25 = ashr i32 %den.i25.0, 7255  %result = srem i32 %num.i24, %den.i25256  store i32 %result, ptr addrspace(1) %out, align 4257  ret void258}259 260; FUNC-LABEL: {{^}}no_srem25_i25_i24_i32:261; SI-NOT: v_cvt_f32_i32262; SI-NOT: v_rcp_f32263 264; EG-NOT: INT_TO_FLT265; EG-NOT: RECIP_IEEE266define amdgpu_kernel void @no_srem25_i25_i24_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {267  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1268  %num = load i32, ptr addrspace(1) %in, align 4269  %den = load i32, ptr addrspace(1) %den_ptr, align 4270  %num.i25.0 = shl i32 %num, 7271  %den.i24.0 = shl i32 %den, 8272  %num.i25 = ashr i32 %num.i25.0, 7273  %den.i24 = ashr i32 %den.i24.0, 8274  %result = srem i32 %num.i25, %den.i24275  store i32 %result, ptr addrspace(1) %out, align 4276  ret void277}278 279; FUNC-LABEL: {{^}}srem25_i24_i11_i32:280; SI: v_cvt_f32_i32281; SI: v_rcp_iflag_f32282; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 24283 284; EG: INT_TO_FLT285; EG: RECIP_IEEE286define amdgpu_kernel void @srem25_i24_i11_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {287  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1288  %num = load i32, ptr addrspace(1) %in, align 4289  %den = load i32, ptr addrspace(1) %den_ptr, align 4290  %num.i24.0 = shl i32 %num, 8291  %den.i11.0 = shl i32 %den, 21292  %num.i24 = ashr i32 %num.i24.0, 8293  %den.i11 = ashr i32 %den.i11.0, 21294  %result = srem i32 %num.i24, %den.i11295  store i32 %result, ptr addrspace(1) %out, align 4296  ret void297}298 299; FUNC-LABEL: {{^}}srem25_i11_i24_i32:300; SI: v_cvt_f32_i32301; SI: v_rcp_iflag_f32302; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 24303 304; EG: INT_TO_FLT305; EG: RECIP_IEEE306define amdgpu_kernel void @srem25_i11_i24_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {307  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1308  %num = load i32, ptr addrspace(1) %in, align 4309  %den = load i32, ptr addrspace(1) %den_ptr, align 4310  %num.i11.0 = shl i32 %num, 21311  %den.i24.0 = shl i32 %den, 8312  %num.i11 = ashr i32 %num.i11.0, 21313  %den.i24 = ashr i32 %den.i24.0, 8314  %result = srem i32 %num.i11, %den.i24315  store i32 %result, ptr addrspace(1) %out, align 4316  ret void317}318 319; FUNC-LABEL: {{^}}srem25_i17_i12_i32:320; SI: v_cvt_f32_i32321; SI: v_rcp_iflag_f32322; SI: v_bfe_i32 v{{[0-9]+}}, v{{[0-9]+}}, 0, 17323 324; EG: INT_TO_FLT325; EG: RECIP_IEEE326define amdgpu_kernel void @srem25_i17_i12_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) {327  %den_ptr = getelementptr i32, ptr addrspace(1) %in, i32 1328  %num = load i32, ptr addrspace(1) %in, align 4329  %den = load i32, ptr addrspace(1) %den_ptr, align 4330  %num.i17.0 = shl i32 %num, 15331  %den.i12.0 = shl i32 %den, 20332  %num.i17 = ashr i32 %num.i17.0, 15333  %den.i12 = ashr i32 %den.i12.0, 20334  %result = sdiv i32 %num.i17, %den.i12335  store i32 %result, ptr addrspace(1) %out, align 4336  ret void337}338