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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=VI %s3 4; FIXME: This one should fold to rcp5define half @select_fneg_posk_src_rcp_f16(i32 %c, half %x, half %y) {6; VI-LABEL: select_fneg_posk_src_rcp_f16:7; VI: ; %bb.0:8; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)9; VI-NEXT: v_rcp_f16_e64 v1, -v110; VI-NEXT: v_mov_b32_e32 v2, 0x400011; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v012; VI-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc13; VI-NEXT: s_setpc_b64 s[30:31]14 %cmp = icmp eq i32 %c, 015 %rcp = call half @llvm.amdgcn.rcp.f16(half %x)16 %fneg = fneg half %rcp17 %select = select i1 %cmp, half %fneg, half 2.018 ret half %select19}20 21declare half @llvm.amdgcn.rcp.f16(half) #022 23attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }24