brintos

brintos / llvm-project-archived public Read only

0
0
Text · 37.7 KiB · c402b69 Raw
1001 lines · plain
1; RUN: llc -mtriple=amdgcn -mcpu=tahiti -enable-no-signed-zeros-fp-math < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=SI %s2; RUN: llc -mtriple=amdgcn -mcpu=fiji -mattr=-flat-for-global -enable-no-signed-zeros-fp-math < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=VI %s3 4; GCN-LABEL: {{^}}add_select_fabs_fabs_f32:5; GCN: buffer_load_dword [[X:v[0-9]+]]6; GCN: buffer_load_dword [[Y:v[0-9]+]]7; GCN: buffer_load_dword [[Z:v[0-9]+]]8 9; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc10; GCN: v_add_f32_e64 v{{[0-9]+}}, |[[SELECT]]|, [[Z]]11define amdgpu_kernel void @add_select_fabs_fabs_f32(i32 %c) #0 {12  %x = load volatile float, ptr addrspace(1) poison13  %y = load volatile float, ptr addrspace(1) poison14  %z = load volatile float, ptr addrspace(1) poison15  %cmp = icmp eq i32 %c, 016  %fabs.x = call float @llvm.fabs.f32(float %x)17  %fabs.y = call float @llvm.fabs.f32(float %y)18  %select = select i1 %cmp, float %fabs.x, float %fabs.y19  %add = fadd float %select, %z20  store float %add, ptr addrspace(1) poison21  ret void22}23 24; GCN-LABEL: {{^}}add_select_multi_use_lhs_fabs_fabs_f32:25; GCN: buffer_load_dword [[X:v[0-9]+]]26; GCN: buffer_load_dword [[Y:v[0-9]+]]27; GCN: buffer_load_dword [[Z:v[0-9]+]]28; GCN: buffer_load_dword [[W:v[0-9]+]]29 30; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc31; GCN-DAG: v_add_f32_e64 v{{[0-9]+}}, |[[SELECT]]|, [[Z]]32; GCN-DAG: v_add_f32_e64 v{{[0-9]+}}, |[[X]]|, [[W]]33define amdgpu_kernel void @add_select_multi_use_lhs_fabs_fabs_f32(i32 %c) #0 {34  %x = load volatile float, ptr addrspace(1) poison35  %y = load volatile float, ptr addrspace(1) poison36  %z = load volatile float, ptr addrspace(1) poison37  %w = load volatile float, ptr addrspace(1) poison38  %cmp = icmp eq i32 %c, 039  %fabs.x = call float @llvm.fabs.f32(float %x)40  %fabs.y = call float @llvm.fabs.f32(float %y)41  %select = select i1 %cmp, float %fabs.x, float %fabs.y42  %add0 = fadd float %select, %z43  %add1 = fadd float %fabs.x, %w44  store volatile float %add0, ptr addrspace(1) poison45  store volatile float %add1, ptr addrspace(1) poison46  ret void47}48 49; GCN-LABEL: {{^}}add_select_multi_store_use_lhs_fabs_fabs_f32:50; GCN: buffer_load_dword [[X:v[0-9]+]]51; GCN: buffer_load_dword [[Y:v[0-9]+]]52; GCN: buffer_load_dword [[Z:v[0-9]+]]53 54; GCN-DAG: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc55; GCN-DAG: v_add_f32_e64 [[ADD:v[0-9]+]], |[[SELECT]]|, [[Z]]56; GCN-DAG: v_and_b32_e32 [[X_ABS:v[0-9]+]], 0x7fffffff, [[X]]57 58; GCN: buffer_store_dword [[ADD]]59; GCN: buffer_store_dword [[X_ABS]]60define amdgpu_kernel void @add_select_multi_store_use_lhs_fabs_fabs_f32(i32 %c) #0 {61  %x = load volatile float, ptr addrspace(1) poison62  %y = load volatile float, ptr addrspace(1) poison63  %z = load volatile float, ptr addrspace(1) poison64  %cmp = icmp eq i32 %c, 065  %fabs.x = call float @llvm.fabs.f32(float %x)66  %fabs.y = call float @llvm.fabs.f32(float %y)67  %select = select i1 %cmp, float %fabs.x, float %fabs.y68  %add0 = fadd float %select, %z69  store volatile float %add0, ptr addrspace(1) poison70  store volatile float %fabs.x, ptr addrspace(1) poison71  ret void72}73 74; GCN-LABEL: {{^}}add_select_multi_use_rhs_fabs_fabs_f32:75; GCN: buffer_load_dword [[X:v[0-9]+]]76; GCN: buffer_load_dword [[Y:v[0-9]+]]77; GCN: buffer_load_dword [[Z:v[0-9]+]]78; GCN: buffer_load_dword [[W:v[0-9]+]]79 80; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc81; GCN-DAG: v_add_f32_e64 v{{[0-9]+}}, |[[SELECT]]|, [[Z]]82; GCN-DAG: v_add_f32_e64 v{{[0-9]+}}, |[[Y]]|, [[W]]83define amdgpu_kernel void @add_select_multi_use_rhs_fabs_fabs_f32(i32 %c) #0 {84  %x = load volatile float, ptr addrspace(1) poison85  %y = load volatile float, ptr addrspace(1) poison86  %z = load volatile float, ptr addrspace(1) poison87  %w = load volatile float, ptr addrspace(1) poison88  %cmp = icmp eq i32 %c, 089  %fabs.x = call float @llvm.fabs.f32(float %x)90  %fabs.y = call float @llvm.fabs.f32(float %y)91  %select = select i1 %cmp, float %fabs.x, float %fabs.y92  %add0 = fadd float %select, %z93  %add1 = fadd float %fabs.y, %w94  store volatile float %add0, ptr addrspace(1) poison95  store volatile float %add1, ptr addrspace(1) poison96  ret void97}98 99; GCN-LABEL: {{^}}add_select_fabs_var_f32:100; GCN: buffer_load_dword [[X:v[0-9]+]]101; GCN: buffer_load_dword [[Y:v[0-9]+]]102; GCN: buffer_load_dword [[Z:v[0-9]+]]103 104; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[Y]], |[[X]]|,105; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]106define amdgpu_kernel void @add_select_fabs_var_f32(i32 %c) #0 {107  %x = load volatile float, ptr addrspace(1) poison108  %y = load volatile float, ptr addrspace(1) poison109  %z = load volatile float, ptr addrspace(1) poison110  %cmp = icmp eq i32 %c, 0111  %fabs.x = call float @llvm.fabs.f32(float %x)112  %select = select i1 %cmp, float %fabs.x, float %y113  %add = fadd float %select, %z114  store volatile float %add, ptr addrspace(1) poison115  ret void116}117 118; GCN-LABEL: {{^}}add_select_fabs_negk_f32:119; GCN: buffer_load_dword [[X:v[0-9]+]]120; GCN: buffer_load_dword [[Y:v[0-9]+]]121 122; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -1.0, |[[X]]|,123; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]124define amdgpu_kernel void @add_select_fabs_negk_f32(i32 %c) #0 {125  %x = load volatile float, ptr addrspace(1) poison126  %y = load volatile float, ptr addrspace(1) poison127  %cmp = icmp eq i32 %c, 0128  %fabs = call float @llvm.fabs.f32(float %x)129  %select = select i1 %cmp, float %fabs, float -1.0130  %add = fadd float %select, %y131  store volatile float %add, ptr addrspace(1) poison132  ret void133}134 135; GCN-LABEL: {{^}}add_select_fabs_negk_negk_f32:136; GCN: buffer_load_dword [[X:v[0-9]+]]137 138; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -1.0, -2.0, s139; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[X]], [[SELECT]]140define amdgpu_kernel void @add_select_fabs_negk_negk_f32(i32 %c) #0 {141  %x = load volatile float, ptr addrspace(1) poison142  %cmp = icmp eq i32 %c, 0143  %select = select i1 %cmp, float -2.0, float -1.0144  %fabs = call float @llvm.fabs.f32(float %select)145  %add = fadd float %fabs, %x146  store volatile float %add, ptr addrspace(1) poison147  ret void148}149 150; GCN-LABEL: {{^}}add_select_posk_posk_f32:151; GCN: buffer_load_dword [[X:v[0-9]+]]152 153; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 1.0, 2.0, s154; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[X]]155define amdgpu_kernel void @add_select_posk_posk_f32(i32 %c) #0 {156  %x = load volatile float, ptr addrspace(1) poison157  %cmp = icmp eq i32 %c, 0158  %select = select i1 %cmp, float 2.0, float 1.0159  %add = fadd float %select, %x160  store volatile float %add, ptr addrspace(1) poison161  ret void162}163 164; GCN-LABEL: {{^}}add_select_negk_fabs_f32:165; GCN: buffer_load_dword [[X:v[0-9]+]]166; GCN: buffer_load_dword [[Y:v[0-9]+]]167 168; GCN-DAG: s_cmp_lg_u32 s{{[0-9]+}}, 0169; GCN: s_cselect_b64 [[VCC:.*]], -1, 0170; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -1.0, |[[X]]|, [[VCC]]171; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]172define amdgpu_kernel void @add_select_negk_fabs_f32(i32 %c) #0 {173  %x = load volatile float, ptr addrspace(1) poison174  %y = load volatile float, ptr addrspace(1) poison175  %cmp = icmp eq i32 %c, 0176  %fabs = call float @llvm.fabs.f32(float %x)177  %select = select i1 %cmp, float -1.0, float %fabs178  %add = fadd float %select, %y179  store volatile float %add, ptr addrspace(1) poison180  ret void181}182 183; GCN-LABEL: {{^}}add_select_negliteralk_fabs_f32:184; GCN-DAG: buffer_load_dword [[X:v[0-9]+]]185; GCN-DAG: buffer_load_dword [[Y:v[0-9]+]]186; GCN-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0xc4800000187 188; GCN-DAG: s_cmp_lg_u32 s{{[0-9]+}}, 0189; GCN: s_cselect_b64 [[VCC:.*]], -1, 0190; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], |[[X]]|, [[VCC]]191; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]192define amdgpu_kernel void @add_select_negliteralk_fabs_f32(i32 %c) #0 {193  %x = load volatile float, ptr addrspace(1) poison194  %y = load volatile float, ptr addrspace(1) poison195  %cmp = icmp eq i32 %c, 0196  %fabs = call float @llvm.fabs.f32(float %x)197  %select = select i1 %cmp, float -1024.0, float %fabs198  %add = fadd float %select, %y199  store volatile float %add, ptr addrspace(1) poison200  ret void201}202 203; GCN-LABEL: {{^}}add_select_fabs_posk_f32:204; GCN: buffer_load_dword [[X:v[0-9]+]]205; GCN: buffer_load_dword [[Y:v[0-9]+]]206 207; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 1.0, |[[X]]|, s{{\[[0-9]+:[0-9]+\]}}208; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]209define amdgpu_kernel void @add_select_fabs_posk_f32(i32 %c) #0 {210  %x = load volatile float, ptr addrspace(1) poison211  %y = load volatile float, ptr addrspace(1) poison212 213  %cmp = icmp eq i32 %c, 0214  %fabs = call float @llvm.fabs.f32(float %x)215  %select = select i1 %cmp, float %fabs, float 1.0216  %add = fadd float %select, %y217  store volatile float %add, ptr addrspace(1) poison218  ret void219}220 221; GCN-LABEL: {{^}}add_select_posk_fabs_f32:222; GCN: buffer_load_dword [[X:v[0-9]+]]223; GCN: buffer_load_dword [[Y:v[0-9]+]]224 225; GCN-DAG: s_cmp_lg_u32 s{{[0-9]+}}, 0226; GCN: s_cselect_b64 [[VCC:.*]], -1, 0227; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 1.0, |[[X]]|, s{{\[[0-9]+:[0-9]+\]}}228; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]229define amdgpu_kernel void @add_select_posk_fabs_f32(i32 %c) #0 {230  %x = load volatile float, ptr addrspace(1) poison231  %y = load volatile float, ptr addrspace(1) poison232  %cmp = icmp eq i32 %c, 0233  %fabs = call float @llvm.fabs.f32(float %x)234  %select = select i1 %cmp, float 1.0, float %fabs235  %add = fadd float %select, %y236  store volatile float %add, ptr addrspace(1) poison237  ret void238}239 240; GCN-LABEL: {{^}}add_select_fneg_fneg_f32:241; GCN: buffer_load_dword [[X:v[0-9]+]]242; GCN: buffer_load_dword [[Y:v[0-9]+]]243; GCN: buffer_load_dword [[Z:v[0-9]+]]244 245; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc246; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]247define amdgpu_kernel void @add_select_fneg_fneg_f32(i32 %c) #0 {248  %x = load volatile float, ptr addrspace(1) poison249  %y = load volatile float, ptr addrspace(1) poison250  %z = load volatile float, ptr addrspace(1) poison251  %cmp = icmp eq i32 %c, 0252  %fneg.x = fsub float -0.0, %x253  %fneg.y = fsub float -0.0, %y254  %select = select i1 %cmp, float %fneg.x, float %fneg.y255  %add = fadd float %select, %z256  store volatile float %add, ptr addrspace(1) poison257  ret void258}259 260; GCN-LABEL: {{^}}add_select_multi_use_lhs_fneg_fneg_f32:261; GCN: buffer_load_dword [[X:v[0-9]+]]262; GCN: buffer_load_dword [[Y:v[0-9]+]]263; GCN: buffer_load_dword [[Z:v[0-9]+]]264; GCN: buffer_load_dword [[W:v[0-9]+]]265 266; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc267; GCN-DAG: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]268; GCN-DAG: v_sub_f32_e32 v{{[0-9]+}}, [[W]], [[X]]269define amdgpu_kernel void @add_select_multi_use_lhs_fneg_fneg_f32(i32 %c) #0 {270  %x = load volatile float, ptr addrspace(1) poison271  %y = load volatile float, ptr addrspace(1) poison272  %z = load volatile float, ptr addrspace(1) poison273  %w = load volatile float, ptr addrspace(1) poison274  %cmp = icmp eq i32 %c, 0275  %fneg.x = fsub float -0.0, %x276  %fneg.y = fsub float -0.0, %y277  %select = select i1 %cmp, float %fneg.x, float %fneg.y278  %add0 = fadd float %select, %z279  %add1 = fadd float %fneg.x, %w280  store volatile float %add0, ptr addrspace(1) poison281  store volatile float %add1, ptr addrspace(1) poison282  ret void283}284 285; GCN-LABEL: {{^}}add_select_multi_store_use_lhs_fneg_fneg_f32:286; GCN: buffer_load_dword [[X:v[0-9]+]]287; GCN: buffer_load_dword [[Y:v[0-9]+]]288; GCN: buffer_load_dword [[Z:v[0-9]+]]289 290; GCN-DAG: v_xor_b32_e32 [[NEG_X:v[0-9]+]], 0x80000000, [[X]]291; GCN-DAG: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc292; GCN-DAG: v_sub_f32_e32 [[ADD:v[0-9]+]], [[Z]], [[SELECT]]293 294; GCN: buffer_store_dword [[ADD]]295; GCN: buffer_store_dword [[NEG_X]]296define amdgpu_kernel void @add_select_multi_store_use_lhs_fneg_fneg_f32(i32 %c) #0 {297  %x = load volatile float, ptr addrspace(1) poison298  %y = load volatile float, ptr addrspace(1) poison299  %z = load volatile float, ptr addrspace(1) poison300  %cmp = icmp eq i32 %c, 0301  %fneg.x = fsub float -0.0, %x302  %fneg.y = fsub float -0.0, %y303  %select = select i1 %cmp, float %fneg.x, float %fneg.y304  %add0 = fadd float %select, %z305  store volatile float %add0, ptr addrspace(1) poison306  store volatile float %fneg.x, ptr addrspace(1) poison307  ret void308}309 310; GCN-LABEL: {{^}}add_select_multi_use_rhs_fneg_fneg_f32:311; GCN: buffer_load_dword [[X:v[0-9]+]]312; GCN: buffer_load_dword [[Y:v[0-9]+]]313; GCN: buffer_load_dword [[Z:v[0-9]+]]314; GCN: buffer_load_dword [[W:v[0-9]+]]315 316; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc317; GCN-DAG: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]318; GCN-DAG: v_sub_f32_e32 v{{[0-9]+}}, [[W]], [[Y]]319define amdgpu_kernel void @add_select_multi_use_rhs_fneg_fneg_f32(i32 %c) #0 {320  %x = load volatile float, ptr addrspace(1) poison321  %y = load volatile float, ptr addrspace(1) poison322  %z = load volatile float, ptr addrspace(1) poison323  %w = load volatile float, ptr addrspace(1) poison324  %cmp = icmp eq i32 %c, 0325  %fneg.x = fsub float -0.0, %x326  %fneg.y = fsub float -0.0, %y327  %select = select i1 %cmp, float %fneg.x, float %fneg.y328  %add0 = fadd float %select, %z329  %add1 = fadd float %fneg.y, %w330  store volatile float %add0, ptr addrspace(1) poison331  store volatile float %add1, ptr addrspace(1) poison332  ret void333}334 335; GCN-LABEL: {{^}}add_select_fneg_var_f32:336; GCN: buffer_load_dword [[X:v[0-9]+]]337; GCN: buffer_load_dword [[Y:v[0-9]+]]338; GCN: buffer_load_dword [[Z:v[0-9]+]]339 340; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[Y]], -[[X]],341; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]342define amdgpu_kernel void @add_select_fneg_var_f32(i32 %c) #0 {343  %x = load volatile float, ptr addrspace(1) poison344  %y = load volatile float, ptr addrspace(1) poison345  %z = load volatile float, ptr addrspace(1) poison346  %cmp = icmp eq i32 %c, 0347  %fneg.x = fsub float -0.0, %x348  %select = select i1 %cmp, float %fneg.x, float %y349  %add = fadd float %select, %z350  store volatile float %add, ptr addrspace(1) poison351  ret void352}353 354; GCN-LABEL: {{^}}add_select_fneg_negk_f32:355; GCN: buffer_load_dword [[X:v[0-9]+]]356; GCN: buffer_load_dword [[Y:v[0-9]+]]357 358; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 1.0, [[X]], vcc359; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]360define amdgpu_kernel void @add_select_fneg_negk_f32(i32 %c) #0 {361  %x = load volatile float, ptr addrspace(1) poison362  %y = load volatile float, ptr addrspace(1) poison363  %cmp = icmp eq i32 %c, 0364  %fneg.x = fsub float -0.0, %x365  %select = select i1 %cmp, float %fneg.x, float -1.0366  %add = fadd float %select, %y367  store volatile float %add, ptr addrspace(1) poison368  ret void369}370 371; GCN-LABEL: {{^}}add_select_fneg_inv2pi_f32:372; GCN-DAG: buffer_load_dword [[X:v[0-9]+]]373; GCN-DAG: buffer_load_dword [[Y:v[0-9]+]]374 375; GCN-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0xbe22f983376; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[K]], [[X]], vcc377; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]378define amdgpu_kernel void @add_select_fneg_inv2pi_f32(i32 %c) #0 {379  %x = load volatile float, ptr addrspace(1) poison380  %y = load volatile float, ptr addrspace(1) poison381  %cmp = icmp eq i32 %c, 0382  %fneg.x = fneg float %x383  %select = select i1 %cmp, float %fneg.x, float 0x3FC45F3060000000384  %add = fadd float %select, %y385  store volatile float %add, ptr addrspace(1) poison386  ret void387}388 389; GCN-LABEL: {{^}}add_select_fneg_neginv2pi_f32:390; GCN-DAG: buffer_load_dword [[X:v[0-9]+]]391; GCN-DAG: buffer_load_dword [[Y:v[0-9]+]]392; SI-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0x3e22f983393 394; SI: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[K]], [[X]], vcc395; VI: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 0.15915494, [[X]], vcc396 397; GCN: v_sub_f32_e32 v{{[0-9]+}},  [[Y]], [[SELECT]]398define amdgpu_kernel void @add_select_fneg_neginv2pi_f32(i32 %c) #0 {399  %x = load volatile float, ptr addrspace(1) poison400  %y = load volatile float, ptr addrspace(1) poison401  %cmp = icmp eq i32 %c, 0402  %fneg.x = fneg float %x403  %select = select i1 %cmp, float %fneg.x, float 0xBFC45F3060000000404  %add = fadd float %select, %y405  store volatile float %add, ptr addrspace(1) poison406  ret void407}408 409; GCN-LABEL: {{^}}add_select_negk_negk_f32:410; GCN: buffer_load_dword [[X:v[0-9]+]]411 412; GCN: s_cmp_eq_u32413; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -1.0, -2.0, s414; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[X]]415define amdgpu_kernel void @add_select_negk_negk_f32(i32 %c) #0 {416  %x = load volatile float, ptr addrspace(1) poison417  %cmp = icmp eq i32 %c, 0418  %select = select i1 %cmp, float -2.0, float -1.0419  %add = fadd float %select, %x420  store volatile float %add, ptr addrspace(1) poison421  ret void422}423 424; GCN-LABEL: {{^}}add_select_negliteralk_negliteralk_f32:425; GCN-DAG: v_mov_b32_e32 [[K0:v[0-9]+]], 0xc5000000426; GCN-DAG: v_mov_b32_e32 [[K1:v[0-9]+]], 0xc5800000427; GCN-DAG: buffer_load_dword [[X:v[0-9]+]]428 429; GCN: s_cmp_eq_u32430; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[K1]], [[K0]], vcc431; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[X]]432define amdgpu_kernel void @add_select_negliteralk_negliteralk_f32(i32 %c) #0 {433  %x = load volatile float, ptr addrspace(1) poison434  %cmp = icmp eq i32 %c, 0435  %select = select i1 %cmp, float -2048.0, float -4096.0436  %add = fadd float %select, %x437  store volatile float %add, ptr addrspace(1) poison438  ret void439}440 441; GCN-LABEL: {{^}}add_select_fneg_negk_negk_f32:442; GCN: buffer_load_dword [[X:v[0-9]+]]443 444; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 1.0, 2.0, s445; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[X]]446define amdgpu_kernel void @add_select_fneg_negk_negk_f32(i32 %c) #0 {447  %x = load volatile float, ptr addrspace(1) poison448  %cmp = icmp eq i32 %c, 0449  %select = select i1 %cmp, float -2.0, float -1.0450  %fneg.x = fsub float -0.0, %select451  %add = fadd float %fneg.x, %x452  store volatile float %add, ptr addrspace(1) poison453  ret void454}455 456; GCN-LABEL: {{^}}add_select_negk_fneg_f32:457; GCN: buffer_load_dword [[X:v[0-9]+]]458; GCN: buffer_load_dword [[Y:v[0-9]+]]459 460; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0461; GCN: s_cselect_b64 vcc, -1, 0462; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 1.0, [[X]], vcc463; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]464define amdgpu_kernel void @add_select_negk_fneg_f32(i32 %c) #0 {465  %x = load volatile float, ptr addrspace(1) poison466  %y = load volatile float, ptr addrspace(1) poison467  %cmp = icmp eq i32 %c, 0468  %fneg.x = fsub float -0.0, %x469  %select = select i1 %cmp, float -1.0, float %fneg.x470  %add = fadd float %select, %y471  store volatile float %add, ptr addrspace(1) poison472  ret void473}474 475; GCN-LABEL: {{^}}add_select_fneg_posk_f32:476; GCN: buffer_load_dword [[X:v[0-9]+]]477; GCN: buffer_load_dword [[Y:v[0-9]+]]478 479; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], -1.0, [[X]], vcc480; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]481define amdgpu_kernel void @add_select_fneg_posk_f32(i32 %c) #0 {482  %x = load volatile float, ptr addrspace(1) poison483  %y = load volatile float, ptr addrspace(1) poison484  %cmp = icmp eq i32 %c, 0485  %fneg.x = fsub float -0.0, %x486  %select = select i1 %cmp, float %fneg.x, float 1.0487  %add = fadd float %select, %y488  store volatile float %add, ptr addrspace(1) poison489  ret void490}491 492; GCN-LABEL: {{^}}add_select_posk_fneg_f32:493; GCN: buffer_load_dword [[X:v[0-9]+]]494; GCN: buffer_load_dword [[Y:v[0-9]+]]495 496; GCN: s_cmp_lg_u32 s{{[0-9]+}}, 0497; GCN: s_cselect_b64 vcc, -1, 0498; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], -1.0, [[X]], vcc499; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]500define amdgpu_kernel void @add_select_posk_fneg_f32(i32 %c) #0 {501  %x = load volatile float, ptr addrspace(1) poison502  %y = load volatile float, ptr addrspace(1) poison503  %cmp = icmp eq i32 %c, 0504  %fneg.x = fsub float -0.0, %x505  %select = select i1 %cmp, float 1.0, float %fneg.x506  %add = fadd float %select, %y507  store volatile float %add, ptr addrspace(1) poison508  ret void509}510 511; GCN-LABEL: {{^}}add_select_negfabs_fabs_f32:512; GCN: buffer_load_dword [[X:v[0-9]+]]513; GCN: buffer_load_dword [[Y:v[0-9]+]]514; GCN: buffer_load_dword [[Z:v[0-9]+]]515 516; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], |[[Y]]|, -|[[X]]|,517; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]518define amdgpu_kernel void @add_select_negfabs_fabs_f32(i32 %c) #0 {519  %x = load volatile float, ptr addrspace(1) poison520  %y = load volatile float, ptr addrspace(1) poison521  %z = load volatile float, ptr addrspace(1) poison522  %cmp = icmp eq i32 %c, 0523  %fabs.x = call float @llvm.fabs.f32(float %x)524  %fneg.fabs.x = fsub float -0.000000e+00, %fabs.x525  %fabs.y = call float @llvm.fabs.f32(float %y)526  %select = select i1 %cmp, float %fneg.fabs.x, float %fabs.y527  %add = fadd float %select, %z528  store volatile float %add, ptr addrspace(1) poison529  ret void530}531 532; GCN-LABEL: {{^}}add_select_fabs_negfabs_f32:533; GCN: buffer_load_dword [[X:v[0-9]+]]534; GCN: buffer_load_dword [[Y:v[0-9]+]]535; GCN: buffer_load_dword [[Z:v[0-9]+]]536 537; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -|[[Y]]|, |[[X]]|,538; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]539define amdgpu_kernel void @add_select_fabs_negfabs_f32(i32 %c) #0 {540  %x = load volatile float, ptr addrspace(1) poison541  %y = load volatile float, ptr addrspace(1) poison542  %z = load volatile float, ptr addrspace(1) poison543  %cmp = icmp eq i32 %c, 0544  %fabs.x = call float @llvm.fabs.f32(float %x)545  %fabs.y = call float @llvm.fabs.f32(float %y)546  %fneg.fabs.y = fsub float -0.000000e+00, %fabs.y547  %select = select i1 %cmp, float %fabs.x, float %fneg.fabs.y548  %add = fadd float %select, %z549  store volatile float %add, ptr addrspace(1) poison550  ret void551}552 553; GCN-LABEL: {{^}}add_select_neg_fabs_f32:554; GCN: buffer_load_dword [[X:v[0-9]+]]555; GCN: buffer_load_dword [[Y:v[0-9]+]]556; GCN: buffer_load_dword [[Z:v[0-9]+]]557 558; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], |[[Y]]|, -[[X]],559; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]560define amdgpu_kernel void @add_select_neg_fabs_f32(i32 %c) #0 {561  %x = load volatile float, ptr addrspace(1) poison562  %y = load volatile float, ptr addrspace(1) poison563  %z = load volatile float, ptr addrspace(1) poison564  %cmp = icmp eq i32 %c, 0565  %fneg.x = fsub float -0.000000e+00, %x566  %fabs.y = call float @llvm.fabs.f32(float %y)567  %select = select i1 %cmp, float %fneg.x, float %fabs.y568  %add = fadd float %select, %z569  store volatile float %add, ptr addrspace(1) poison570  ret void571}572 573; GCN-LABEL: {{^}}add_select_fabs_neg_f32:574; GCN: buffer_load_dword [[X:v[0-9]+]]575; GCN: buffer_load_dword [[Y:v[0-9]+]]576; GCN: buffer_load_dword [[Z:v[0-9]+]]577 578; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -[[Y]], |[[X]]|,579; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]580define amdgpu_kernel void @add_select_fabs_neg_f32(i32 %c) #0 {581  %x = load volatile float, ptr addrspace(1) poison582  %y = load volatile float, ptr addrspace(1) poison583  %z = load volatile float, ptr addrspace(1) poison584  %cmp = icmp eq i32 %c, 0585  %fabs.x = call float @llvm.fabs.f32(float %x)586  %fneg.y = fsub float -0.000000e+00, %y587  %select = select i1 %cmp, float %fabs.x, float %fneg.y588  %add = fadd float %select, %z589  store volatile float %add, ptr addrspace(1) poison590  ret void591}592 593; GCN-LABEL: {{^}}add_select_neg_negfabs_f32:594; GCN: buffer_load_dword [[X:v[0-9]+]]595; GCN: buffer_load_dword [[Y:v[0-9]+]]596; GCN: buffer_load_dword [[Z:v[0-9]+]]597 598; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], |[[Y]]|, [[X]],599; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]600define amdgpu_kernel void @add_select_neg_negfabs_f32(i32 %c) #0 {601  %x = load volatile float, ptr addrspace(1) poison602  %y = load volatile float, ptr addrspace(1) poison603  %z = load volatile float, ptr addrspace(1) poison604  %cmp = icmp eq i32 %c, 0605  %fneg.x = fsub float -0.000000e+00, %x606  %fabs.y = call float @llvm.fabs.f32(float %y)607  %fneg.fabs.y = fsub float -0.000000e+00, %fabs.y608  %select = select i1 %cmp, float %fneg.x, float %fneg.fabs.y609  %add = fadd float %select, %z610  store volatile float %add, ptr addrspace(1) poison611  ret void612}613 614; GCN-LABEL: {{^}}add_select_negfabs_neg_f32:615; GCN: buffer_load_dword [[X:v[0-9]+]]616; GCN: buffer_load_dword [[Y:v[0-9]+]]617; GCN: buffer_load_dword [[Z:v[0-9]+]]618 619; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], |[[X]]|, [[Y]],620; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]621define amdgpu_kernel void @add_select_negfabs_neg_f32(i32 %c) #0 {622  %x = load volatile float, ptr addrspace(1) poison623  %y = load volatile float, ptr addrspace(1) poison624  %z = load volatile float, ptr addrspace(1) poison625  %cmp = icmp eq i32 %c, 0626  %fabs.x = call float @llvm.fabs.f32(float %x)627  %fneg.fabs.x = fsub float -0.000000e+00, %fabs.x628  %fneg.y = fsub float -0.000000e+00, %y629  %select = select i1 %cmp, float %fneg.y, float %fneg.fabs.x630  %add = fadd float %select, %z631  store volatile float %add, ptr addrspace(1) poison632  ret void633}634 635; GCN-LABEL: {{^}}mul_select_negfabs_posk_f32:636; GCN: buffer_load_dword [[X:v[0-9]+]]637; GCN: buffer_load_dword [[Y:v[0-9]+]]638 639; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 0640; GCN: s_cselect_b64  [[VCC:.*]], -1, 0641; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 4.0, -|[[X]]|, [[VCC]]642; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]643define amdgpu_kernel void @mul_select_negfabs_posk_f32(i32 %c) #0 {644  %x = load volatile float, ptr addrspace(1) poison645  %y = load volatile float, ptr addrspace(1) poison646  %cmp = icmp eq i32 %c, 0647  %fabs.x = call float @llvm.fabs.f32(float %x)648  %fneg.fabs.x = fsub float -0.000000e+00, %fabs.x649  %select = select i1 %cmp, float %fneg.fabs.x, float 4.0650  %add = fmul float %select, %y651  store volatile float %add, ptr addrspace(1) poison652  ret void653}654 655; GCN-LABEL: {{^}}mul_select_posk_negfabs_f32:656; GCN: buffer_load_dword [[X:v[0-9]+]]657; GCN: buffer_load_dword [[Y:v[0-9]+]]658 659; GCN-DAG: s_cmp_lg_u32 s{{[0-9]+}}, 0660; GCN: s_cselect_b64  [[VCC:.*]], -1, 0661; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 4.0, -|[[X]]|, [[VCC]]662; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]663define amdgpu_kernel void @mul_select_posk_negfabs_f32(i32 %c) #0 {664  %x = load volatile float, ptr addrspace(1) poison665  %y = load volatile float, ptr addrspace(1) poison666  %cmp = icmp eq i32 %c, 0667  %fabs.x = call float @llvm.fabs.f32(float %x)668  %fneg.fabs.x = fsub float -0.000000e+00, %fabs.x669  %select = select i1 %cmp, float 4.0, float %fneg.fabs.x670  %add = fmul float %select, %y671  store volatile float %add, ptr addrspace(1) poison672  ret void673}674 675; GCN-LABEL: {{^}}mul_select_negfabs_negk_f32:676; GCN: buffer_load_dword [[X:v[0-9]+]]677; GCN: buffer_load_dword [[Y:v[0-9]+]]678 679; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -4.0, -|[[X]]|, s{{\[[0-9]+:[0-9]+\]}}680; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]681define amdgpu_kernel void @mul_select_negfabs_negk_f32(i32 %c) #0 {682  %x = load volatile float, ptr addrspace(1) poison683  %y = load volatile float, ptr addrspace(1) poison684  %cmp = icmp eq i32 %c, 0685  %fabs.x = call float @llvm.fabs.f32(float %x)686  %fneg.fabs.x = fsub float -0.000000e+00, %fabs.x687  %select = select i1 %cmp, float %fneg.fabs.x, float -4.0688  %add = fmul float %select, %y689  store volatile float %add, ptr addrspace(1) poison690  ret void691}692 693; GCN-LABEL: {{^}}mul_select_negk_negfabs_f32:694; GCN: buffer_load_dword [[X:v[0-9]+]]695; GCN: buffer_load_dword [[Y:v[0-9]+]]696 697; GCN: s_cmp_lg_u32698; GCN: s_cselect_b64 [[VCC:.*]], -1, 0699; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -4.0, -|[[X]]|, [[VCC]]700; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]701define amdgpu_kernel void @mul_select_negk_negfabs_f32(i32 %c) #0 {702  %x = load volatile float, ptr addrspace(1) poison703  %y = load volatile float, ptr addrspace(1) poison704  %cmp = icmp eq i32 %c, 0705  %fabs.x = call float @llvm.fabs.f32(float %x)706  %fneg.fabs.x = fsub float -0.000000e+00, %fabs.x707  %select = select i1 %cmp, float -4.0, float %fneg.fabs.x708  %add = fmul float %select, %y709  store volatile float %add, ptr addrspace(1) poison710  ret void711}712 713; --------------------------------------------------------------------------------714; Don't fold if fneg can fold into the source715; --------------------------------------------------------------------------------716 717; GCN-LABEL: {{^}}select_fneg_posk_src_add_f32:718; GCN: buffer_load_dword [[X:v[0-9]+]]719; GCN: buffer_load_dword [[Y:v[0-9]+]]720 721; GCN: v_sub_f32_e32 [[ADD:v[0-9]+]], -4.0, [[X]]722; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[ADD]], vcc723; GCN-NEXT: buffer_store_dword [[SELECT]]724define amdgpu_kernel void @select_fneg_posk_src_add_f32(i32 %c) #0 {725  %x = load volatile float, ptr addrspace(1) poison726  %y = load volatile float, ptr addrspace(1) poison727  %cmp = icmp eq i32 %c, 0728  %add = fadd float %x, 4.0729  %fneg = fsub float -0.0, %add730  %select = select i1 %cmp, float %fneg, float 2.0731  store volatile float %select, ptr addrspace(1) poison732  ret void733}734 735; GCN-LABEL: {{^}}select_fneg_posk_src_sub_f32:736; GCN: buffer_load_dword [[X:v[0-9]+]]737 738; GCN: v_sub_f32_e32 [[ADD:v[0-9]+]], 4.0, [[X]]739; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[ADD]], vcc740; GCN-NEXT: buffer_store_dword [[SELECT]]741define amdgpu_kernel void @select_fneg_posk_src_sub_f32(i32 %c) #0 {742  %x = load volatile float, ptr addrspace(1) poison743  %cmp = icmp eq i32 %c, 0744  %add = fsub float %x, 4.0745  %fneg = fsub float -0.0, %add746  %select = select i1 %cmp, float %fneg, float 2.0747  store volatile float %select, ptr addrspace(1) poison748  ret void749}750 751; GCN-LABEL: {{^}}select_fneg_posk_src_mul_f32:752; GCN: buffer_load_dword [[X:v[0-9]+]]753 754; GCN: v_mul_f32_e32 [[MUL:v[0-9]+]], -4.0, [[X]]755; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[MUL]], vcc756; GCN-NEXT: buffer_store_dword [[SELECT]]757define amdgpu_kernel void @select_fneg_posk_src_mul_f32(i32 %c) #0 {758  %x = load volatile float, ptr addrspace(1) poison759  %cmp = icmp eq i32 %c, 0760  %mul = fmul float %x, 4.0761  %fneg = fsub float -0.0, %mul762  %select = select i1 %cmp, float %fneg, float 2.0763  store volatile float %select, ptr addrspace(1) poison764  ret void765}766 767; GCN-LABEL: {{^}}select_fneg_posk_src_fma_f32:768; GCN: buffer_load_dword [[X:v[0-9]+]]769; GCN: buffer_load_dword [[Z:v[0-9]+]]770 771; GCN: v_fma_f32 [[FMA:v[0-9]+]], [[X]], -4.0, -[[Z]]772; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[FMA]], vcc773; GCN-NEXT: buffer_store_dword [[SELECT]]774define amdgpu_kernel void @select_fneg_posk_src_fma_f32(i32 %c) #0 {775  %x = load volatile float, ptr addrspace(1) poison776  %z = load volatile float, ptr addrspace(1) poison777  %cmp = icmp eq i32 %c, 0778  %fma = call float @llvm.fma.f32(float %x, float 4.0, float %z)779  %fneg = fsub float -0.0, %fma780  %select = select i1 %cmp, float %fneg, float 2.0781  store volatile float %select, ptr addrspace(1) poison782  ret void783}784 785; GCN-LABEL: {{^}}select_fneg_posk_src_fmad_f32:786; GCN: buffer_load_dword [[X:v[0-9]+]]787; GCN: buffer_load_dword [[Z:v[0-9]+]]788 789; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[X]], vcc790; GCN-NEXT: buffer_store_dword [[SELECT]]791define amdgpu_kernel void @select_fneg_posk_src_fmad_f32(i32 %c) #0 {792  %x = load volatile float, ptr addrspace(1) poison793  %z = load volatile float, ptr addrspace(1) poison794  %cmp = icmp eq i32 %c, 0795  %fmad = call float @llvm.fmuladd.f32(float %x, float 4.0, float %z)796  %fneg = fsub float -0.0, %fmad797  %select = select i1 %cmp, float %fneg, float 2.0798  store volatile float %select, ptr addrspace(1) poison799  ret void800}801 802; FIXME: This one should fold to rcp803; GCN-LABEL: {{^}}select_fneg_posk_src_rcp_f32:804; GCN: buffer_load_dword [[X:v[0-9]+]]805 806; GCN: v_rcp_f32_e64 [[RCP:v[0-9]+]], -[[X]]807; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[RCP]], vcc808; GCN-NEXT: buffer_store_dword [[SELECT]]809define amdgpu_kernel void @select_fneg_posk_src_rcp_f32(i32 %c) #0 {810  %x = load volatile float, ptr addrspace(1) poison811  %y = load volatile float, ptr addrspace(1) poison812  %cmp = icmp eq i32 %c, 0813  %rcp = call float @llvm.amdgcn.rcp.f32(float %x)814  %fneg = fsub float -0.0, %rcp815  %select = select i1 %cmp, float %fneg, float 2.0816  store volatile float %select, ptr addrspace(1) poison817  ret void818}819 820; GCN-LABEL: {{^}}mul_select_negfabs_posk_inv2pi_f32:821; GCN: buffer_load_dword [[X:v[0-9]+]]822; GCN: buffer_load_dword [[Y:v[0-9]+]]823 824; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 0825; GCN-DAG: s_cselect_b64  [[VCC:.*]], -1, 0826 827; SI-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0x3e22f983828; SI: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], -|[[X]]|, [[VCC]]829; SI: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]830 831; VI: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 0.15915494, -|[[X]]|, [[VCC]]832; VI: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]833define amdgpu_kernel void @mul_select_negfabs_posk_inv2pi_f32(i32 %c) #0 {834  %x = load volatile float, ptr addrspace(1) poison835  %y = load volatile float, ptr addrspace(1) poison836  %cmp = icmp eq i32 %c, 0837  %fabs.x = call float @llvm.fabs.f32(float %x)838  %fneg.fabs.x = fneg float %fabs.x839  %select = select i1 %cmp, float %fneg.fabs.x, float 0x3FC45F3060000000840  %add = fmul float %select, %y841  store volatile float %add, ptr addrspace(1) poison842  ret void843}844 845; GCN-LABEL: {{^}}mul_select_posk_inv2pi_negfabs_f32:846; GCN: buffer_load_dword [[X:v[0-9]+]]847; GCN: buffer_load_dword [[Y:v[0-9]+]]848 849; GCN-DAG: s_cmp_lg_u32 s{{[0-9]+}}, 0850 851; GCN-DAG: s_cselect_b64  [[VCC:.*]], -1, 0852 853; SI-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0x3e22f983854; SI: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], -|[[X]]|, [[VCC]]855; SI: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]856 857 858; VI: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 0.15915494, -|[[X]]|, [[VCC]]859; VI: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]860define amdgpu_kernel void @mul_select_posk_inv2pi_negfabs_f32(i32 %c) #0 {861  %x = load volatile float, ptr addrspace(1) poison862  %y = load volatile float, ptr addrspace(1) poison863  %cmp = icmp eq i32 %c, 0864  %fabs.x = call float @llvm.fabs.f32(float %x)865  %fneg.fabs.x = fneg float %fabs.x866  %select = select i1 %cmp, float 0x3FC45F3060000000, float %fneg.fabs.x867  %add = fmul float %select, %y868  store volatile float %add, ptr addrspace(1) poison869  ret void870}871 872; GCN-LABEL: {{^}}mul_select_negfabs_negk_inv2pi_f32:873; GCN: buffer_load_dword [[X:v[0-9]+]]874; GCN: buffer_load_dword [[Y:v[0-9]+]]875; GCN-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0xbe22f983876; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], -|[[X]]|, s877; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]878define amdgpu_kernel void @mul_select_negfabs_negk_inv2pi_f32(i32 %c) #0 {879  %x = load volatile float, ptr addrspace(1) poison880  %y = load volatile float, ptr addrspace(1) poison881  %cmp = icmp eq i32 %c, 0882  %fabs.x = call float @llvm.fabs.f32(float %x)883  %fneg.fabs.x = fneg float %fabs.x884  %select = select i1 %cmp, float %fneg.fabs.x, float 0xBFC45F3060000000885  %add = fmul float %select, %y886  store volatile float %add, ptr addrspace(1) poison887  ret void888}889 890; GCN-LABEL: {{^}}mul_select_negk_inv2pi_negfabs_f32:891; GCN: buffer_load_dword [[X:v[0-9]+]]892; GCN: buffer_load_dword [[Y:v[0-9]+]]893 894; GCN-DAG: v_mov_b32_e32 [[K:v[0-9]+]], 0xbe22f983895; GCN: s_cmp_lg_u32896; GCN: s_cselect_b64 s[0:1], -1, 0897; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], -|[[X]]|, s[0:1]898; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]899define amdgpu_kernel void @mul_select_negk_inv2pi_negfabs_f32(i32 %c) #0 {900  %x = load volatile float, ptr addrspace(1) poison901  %y = load volatile float, ptr addrspace(1) poison902  %cmp = icmp eq i32 %c, 0903  %fabs.x = call float @llvm.fabs.f32(float %x)904  %fneg.fabs.x = fneg float %fabs.x905  %select = select i1 %cmp, float 0xBFC45F3060000000, float %fneg.fabs.x906  %add = fmul float %select, %y907  store volatile float %add, ptr addrspace(1) poison908  ret void909}910 911; GCN-LABEL: {{^}}mul_select_negfabs_posk_0_f32:912; GCN: buffer_load_dword [[X:v[0-9]+]]913; GCN: buffer_load_dword [[Y:v[0-9]+]]914; GCN-DAG: s_cmp_eq_u32 s{{[0-9]+}}, 0915; GCN: s_cselect_b64  [[VCC:.*]], -1, 0916; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 0, -|[[X]]|, [[VCC]]917; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]918define amdgpu_kernel void @mul_select_negfabs_posk_0_f32(i32 %c) #0 {919  %x = load volatile float, ptr addrspace(1) poison920  %y = load volatile float, ptr addrspace(1) poison921  %cmp = icmp eq i32 %c, 0922  %fabs.x = call float @llvm.fabs.f32(float %x)923  %fneg.fabs.x = fneg float %fabs.x924  %select = select i1 %cmp, float %fneg.fabs.x, float 0.0925  %add = fmul float %select, %y926  store volatile float %add, ptr addrspace(1) poison927  ret void928}929 930 931; GCN-LABEL: {{^}}mul_select_posk_0_negfabs_f32:932; GCN: buffer_load_dword [[X:v[0-9]+]]933; GCN: buffer_load_dword [[Y:v[0-9]+]]934 935; GCN-DAG: s_cmp_lg_u32 s{{[0-9]+}}, 0936; GCN: s_cselect_b64  [[VCC:.*]], -1, 0937; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 0, -|[[X]]|, [[VCC]]938; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]939define amdgpu_kernel void @mul_select_posk_0_negfabs_f32(i32 %c) #0 {940  %x = load volatile float, ptr addrspace(1) poison941  %y = load volatile float, ptr addrspace(1) poison942  %cmp = icmp eq i32 %c, 0943  %fabs.x = call float @llvm.fabs.f32(float %x)944  %fneg.fabs.x = fneg float %fabs.x945  %select = select i1 %cmp, float 0.0, float %fneg.fabs.x946  %add = fmul float %select, %y947  store volatile float %add, ptr addrspace(1) poison948  ret void949}950 951; GCN-LABEL: {{^}}mul_select_negfabs_negk_0_f32:952; GCN: buffer_load_dword [[X:v[0-9]+]]953; GCN: buffer_load_dword [[Y:v[0-9]+]]954 955; GCN: v_bfrev_b32_e32 [[NEG0:v[0-9]+]], 1956; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[NEG0]], -|[[X]]|, s{{\[[0-9]+:[0-9]+\]}}957; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]958define amdgpu_kernel void @mul_select_negfabs_negk_0_f32(i32 %c) #0 {959  %x = load volatile float, ptr addrspace(1) poison960  %y = load volatile float, ptr addrspace(1) poison961  %cmp = icmp eq i32 %c, 0962  %fabs.x = call float @llvm.fabs.f32(float %x)963  %fneg.fabs.x = fneg float %fabs.x964  %select = select i1 %cmp, float %fneg.fabs.x, float -0.0965  %add = fmul float %select, %y966  store volatile float %add, ptr addrspace(1) poison967  ret void968}969 970; GCN-LABEL: {{^}}mul_select_negk_0_negfabs_f32:971; GCN: buffer_load_dword [[X:v[0-9]+]]972; GCN: buffer_load_dword [[Y:v[0-9]+]]973 974; GCN: v_bfrev_b32_e32 [[NEG0:v[0-9]+]], 1975; GCN: s_cmp_lg_u32976; GCN: s_cselect_b64 s[0:1], -1, 0977; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[NEG0]], -|[[X]]|, s[0:1]978; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]979define amdgpu_kernel void @mul_select_negk_0_negfabs_f32(i32 %c) #0 {980  %x = load volatile float, ptr addrspace(1) poison981  %y = load volatile float, ptr addrspace(1) poison982  %cmp = icmp eq i32 %c, 0983  %fabs.x = call float @llvm.fabs.f32(float %x)984  %fneg.fabs.x = fneg float %fabs.x985  %select = select i1 %cmp, float -0.0, float %fneg.fabs.x986  %add = fmul float %select, %y987  store volatile float %add, ptr addrspace(1) poison988  ret void989}990 991 992declare float @llvm.fabs.f32(float) #1993declare float @llvm.fma.f32(float, float, float) #1994declare float @llvm.fmuladd.f32(float, float, float) #1995declare float @llvm.amdgcn.rcp.f32(float) #1996declare float @llvm.amdgcn.rcp.legacy(float) #1997declare float @llvm.amdgcn.fmul.legacy(float, float) #1998 999attributes #0 = { nounwind }1000attributes #1 = { nounwind readnone }1001