brintos / llvm-project-archived public Read only

1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=hawaii < %s | FileCheck -check-prefixes=CI %s3; RUN: llc -mtriple=amdgcn -mcpu=fiji < %s | FileCheck -check-prefixes=VI %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx906 < %s | FileCheck -check-prefixes=GFX9 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s6; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s7 8define <2 x half> @add_select_fabs_fabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {9; CI-LABEL: add_select_fabs_fabs_v2f16:10; CI:       ; %bb.0:11; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)12; CI-NEXT:    v_cvt_f16_f32_e32 v3, v313; CI-NEXT:    v_cvt_f16_f32_e32 v5, v514; CI-NEXT:    v_cvt_f16_f32_e32 v2, v215; CI-NEXT:    v_cvt_f16_f32_e32 v4, v416; CI-NEXT:    v_cvt_f16_f32_e32 v7, v717; CI-NEXT:    v_cvt_f16_f32_e32 v6, v618; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|19; CI-NEXT:    v_cvt_f32_f16_e64 v5, |v5|20; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|21; CI-NEXT:    v_cvt_f32_f16_e64 v4, |v4|22; CI-NEXT:    v_cvt_f32_f16_e32 v7, v723; CI-NEXT:    v_cvt_f32_f16_e32 v6, v624; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v125; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v3, vcc26; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v027; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc28; CI-NEXT:    v_add_f32_e32 v0, v0, v629; CI-NEXT:    v_add_f32_e32 v1, v1, v730; CI-NEXT:    s_setpc_b64 s[30:31]31;32; VI-LABEL: add_select_fabs_fabs_v2f16:33; VI:       ; %bb.0:34; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)35; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v136; VI-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v237; VI-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v338; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v039; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]40; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_141; VI-NEXT:    v_add_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_142; VI-NEXT:    v_add_f16_e32 v0, v0, v443; VI-NEXT:    v_or_b32_e32 v0, v0, v144; VI-NEXT:    s_setpc_b64 s[30:31]45;46; GFX9-LABEL: add_select_fabs_fabs_v2f16:47; GFX9:       ; %bb.0:48; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)49; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v150; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v251; GFX9-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v352; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v053; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]54; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_155; GFX9-NEXT:    s_mov_b32 s4, 0x504010056; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s457; GFX9-NEXT:    v_pk_add_f16 v0, v0, v458; GFX9-NEXT:    s_setpc_b64 s[30:31]59;60; GFX11-TRUE16-LABEL: add_select_fabs_fabs_v2f16:61; GFX11-TRUE16:       ; %bb.0:62; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)63; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v064; GFX11-TRUE16-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v265; GFX11-TRUE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v366; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v167; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)68; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo69; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v2.h, v0.h, s070; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)71; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v472; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]73;74; GFX11-FAKE16-LABEL: add_select_fabs_fabs_v2f16:75; GFX11-FAKE16:       ; %bb.0:76; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)77; GFX11-FAKE16-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v378; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v079; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)80; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v381; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v282; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v283; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo84; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v185; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)86; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo87; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x504010088; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)89; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v490; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]91  %cmp = icmp eq <2 x i32> %c, zeroinitializer92  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)93  %fabs.y = call <2 x half> @llvm.fabs.v2f16(<2 x half> %y)94  %select = select <2 x i1> %cmp, <2 x half> %fabs.x, <2 x half> %fabs.y95  %add = fadd <2 x half> %select, %z96  ret <2 x half> %add97}98 99define { <2 x half>, <2 x half> } @add_select_multi_use_lhs_fabs_fabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %w, <2 x half> %z) {100; CI-LABEL: add_select_multi_use_lhs_fabs_fabs_v2f16:101; CI:       ; %bb.0:102; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)103; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3104; CI-NEXT:    v_cvt_f16_f32_e32 v5, v5105; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2106; CI-NEXT:    v_cvt_f16_f32_e32 v4, v4107; CI-NEXT:    v_cvt_f16_f32_e32 v7, v7108; CI-NEXT:    v_cvt_f16_f32_e32 v6, v6109; CI-NEXT:    v_cvt_f16_f32_e32 v9, v9110; CI-NEXT:    v_cvt_f16_f32_e32 v8, v8111; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|112; CI-NEXT:    v_cvt_f32_f16_e64 v5, |v5|113; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|114; CI-NEXT:    v_cvt_f32_f16_e64 v4, |v4|115; CI-NEXT:    v_cvt_f32_f16_e32 v7, v7116; CI-NEXT:    v_cvt_f32_f16_e32 v6, v6117; CI-NEXT:    v_cvt_f32_f16_e32 v9, v9118; CI-NEXT:    v_cvt_f32_f16_e32 v8, v8119; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1120; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v3, vcc121; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0122; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc123; CI-NEXT:    v_add_f32_e32 v0, v0, v8124; CI-NEXT:    v_add_f32_e32 v1, v1, v9125; CI-NEXT:    v_add_f32_e32 v2, v2, v6126; CI-NEXT:    v_add_f32_e32 v3, v3, v7127; CI-NEXT:    s_setpc_b64 s[30:31]128;129; VI-LABEL: add_select_multi_use_lhs_fabs_fabs_v2f16:130; VI:       ; %bb.0:131; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)132; VI-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2133; VI-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v3134; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0135; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc136; VI-NEXT:    v_lshrrev_b32_e32 v6, 16, v2137; VI-NEXT:    v_lshrrev_b32_e32 v3, 16, v3138; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1139; VI-NEXT:    v_cndmask_b32_e32 v1, v3, v6, vcc140; VI-NEXT:    v_add_f16_sdwa v1, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1141; VI-NEXT:    v_add_f16_e32 v0, v0, v5142; VI-NEXT:    v_or_b32_e32 v0, v0, v1143; VI-NEXT:    v_add_f16_sdwa v1, v6, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1144; VI-NEXT:    v_add_f16_e32 v2, v2, v4145; VI-NEXT:    v_or_b32_e32 v1, v2, v1146; VI-NEXT:    s_setpc_b64 s[30:31]147;148; GFX9-LABEL: add_select_multi_use_lhs_fabs_fabs_v2f16:149; GFX9:       ; %bb.0:150; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)151; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1152; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2153; GFX9-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v3154; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v0155; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]156; GFX9-NEXT:    v_cndmask_b32_sdwa v2, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1157; GFX9-NEXT:    s_mov_b32 s4, 0x5040100158; GFX9-NEXT:    v_perm_b32 v0, v2, v0, s4159; GFX9-NEXT:    v_pk_add_f16 v0, v0, v5160; GFX9-NEXT:    v_pk_add_f16 v1, v1, v4161; GFX9-NEXT:    s_setpc_b64 s[30:31]162;163; GFX11-TRUE16-LABEL: add_select_multi_use_lhs_fabs_fabs_v2f16:164; GFX11-TRUE16:       ; %bb.0:165; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)166; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0167; GFX11-TRUE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2168; GFX11-TRUE16-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v3169; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v1170; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)171; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, v2, v4172; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v0.l, v2.l, vcc_lo173; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)174; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v0.h, v2.h, s0175; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v5176; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]177;178; GFX11-FAKE16-LABEL: add_select_multi_use_lhs_fabs_fabs_v2f16:179; GFX11-FAKE16:       ; %bb.0:180; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)181; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2182; GFX11-FAKE16-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v3183; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0184; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)185; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v2186; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v3187; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo188; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1189; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)190; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v7, v6, vcc_lo191; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100192; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, v2, v4193; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)194; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v5195; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]196  %cmp = icmp eq <2 x i32> %c, zeroinitializer197  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)198  %fabs.y = call <2 x half> @llvm.fabs.v2f16(<2 x half> %y)199  %select = select <2 x i1> %cmp, <2 x half> %fabs.x, <2 x half> %fabs.y200  %add0 = fadd <2 x half> %select, %z201  %add1 = fadd <2 x half> %fabs.x, %w202  %insert.0 = insertvalue { <2 x half>, <2 x half> } poison, <2 x half> %add0, 0203  %insert.1 = insertvalue { <2 x half>, <2 x half> } %insert.0, <2 x half> %add1, 1204  ret { <2 x half>, <2 x half> } %insert.1205}206 207define { <2 x half>, <2 x half> } @add_select_multi_store_use_lhs_fabs_fabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {208; CI-LABEL: add_select_multi_store_use_lhs_fabs_fabs_v2f16:209; CI:       ; %bb.0:210; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)211; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3212; CI-NEXT:    v_cvt_f16_f32_e32 v5, v5213; CI-NEXT:    v_cvt_f16_f32_e32 v4, v4214; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2215; CI-NEXT:    v_cvt_f16_f32_e32 v7, v7216; CI-NEXT:    v_cvt_f16_f32_e32 v6, v6217; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|218; CI-NEXT:    v_cvt_f32_f16_e64 v5, |v5|219; CI-NEXT:    v_cvt_f32_f16_e64 v4, |v4|220; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|221; CI-NEXT:    v_cvt_f32_f16_e32 v7, v7222; CI-NEXT:    v_cvt_f32_f16_e32 v6, v6223; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1224; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v3, vcc225; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0226; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc227; CI-NEXT:    v_add_f32_e32 v0, v0, v6228; CI-NEXT:    v_add_f32_e32 v1, v1, v7229; CI-NEXT:    s_setpc_b64 s[30:31]230;231; VI-LABEL: add_select_multi_store_use_lhs_fabs_fabs_v2f16:232; VI:       ; %bb.0:233; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)234; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1235; VI-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2236; VI-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v3237; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v0238; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]239; VI-NEXT:    v_cndmask_b32_sdwa v2, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1240; VI-NEXT:    v_add_f16_sdwa v2, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1241; VI-NEXT:    v_add_f16_e32 v0, v0, v4242; VI-NEXT:    v_or_b32_e32 v0, v0, v2243; VI-NEXT:    s_setpc_b64 s[30:31]244;245; GFX9-LABEL: add_select_multi_store_use_lhs_fabs_fabs_v2f16:246; GFX9:       ; %bb.0:247; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)248; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1249; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2250; GFX9-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v3251; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v0252; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]253; GFX9-NEXT:    v_cndmask_b32_sdwa v2, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1254; GFX9-NEXT:    s_mov_b32 s4, 0x5040100255; GFX9-NEXT:    v_perm_b32 v0, v2, v0, s4256; GFX9-NEXT:    v_pk_add_f16 v0, v0, v4257; GFX9-NEXT:    s_setpc_b64 s[30:31]258;259; GFX11-TRUE16-LABEL: add_select_multi_store_use_lhs_fabs_fabs_v2f16:260; GFX11-TRUE16:       ; %bb.0:261; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)262; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0263; GFX11-TRUE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2264; GFX11-TRUE16-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v3265; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v1266; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)267; GFX11-TRUE16-NEXT:    v_mov_b32_e32 v1, v2268; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v0.l, v2.l, vcc_lo269; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)270; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v0.h, v2.h, s0271; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v4272; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]273;274; GFX11-FAKE16-LABEL: add_select_multi_store_use_lhs_fabs_fabs_v2f16:275; GFX11-FAKE16:       ; %bb.0:276; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)277; GFX11-FAKE16-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v3278; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0279; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)280; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v3281; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2282; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v2283; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo284; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1285; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)286; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo287; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100288; GFX11-FAKE16-NEXT:    v_mov_b32_e32 v1, v2289; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)290; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v4291; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]292  %cmp = icmp eq <2 x i32> %c, zeroinitializer293  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)294  %fabs.y = call <2 x half> @llvm.fabs.v2f16(<2 x half> %y)295  %select = select <2 x i1> %cmp, <2 x half> %fabs.x, <2 x half> %fabs.y296  %add0 = fadd <2 x half> %select, %z297  %insert.0 = insertvalue { <2 x half>, <2 x half> } poison, <2 x half> %add0, 0298  %insert.1 = insertvalue { <2 x half>, <2 x half> } %insert.0, <2 x half> %fabs.x, 1299  ret { <2 x half>, <2 x half> } %insert.1300}301 302define { <2 x half>, <2 x half> } @add_select_multi_use_rhs_fabs_fabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z, <2 x half> %w) {303; CI-LABEL: add_select_multi_use_rhs_fabs_fabs_v2f16:304; CI:       ; %bb.0:305; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)306; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3307; CI-NEXT:    v_cvt_f16_f32_e32 v5, v5308; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2309; CI-NEXT:    v_cvt_f16_f32_e32 v4, v4310; CI-NEXT:    v_cvt_f16_f32_e32 v9, v9311; CI-NEXT:    v_cvt_f16_f32_e32 v8, v8312; CI-NEXT:    v_cvt_f16_f32_e32 v7, v7313; CI-NEXT:    v_cvt_f16_f32_e32 v6, v6314; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|315; CI-NEXT:    v_cvt_f32_f16_e64 v5, |v5|316; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|317; CI-NEXT:    v_cvt_f32_f16_e64 v4, |v4|318; CI-NEXT:    v_cvt_f32_f16_e32 v9, v9319; CI-NEXT:    v_cvt_f32_f16_e32 v8, v8320; CI-NEXT:    v_cvt_f32_f16_e32 v7, v7321; CI-NEXT:    v_cvt_f32_f16_e32 v6, v6322; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1323; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v3, vcc324; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0325; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc326; CI-NEXT:    v_add_f32_e32 v0, v0, v6327; CI-NEXT:    v_add_f32_e32 v1, v1, v7328; CI-NEXT:    v_add_f32_e32 v2, v4, v8329; CI-NEXT:    v_add_f32_e32 v3, v5, v9330; CI-NEXT:    s_setpc_b64 s[30:31]331;332; VI-LABEL: add_select_multi_use_rhs_fabs_fabs_v2f16:333; VI:       ; %bb.0:334; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)335; VI-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2336; VI-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v3337; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0338; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc339; VI-NEXT:    v_lshrrev_b32_e32 v2, 16, v2340; VI-NEXT:    v_lshrrev_b32_e32 v6, 16, v3341; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1342; VI-NEXT:    v_cndmask_b32_e32 v1, v6, v2, vcc343; VI-NEXT:    v_add_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1344; VI-NEXT:    v_add_f16_e32 v0, v0, v4345; VI-NEXT:    v_or_b32_e32 v0, v0, v1346; VI-NEXT:    v_add_f16_sdwa v1, v6, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1347; VI-NEXT:    v_add_f16_e32 v2, v3, v5348; VI-NEXT:    v_or_b32_e32 v1, v2, v1349; VI-NEXT:    s_setpc_b64 s[30:31]350;351; GFX9-LABEL: add_select_multi_use_rhs_fabs_fabs_v2f16:352; GFX9:       ; %bb.0:353; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)354; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1355; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2356; GFX9-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v3357; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v0358; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]359; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1360; GFX9-NEXT:    s_mov_b32 s4, 0x5040100361; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s4362; GFX9-NEXT:    v_pk_add_f16 v0, v0, v4363; GFX9-NEXT:    v_pk_add_f16 v1, v2, v5364; GFX9-NEXT:    s_setpc_b64 s[30:31]365;366; GFX11-TRUE16-LABEL: add_select_multi_use_rhs_fabs_fabs_v2f16:367; GFX11-TRUE16:       ; %bb.0:368; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)369; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0370; GFX11-TRUE16-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v2371; GFX11-TRUE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v3372; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v1373; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)374; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo375; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v2.h, v0.h, s0376; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, v2, v5377; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)378; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v4379; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]380;381; GFX11-FAKE16-LABEL: add_select_multi_use_rhs_fabs_fabs_v2f16:382; GFX11-FAKE16:       ; %bb.0:383; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)384; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2385; GFX11-FAKE16-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v3386; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0387; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)388; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v2389; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v3390; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo391; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1392; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)393; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v7, v6, vcc_lo394; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100395; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, v3, v5396; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)397; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v4398; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]399  %cmp = icmp eq <2 x i32> %c, zeroinitializer400  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)401  %fabs.y = call <2 x half> @llvm.fabs.v2f16(<2 x half> %y)402  %select = select <2 x i1> %cmp, <2 x half> %fabs.x, <2 x half> %fabs.y403  %add0 = fadd <2 x half> %select, %z404  %add1 = fadd <2 x half> %fabs.y, %w405  %insert.0 = insertvalue { <2 x half>, <2 x half> } poison, <2 x half> %add0, 0406  %insert.1 = insertvalue { <2 x half>, <2 x half> } %insert.0, <2 x half> %add1, 1407  ret { <2 x half>, <2 x half> } %insert.1408}409 410define <2 x half> @add_select_fabs_var_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {411; CI-LABEL: add_select_fabs_var_v2f16:412; CI:       ; %bb.0:413; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)414; CI-NEXT:    v_cvt_f16_f32_e32 v5, v5415; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3416; CI-NEXT:    v_cvt_f16_f32_e32 v4, v4417; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2418; CI-NEXT:    v_cvt_f16_f32_e32 v7, v7419; CI-NEXT:    v_cvt_f16_f32_e32 v6, v6420; CI-NEXT:    v_cvt_f32_f16_e32 v5, v5421; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|422; CI-NEXT:    v_cvt_f32_f16_e32 v4, v4423; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|424; CI-NEXT:    v_cvt_f32_f16_e32 v7, v7425; CI-NEXT:    v_cvt_f32_f16_e32 v6, v6426; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1427; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v3, vcc428; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0429; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc430; CI-NEXT:    v_add_f32_e32 v0, v0, v6431; CI-NEXT:    v_add_f32_e32 v1, v1, v7432; CI-NEXT:    s_setpc_b64 s[30:31]433;434; VI-LABEL: add_select_fabs_var_v2f16:435; VI:       ; %bb.0:436; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)437; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1438; VI-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2439; VI-NEXT:    v_cndmask_b32_sdwa v2, v3, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1440; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0441; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v1, vcc442; VI-NEXT:    v_add_f16_sdwa v1, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1443; VI-NEXT:    v_add_f16_e32 v0, v0, v4444; VI-NEXT:    v_or_b32_e32 v0, v0, v1445; VI-NEXT:    s_setpc_b64 s[30:31]446;447; GFX9-LABEL: add_select_fabs_var_v2f16:448; GFX9:       ; %bb.0:449; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)450; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1451; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2452; GFX9-NEXT:    v_cndmask_b32_sdwa v2, v3, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1453; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0454; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v1, vcc455; GFX9-NEXT:    s_mov_b32 s4, 0x5040100456; GFX9-NEXT:    v_perm_b32 v0, v2, v0, s4457; GFX9-NEXT:    v_pk_add_f16 v0, v0, v4458; GFX9-NEXT:    s_setpc_b64 s[30:31]459;460; GFX11-TRUE16-LABEL: add_select_fabs_var_v2f16:461; GFX11-TRUE16:       ; %bb.0:462; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)463; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1464; GFX11-TRUE16-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2465; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v0466; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)467; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.h, v1.h, vcc_lo468; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, v1.l, s0469; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)470; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v4471; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]472;473; GFX11-FAKE16-LABEL: add_select_fabs_var_v2f16:474; GFX11-FAKE16:       ; %bb.0:475; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)476; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2477; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v3478; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1479; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)480; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v2481; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v5, v6, vcc_lo482; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0483; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo484; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)485; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100486; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v4487; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]488  %cmp = icmp eq <2 x i32> %c, zeroinitializer489  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)490  %select = select <2 x i1> %cmp, <2 x half> %fabs.x, <2 x half> %y491  %add = fadd <2 x half> %select, %z492  ret <2 x half> %add493}494 495define <2 x half> @add_select_fabs_negk_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {496; CI-LABEL: add_select_fabs_negk_v2f16:497; CI:       ; %bb.0:498; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)499; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3500; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2501; CI-NEXT:    v_cvt_f16_f32_e32 v5, v5502; CI-NEXT:    v_cvt_f16_f32_e32 v4, v4503; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|504; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|505; CI-NEXT:    v_cvt_f32_f16_e32 v5, v5506; CI-NEXT:    v_cvt_f32_f16_e32 v4, v4507; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1508; CI-NEXT:    v_cndmask_b32_e32 v1, -1.0, v3, vcc509; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0510; CI-NEXT:    v_cndmask_b32_e32 v0, -1.0, v2, vcc511; CI-NEXT:    v_add_f32_e32 v0, v0, v4512; CI-NEXT:    v_add_f32_e32 v1, v1, v5513; CI-NEXT:    s_setpc_b64 s[30:31]514;515; VI-LABEL: add_select_fabs_negk_v2f16:516; VI:       ; %bb.0:517; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)518; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1519; VI-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2520; VI-NEXT:    v_mov_b32_e32 v2, 0xbc00521; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v0522; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]523; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1524; VI-NEXT:    v_add_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1525; VI-NEXT:    v_add_f16_e32 v0, v0, v3526; VI-NEXT:    v_or_b32_e32 v0, v0, v1527; VI-NEXT:    s_setpc_b64 s[30:31]528;529; GFX9-LABEL: add_select_fabs_negk_v2f16:530; GFX9:       ; %bb.0:531; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)532; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1533; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2534; GFX9-NEXT:    v_mov_b32_e32 v2, 0xbc00535; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v0536; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]537; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1538; GFX9-NEXT:    s_mov_b32 s4, 0x5040100539; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s4540; GFX9-NEXT:    v_pk_add_f16 v0, v0, v3541; GFX9-NEXT:    s_setpc_b64 s[30:31]542;543; GFX11-TRUE16-LABEL: add_select_fabs_negk_v2f16:544; GFX11-TRUE16:       ; %bb.0:545; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)546; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0547; GFX11-TRUE16-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v2548; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v1549; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)550; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0xbc00, v0.l, vcc_lo551; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0xbc00, v0.h, s0552; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)553; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v3554; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]555;556; GFX11-FAKE16-LABEL: add_select_fabs_negk_v2f16:557; GFX11-FAKE16:       ; %bb.0:558; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)559; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2560; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0561; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)562; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v2563; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xbc00, v2, vcc_lo564; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1565; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xbc00, v4, vcc_lo566; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)567; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100568; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v3569; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]570  %cmp = icmp eq <2 x i32> %c, zeroinitializer571  %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)572  %select = select <2 x i1> %cmp, <2 x half> %fabs, <2 x half> <half -1.0, half -1.0>573  %add = fadd <2 x half> %select, %y574  ret <2 x half> %add575}576 577; FIXME: fabs should fold away578define <2 x half> @add_select_fabs_negk_negk_v2f16(<2 x i32> %c, <2 x half> %x) {579; CI-LABEL: add_select_fabs_negk_negk_v2f16:580; CI:       ; %bb.0:581; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)582; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3583; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2584; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1585; CI-NEXT:    v_cndmask_b32_e64 v1, -1.0, -2.0, vcc586; CI-NEXT:    v_cvt_f32_f16_e32 v3, v3587; CI-NEXT:    v_cvt_f32_f16_e32 v2, v2588; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0589; CI-NEXT:    v_cndmask_b32_e64 v0, -1.0, -2.0, vcc590; CI-NEXT:    v_sub_f32_e32 v1, v3, v1591; CI-NEXT:    v_sub_f32_e32 v0, v2, v0592; CI-NEXT:    s_setpc_b64 s[30:31]593;594; VI-LABEL: add_select_fabs_negk_negk_v2f16:595; VI:       ; %bb.0:596; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)597; VI-NEXT:    v_mov_b32_e32 v3, 0xbc00598; VI-NEXT:    v_mov_b32_e32 v4, 0xc000599; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0600; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc601; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1602; VI-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc603; VI-NEXT:    v_sub_f16_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD604; VI-NEXT:    v_sub_f16_e32 v0, v2, v0605; VI-NEXT:    v_or_b32_e32 v0, v0, v1606; VI-NEXT:    s_setpc_b64 s[30:31]607;608; GFX9-LABEL: add_select_fabs_negk_negk_v2f16:609; GFX9:       ; %bb.0:610; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)611; GFX9-NEXT:    v_mov_b32_e32 v3, 0xbc00612; GFX9-NEXT:    v_mov_b32_e32 v4, 0xc000613; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1614; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc615; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0616; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc617; GFX9-NEXT:    v_pack_b32_f16 v0, v0, v1618; GFX9-NEXT:    v_pk_add_f16 v0, v2, v0 neg_lo:[0,1] neg_hi:[0,1]619; GFX9-NEXT:    s_setpc_b64 s[30:31]620;621; GFX11-TRUE16-LABEL: add_select_fabs_negk_negk_v2f16:622; GFX11-TRUE16:       ; %bb.0:623; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)624; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.l, 0xbc00625; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1626; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v0627; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)628; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, 0xc000, vcc_lo629; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.l, 0xc000, s0630; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)631; GFX11-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.h, v0.l632; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v2, v0 neg_lo:[0,1] neg_hi:[0,1]633; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]634;635; GFX11-FAKE16-LABEL: add_select_fabs_negk_negk_v2f16:636; GFX11-FAKE16:       ; %bb.0:637; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)638; GFX11-FAKE16-NEXT:    v_mov_b32_e32 v3, 0xc000639; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1640; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)641; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xbc00, v3, vcc_lo642; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0643; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xbc00, v3, vcc_lo644; GFX11-FAKE16-NEXT:    v_pack_b32_f16 v0, v0, v1645; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)646; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v2, v0 neg_lo:[0,1] neg_hi:[0,1]647; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]648  %cmp = icmp eq <2 x i32> %c, zeroinitializer649  %select = select <2 x i1> %cmp, <2 x half> <half -2.0, half -2.0>, <2 x half> <half -1.0, half -1.0>650  %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %select)651  %add = fadd <2 x half> %fabs, %x652  ret <2 x half> %add653}654 655define <2 x half> @add_select_posk_posk_v2f16(<2 x i32> %c, <2 x half> %x) {656; CI-LABEL: add_select_posk_posk_v2f16:657; CI:       ; %bb.0:658; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)659; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3660; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2661; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1662; CI-NEXT:    v_cndmask_b32_e64 v1, 1.0, 2.0, vcc663; CI-NEXT:    v_cvt_f32_f16_e32 v3, v3664; CI-NEXT:    v_cvt_f32_f16_e32 v2, v2665; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0666; CI-NEXT:    v_cndmask_b32_e64 v0, 1.0, 2.0, vcc667; CI-NEXT:    v_add_f32_e32 v1, v1, v3668; CI-NEXT:    v_add_f32_e32 v0, v0, v2669; CI-NEXT:    s_setpc_b64 s[30:31]670;671; VI-LABEL: add_select_posk_posk_v2f16:672; VI:       ; %bb.0:673; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)674; VI-NEXT:    v_mov_b32_e32 v3, 0x3c00675; VI-NEXT:    v_mov_b32_e32 v4, 0x4000676; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0677; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc678; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1679; VI-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc680; VI-NEXT:    v_add_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1681; VI-NEXT:    v_add_f16_e32 v0, v0, v2682; VI-NEXT:    v_or_b32_e32 v0, v0, v1683; VI-NEXT:    s_setpc_b64 s[30:31]684;685; GFX9-LABEL: add_select_posk_posk_v2f16:686; GFX9:       ; %bb.0:687; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)688; GFX9-NEXT:    v_mov_b32_e32 v3, 0x3c00689; GFX9-NEXT:    v_mov_b32_e32 v4, 0x4000690; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1691; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc692; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0693; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc694; GFX9-NEXT:    v_pack_b32_f16 v0, v0, v1695; GFX9-NEXT:    v_pk_add_f16 v0, v0, v2696; GFX9-NEXT:    s_setpc_b64 s[30:31]697;698; GFX11-TRUE16-LABEL: add_select_posk_posk_v2f16:699; GFX11-TRUE16:       ; %bb.0:700; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)701; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.l, 0x3c00702; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1703; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v0704; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)705; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, 0x4000, vcc_lo706; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.l, 0x4000, s0707; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)708; GFX11-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.h, v0.l709; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v2710; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]711;712; GFX11-FAKE16-LABEL: add_select_posk_posk_v2f16:713; GFX11-FAKE16:       ; %bb.0:714; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)715; GFX11-FAKE16-NEXT:    v_mov_b32_e32 v3, 0x4000716; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1717; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)718; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x3c00, v3, vcc_lo719; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0720; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x3c00, v3, vcc_lo721; GFX11-FAKE16-NEXT:    v_pack_b32_f16 v0, v0, v1722; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)723; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v2724; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]725  %cmp = icmp eq <2 x i32> %c, zeroinitializer726  %select = select <2 x i1> %cmp, <2 x half> <half 2.0, half 2.0>, <2 x half> <half 1.0, half 1.0>727  %add = fadd <2 x half> %select, %x728  ret <2 x half> %add729}730 731define <2 x half> @add_select_negk_fabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {732; CI-LABEL: add_select_negk_fabs_v2f16:733; CI:       ; %bb.0:734; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)735; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3736; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2737; CI-NEXT:    v_cvt_f16_f32_e32 v5, v5738; CI-NEXT:    v_cvt_f16_f32_e32 v4, v4739; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|740; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|741; CI-NEXT:    v_cvt_f32_f16_e32 v5, v5742; CI-NEXT:    v_cvt_f32_f16_e32 v4, v4743; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1744; CI-NEXT:    v_cndmask_b32_e32 v1, -1.0, v3, vcc745; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0746; CI-NEXT:    v_cndmask_b32_e32 v0, -1.0, v2, vcc747; CI-NEXT:    v_add_f32_e32 v0, v0, v4748; CI-NEXT:    v_add_f32_e32 v1, v1, v5749; CI-NEXT:    s_setpc_b64 s[30:31]750;751; VI-LABEL: add_select_negk_fabs_v2f16:752; VI:       ; %bb.0:753; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)754; VI-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2755; VI-NEXT:    v_mov_b32_e32 v4, 0xbc00756; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0757; VI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc758; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1759; VI-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1760; VI-NEXT:    v_add_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1761; VI-NEXT:    v_add_f16_e32 v0, v0, v3762; VI-NEXT:    v_or_b32_e32 v0, v0, v1763; VI-NEXT:    s_setpc_b64 s[30:31]764;765; GFX9-LABEL: add_select_negk_fabs_v2f16:766; GFX9:       ; %bb.0:767; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)768; GFX9-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2769; GFX9-NEXT:    v_mov_b32_e32 v4, 0xbc00770; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0771; GFX9-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc772; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1773; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1774; GFX9-NEXT:    s_mov_b32 s4, 0x5040100775; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s4776; GFX9-NEXT:    v_pk_add_f16 v0, v0, v3777; GFX9-NEXT:    s_setpc_b64 s[30:31]778;779; GFX11-TRUE16-LABEL: add_select_negk_fabs_v2f16:780; GFX11-TRUE16:       ; %bb.0:781; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)782; GFX11-TRUE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2783; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v0784; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e64 s0, 0, v1785; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)786; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0xbc00, v2.l, vcc_lo787; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0xbc00, v2.h, s0788; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)789; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v3790; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]791;792; GFX11-FAKE16-LABEL: add_select_negk_fabs_v2f16:793; GFX11-FAKE16:       ; %bb.0:794; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)795; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2796; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v0797; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)798; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v2799; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xbc00, v2, vcc_lo800; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v1801; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xbc00, v4, vcc_lo802; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)803; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100804; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v3805; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]806  %cmp = icmp eq <2 x i32> %c, zeroinitializer807  %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)808  %select = select <2 x i1> %cmp, <2 x half> <half -1.0, half -1.0>, <2 x half> %fabs809  %add = fadd <2 x half> %select, %y810  ret <2 x half> %add811}812 813define <2 x half> @add_select_negliteralk_fabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {814; CI-LABEL: add_select_negliteralk_fabs_v2f16:815; CI:       ; %bb.0:816; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)817; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3818; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2819; CI-NEXT:    v_cvt_f16_f32_e32 v5, v5820; CI-NEXT:    v_cvt_f16_f32_e32 v4, v4821; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|822; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|823; CI-NEXT:    v_cvt_f32_f16_e32 v5, v5824; CI-NEXT:    v_cvt_f32_f16_e32 v4, v4825; CI-NEXT:    v_mov_b32_e32 v6, 0xc4800000826; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1827; CI-NEXT:    v_cndmask_b32_e32 v1, v6, v3, vcc828; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0829; CI-NEXT:    v_cndmask_b32_e32 v0, v6, v2, vcc830; CI-NEXT:    v_add_f32_e32 v0, v0, v4831; CI-NEXT:    v_add_f32_e32 v1, v1, v5832; CI-NEXT:    s_setpc_b64 s[30:31]833;834; VI-LABEL: add_select_negliteralk_fabs_v2f16:835; VI:       ; %bb.0:836; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)837; VI-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2838; VI-NEXT:    v_mov_b32_e32 v4, 0xe400839; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0840; VI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc841; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1842; VI-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1843; VI-NEXT:    v_add_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1844; VI-NEXT:    v_add_f16_e32 v0, v0, v3845; VI-NEXT:    v_or_b32_e32 v0, v0, v1846; VI-NEXT:    s_setpc_b64 s[30:31]847;848; GFX9-LABEL: add_select_negliteralk_fabs_v2f16:849; GFX9:       ; %bb.0:850; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)851; GFX9-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2852; GFX9-NEXT:    v_mov_b32_e32 v4, 0xe400853; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0854; GFX9-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc855; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1856; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1857; GFX9-NEXT:    s_mov_b32 s4, 0x5040100858; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s4859; GFX9-NEXT:    v_pk_add_f16 v0, v0, v3860; GFX9-NEXT:    s_setpc_b64 s[30:31]861;862; GFX11-TRUE16-LABEL: add_select_negliteralk_fabs_v2f16:863; GFX11-TRUE16:       ; %bb.0:864; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)865; GFX11-TRUE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2866; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v0867; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e64 s0, 0, v1868; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)869; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0xe400, v2.l, vcc_lo870; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0xe400, v2.h, s0871; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)872; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v3873; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]874;875; GFX11-FAKE16-LABEL: add_select_negliteralk_fabs_v2f16:876; GFX11-FAKE16:       ; %bb.0:877; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)878; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2879; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v0880; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)881; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v2882; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xe400, v2, vcc_lo883; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v1884; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xe400, v4, vcc_lo885; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)886; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100887; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v3888; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]889  %cmp = icmp eq <2 x i32> %c, zeroinitializer890  %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)891  %select = select <2 x i1> %cmp, <2 x half> <half -1024.0, half -1024.0>, <2 x half> %fabs892  %add = fadd <2 x half> %select, %y893  ret <2 x half> %add894}895 896define <2 x half> @add_select_fabs_posk_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {897; CI-LABEL: add_select_fabs_posk_v2f16:898; CI:       ; %bb.0:899; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)900; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3901; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2902; CI-NEXT:    v_cvt_f16_f32_e32 v5, v5903; CI-NEXT:    v_cvt_f16_f32_e32 v4, v4904; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|905; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|906; CI-NEXT:    v_cvt_f32_f16_e32 v5, v5907; CI-NEXT:    v_cvt_f32_f16_e32 v4, v4908; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1909; CI-NEXT:    v_cndmask_b32_e32 v1, 1.0, v3, vcc910; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v0911; CI-NEXT:    v_cndmask_b32_e32 v0, 1.0, v2, vcc912; CI-NEXT:    v_add_f32_e32 v0, v0, v4913; CI-NEXT:    v_add_f32_e32 v1, v1, v5914; CI-NEXT:    s_setpc_b64 s[30:31]915;916; VI-LABEL: add_select_fabs_posk_v2f16:917; VI:       ; %bb.0:918; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)919; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1920; VI-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2921; VI-NEXT:    v_mov_b32_e32 v2, 0x3c00922; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v0923; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]924; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1925; VI-NEXT:    v_add_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1926; VI-NEXT:    v_add_f16_e32 v0, v0, v3927; VI-NEXT:    v_or_b32_e32 v0, v0, v1928; VI-NEXT:    s_setpc_b64 s[30:31]929;930; GFX9-LABEL: add_select_fabs_posk_v2f16:931; GFX9:       ; %bb.0:932; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)933; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1934; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v2935; GFX9-NEXT:    v_mov_b32_e32 v2, 0x3c00936; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v0937; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]938; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1939; GFX9-NEXT:    s_mov_b32 s4, 0x5040100940; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s4941; GFX9-NEXT:    v_pk_add_f16 v0, v0, v3942; GFX9-NEXT:    s_setpc_b64 s[30:31]943;944; GFX11-TRUE16-LABEL: add_select_fabs_posk_v2f16:945; GFX11-TRUE16:       ; %bb.0:946; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)947; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0948; GFX11-TRUE16-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v2949; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v1950; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)951; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x3c00, v0.l, vcc_lo952; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x3c00, v0.h, s0953; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)954; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v3955; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]956;957; GFX11-FAKE16-LABEL: add_select_fabs_posk_v2f16:958; GFX11-FAKE16:       ; %bb.0:959; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)960; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v2961; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v0962; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)963; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v2964; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x3c00, v2, vcc_lo965; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v1966; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x3c00, v4, vcc_lo967; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)968; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x5040100969; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v3970; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]971  %cmp = icmp eq <2 x i32> %c, zeroinitializer972  %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)973  %select = select <2 x i1> %cmp, <2 x half> %fabs, <2 x half> <half 1.0, half 1.0>974  %add = fadd <2 x half> %select, %y975  ret <2 x half> %add976}977 978define <2 x half> @add_select_posk_fabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {979; CI-LABEL: add_select_posk_fabs_v2f16:980; CI:       ; %bb.0:981; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)982; CI-NEXT:    v_cvt_f16_f32_e32 v3, v3983; CI-NEXT:    v_cvt_f16_f32_e32 v2, v2984; CI-NEXT:    v_cvt_f16_f32_e32 v5, v5985; CI-NEXT:    v_cvt_f16_f32_e32 v4, v4986; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|987; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|988; CI-NEXT:    v_cvt_f32_f16_e32 v5, v5989; CI-NEXT:    v_cvt_f32_f16_e32 v4, v4990; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1991; CI-NEXT:    v_cndmask_b32_e32 v1, 1.0, v3, vcc992; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0993; CI-NEXT:    v_cndmask_b32_e32 v0, 1.0, v2, vcc994; CI-NEXT:    v_add_f32_e32 v0, v0, v4995; CI-NEXT:    v_add_f32_e32 v1, v1, v5996; CI-NEXT:    s_setpc_b64 s[30:31]997;998; VI-LABEL: add_select_posk_fabs_v2f16:999; VI:       ; %bb.0:1000; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1001; VI-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v21002; VI-NEXT:    v_mov_b32_e32 v4, 0x3c001003; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v01004; VI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc1005; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v11006; VI-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11007; VI-NEXT:    v_add_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11008; VI-NEXT:    v_add_f16_e32 v0, v0, v31009; VI-NEXT:    v_or_b32_e32 v0, v0, v11010; VI-NEXT:    s_setpc_b64 s[30:31]1011;1012; GFX9-LABEL: add_select_posk_fabs_v2f16:1013; GFX9:       ; %bb.0:1014; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1015; GFX9-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v21016; GFX9-NEXT:    v_mov_b32_e32 v4, 0x3c001017; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v01018; GFX9-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc1019; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v11020; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11021; GFX9-NEXT:    s_mov_b32 s4, 0x50401001022; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s41023; GFX9-NEXT:    v_pk_add_f16 v0, v0, v31024; GFX9-NEXT:    s_setpc_b64 s[30:31]1025;1026; GFX11-TRUE16-LABEL: add_select_posk_fabs_v2f16:1027; GFX11-TRUE16:       ; %bb.0:1028; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1029; GFX11-TRUE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v21030; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v01031; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e64 s0, 0, v11032; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1033; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x3c00, v2.l, vcc_lo1034; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x3c00, v2.h, s01035; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1036; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v31037; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1038;1039; GFX11-FAKE16-LABEL: add_select_posk_fabs_v2f16:1040; GFX11-FAKE16:       ; %bb.0:1041; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1042; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v21043; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v01044; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)1045; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v21046; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x3c00, v2, vcc_lo1047; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v11048; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x3c00, v4, vcc_lo1049; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1050; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401001051; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v31052; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1053  %cmp = icmp eq <2 x i32> %c, zeroinitializer1054  %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)1055  %select = select <2 x i1> %cmp, <2 x half> <half 1.0, half 1.0>, <2 x half> %fabs1056  %add = fadd <2 x half> %select, %y1057  ret <2 x half> %add1058}1059 1060define <2 x half> @add_select_fneg_fneg_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {1061; CI-LABEL: add_select_fneg_fneg_v2f16:1062; CI:       ; %bb.0:1063; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1064; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31065; CI-NEXT:    v_cvt_f16_f32_e32 v5, v51066; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21067; CI-NEXT:    v_cvt_f16_f32_e32 v4, v41068; CI-NEXT:    v_cvt_f16_f32_e32 v7, v71069; CI-NEXT:    v_cvt_f16_f32_e32 v6, v61070; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31071; CI-NEXT:    v_cvt_f32_f16_e32 v5, v51072; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21073; CI-NEXT:    v_cvt_f32_f16_e32 v4, v41074; CI-NEXT:    v_cvt_f32_f16_e32 v7, v71075; CI-NEXT:    v_cvt_f32_f16_e32 v6, v61076; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11077; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v3, vcc1078; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01079; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc1080; CI-NEXT:    v_sub_f32_e32 v0, v6, v01081; CI-NEXT:    v_sub_f32_e32 v1, v7, v11082; CI-NEXT:    s_setpc_b64 s[30:31]1083;1084; VI-LABEL: add_select_fneg_fneg_v2f16:1085; VI:       ; %bb.0:1086; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1087; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11088; VI-NEXT:    v_cndmask_b32_sdwa v1, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11089; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01090; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc1091; VI-NEXT:    v_sub_f16_sdwa v1, v4, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1092; VI-NEXT:    v_sub_f16_e32 v0, v4, v01093; VI-NEXT:    v_or_b32_e32 v0, v0, v11094; VI-NEXT:    s_setpc_b64 s[30:31]1095;1096; GFX9-LABEL: add_select_fneg_fneg_v2f16:1097; GFX9:       ; %bb.0:1098; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1099; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11100; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11101; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01102; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc1103; GFX9-NEXT:    s_mov_b32 s4, 0x50401001104; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s41105; GFX9-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1106; GFX9-NEXT:    s_setpc_b64 s[30:31]1107;1108; GFX11-TRUE16-LABEL: add_select_fneg_fneg_v2f16:1109; GFX11-TRUE16:       ; %bb.0:1110; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1111; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11112; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01113; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.h, v2.h, vcc_lo1114; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1115; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, v2.l, s01116; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1117; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1118;1119; GFX11-FAKE16-LABEL: add_select_fneg_fneg_v2f16:1120; GFX11-FAKE16:       ; %bb.0:1121; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1122; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v21123; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v31124; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11125; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1126; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo1127; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01128; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo1129; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401001130; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1131; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1132; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1133  %cmp = icmp eq <2 x i32> %c, zeroinitializer1134  %fneg.x = fneg <2 x half> %x1135  %fneg.y = fneg <2 x half> %y1136  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> %fneg.y1137  %add = fadd <2 x half> %select, %z1138  ret <2 x half> %add1139}1140 1141define { <2 x half>, <2 x half> } @add_select_multi_use_lhs_fneg_fneg_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z, <2 x half> %w) {1142; CI-LABEL: add_select_multi_use_lhs_fneg_fneg_v2f16:1143; CI:       ; %bb.0:1144; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1145; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31146; CI-NEXT:    v_cvt_f16_f32_e32 v5, v51147; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21148; CI-NEXT:    v_cvt_f16_f32_e32 v4, v41149; CI-NEXT:    v_cvt_f16_f32_e32 v9, v91150; CI-NEXT:    v_cvt_f16_f32_e32 v8, v81151; CI-NEXT:    v_cvt_f16_f32_e32 v7, v71152; CI-NEXT:    v_cvt_f16_f32_e32 v6, v61153; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31154; CI-NEXT:    v_cvt_f32_f16_e32 v5, v51155; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21156; CI-NEXT:    v_cvt_f32_f16_e32 v4, v41157; CI-NEXT:    v_cvt_f32_f16_e32 v9, v91158; CI-NEXT:    v_cvt_f32_f16_e32 v8, v81159; CI-NEXT:    v_cvt_f32_f16_e32 v7, v71160; CI-NEXT:    v_cvt_f32_f16_e32 v6, v61161; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11162; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v3, vcc1163; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01164; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc1165; CI-NEXT:    v_sub_f32_e32 v0, v6, v01166; CI-NEXT:    v_sub_f32_e32 v1, v7, v11167; CI-NEXT:    v_sub_f32_e32 v2, v8, v21168; CI-NEXT:    v_sub_f32_e32 v3, v9, v31169; CI-NEXT:    s_setpc_b64 s[30:31]1170;1171; VI-LABEL: add_select_multi_use_lhs_fneg_fneg_v2f16:1172; VI:       ; %bb.0:1173; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1174; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11175; VI-NEXT:    v_cndmask_b32_sdwa v1, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11176; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01177; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc1178; VI-NEXT:    v_sub_f16_sdwa v1, v4, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1179; VI-NEXT:    v_sub_f16_e32 v0, v4, v01180; VI-NEXT:    v_or_b32_e32 v0, v0, v11181; VI-NEXT:    v_sub_f16_sdwa v1, v5, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11182; VI-NEXT:    v_sub_f16_e32 v2, v5, v21183; VI-NEXT:    v_or_b32_e32 v1, v2, v11184; VI-NEXT:    s_setpc_b64 s[30:31]1185;1186; GFX9-LABEL: add_select_multi_use_lhs_fneg_fneg_v2f16:1187; GFX9:       ; %bb.0:1188; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1189; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11190; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11191; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01192; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc1193; GFX9-NEXT:    s_mov_b32 s4, 0x50401001194; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s41195; GFX9-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1196; GFX9-NEXT:    v_pk_add_f16 v1, v5, v2 neg_lo:[0,1] neg_hi:[0,1]1197; GFX9-NEXT:    s_setpc_b64 s[30:31]1198;1199; GFX11-TRUE16-LABEL: add_select_multi_use_lhs_fneg_fneg_v2f16:1200; GFX11-TRUE16:       ; %bb.0:1201; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1202; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11203; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01204; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, v5, v2 neg_lo:[0,1] neg_hi:[0,1]1205; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.h, v2.h, vcc_lo1206; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1207; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, v2.l, s01208; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1209; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1210;1211; GFX11-FAKE16-LABEL: add_select_multi_use_lhs_fneg_fneg_v2f16:1212; GFX11-FAKE16:       ; %bb.0:1213; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1214; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01215; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v21216; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v31217; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo1218; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11219; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1220; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v7, v6, vcc_lo1221; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401001222; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, v5, v2 neg_lo:[0,1] neg_hi:[0,1]1223; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)1224; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1225; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1226  %cmp = icmp eq <2 x i32> %c, zeroinitializer1227  %fneg.x = fneg <2 x half> %x1228  %fneg.y = fneg <2 x half> %y1229  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> %fneg.y1230  %add0 = fadd <2 x half> %select, %z1231  %add1 = fadd <2 x half> %fneg.x, %w1232  %insert.0 = insertvalue { <2 x half>, <2 x half> } poison, <2 x half> %add0, 01233  %insert.1 = insertvalue { <2 x half>, <2 x half> } %insert.0, <2 x half> %add1, 11234  ret { <2 x half>, <2 x half> } %insert.11235}1236 1237define { <2 x half>, <2 x half> } @add_select_multi_store_use_lhs_fneg_fneg_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {1238; CI-LABEL: add_select_multi_store_use_lhs_fneg_fneg_v2f16:1239; CI:       ; %bb.0:1240; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1241; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31242; CI-NEXT:    v_cvt_f16_f32_e32 v5, v51243; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21244; CI-NEXT:    v_cvt_f16_f32_e32 v4, v41245; CI-NEXT:    v_cvt_f16_f32_e32 v7, v71246; CI-NEXT:    v_cvt_f16_f32_e32 v6, v61247; CI-NEXT:    v_cvt_f32_f16_e32 v8, v31248; CI-NEXT:    v_cvt_f32_f16_e32 v5, v51249; CI-NEXT:    v_cvt_f32_f16_e32 v9, v21250; CI-NEXT:    v_cvt_f32_f16_e32 v4, v41251; CI-NEXT:    v_cvt_f32_f16_e32 v7, v71252; CI-NEXT:    v_cvt_f32_f16_e32 v6, v61253; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11254; CI-NEXT:    v_cvt_f32_f16_e64 v2, -v21255; CI-NEXT:    v_cvt_f32_f16_e64 v3, -v31256; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v8, vcc1257; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01258; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v9, vcc1259; CI-NEXT:    v_sub_f32_e32 v0, v6, v01260; CI-NEXT:    v_sub_f32_e32 v1, v7, v11261; CI-NEXT:    s_setpc_b64 s[30:31]1262;1263; VI-LABEL: add_select_multi_store_use_lhs_fneg_fneg_v2f16:1264; VI:       ; %bb.0:1265; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1266; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11267; VI-NEXT:    v_cndmask_b32_sdwa v5, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11268; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01269; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc1270; VI-NEXT:    v_xor_b32_e32 v1, 0x80008000, v21271; VI-NEXT:    v_sub_f16_sdwa v2, v4, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1272; VI-NEXT:    v_sub_f16_e32 v0, v4, v01273; VI-NEXT:    v_or_b32_e32 v0, v0, v21274; VI-NEXT:    s_setpc_b64 s[30:31]1275;1276; GFX9-LABEL: add_select_multi_store_use_lhs_fneg_fneg_v2f16:1277; GFX9:       ; %bb.0:1278; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1279; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11280; GFX9-NEXT:    v_cndmask_b32_sdwa v5, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11281; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01282; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc1283; GFX9-NEXT:    s_mov_b32 s4, 0x50401001284; GFX9-NEXT:    v_perm_b32 v0, v5, v0, s41285; GFX9-NEXT:    v_xor_b32_e32 v1, 0x80008000, v21286; GFX9-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1287; GFX9-NEXT:    s_setpc_b64 s[30:31]1288;1289; GFX11-TRUE16-LABEL: add_select_multi_store_use_lhs_fneg_fneg_v2f16:1290; GFX11-TRUE16:       ; %bb.0:1291; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1292; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11293; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01294; GFX11-TRUE16-NEXT:    v_xor_b32_e32 v1, 0x80008000, v21295; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.h, v2.h, vcc_lo1296; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1297; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, v2.l, s01298; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1299; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1300;1301; GFX11-FAKE16-LABEL: add_select_multi_store_use_lhs_fneg_fneg_v2f16:1302; GFX11-FAKE16:       ; %bb.0:1303; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1304; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01305; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v21306; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v31307; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo1308; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11309; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1310; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo1311; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401001312; GFX11-FAKE16-NEXT:    v_xor_b32_e32 v1, 0x80008000, v21313; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)1314; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1315; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1316  %cmp = icmp eq <2 x i32> %c, zeroinitializer1317  %fneg.x = fneg <2 x half> %x1318  %fneg.y = fneg <2 x half> %y1319  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> %fneg.y1320  %add0 = fadd <2 x half> %select, %z1321  %insert.0 = insertvalue { <2 x half>, <2 x half> } poison, <2 x half> %add0, 01322  %insert.1 = insertvalue { <2 x half>, <2 x half> } %insert.0, <2 x half> %fneg.x, 11323  ret { <2 x half>, <2 x half> } %insert.11324}1325 1326define { <2 x half>, <2 x half> } @add_select_multi_use_rhs_fneg_fneg_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z, <2 x half> %w) {1327; CI-LABEL: add_select_multi_use_rhs_fneg_fneg_v2f16:1328; CI:       ; %bb.0:1329; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1330; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31331; CI-NEXT:    v_cvt_f16_f32_e32 v5, v51332; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21333; CI-NEXT:    v_cvt_f16_f32_e32 v4, v41334; CI-NEXT:    v_cvt_f16_f32_e32 v9, v91335; CI-NEXT:    v_cvt_f16_f32_e32 v8, v81336; CI-NEXT:    v_cvt_f16_f32_e32 v7, v71337; CI-NEXT:    v_cvt_f16_f32_e32 v6, v61338; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31339; CI-NEXT:    v_cvt_f32_f16_e32 v5, v51340; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21341; CI-NEXT:    v_cvt_f32_f16_e32 v4, v41342; CI-NEXT:    v_cvt_f32_f16_e32 v9, v91343; CI-NEXT:    v_cvt_f32_f16_e32 v8, v81344; CI-NEXT:    v_cvt_f32_f16_e32 v7, v71345; CI-NEXT:    v_cvt_f32_f16_e32 v6, v61346; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11347; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v3, vcc1348; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01349; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc1350; CI-NEXT:    v_sub_f32_e32 v0, v6, v01351; CI-NEXT:    v_sub_f32_e32 v1, v7, v11352; CI-NEXT:    v_sub_f32_e32 v2, v8, v41353; CI-NEXT:    v_sub_f32_e32 v3, v9, v51354; CI-NEXT:    s_setpc_b64 s[30:31]1355;1356; VI-LABEL: add_select_multi_use_rhs_fneg_fneg_v2f16:1357; VI:       ; %bb.0:1358; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1359; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11360; VI-NEXT:    v_cndmask_b32_sdwa v1, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11361; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01362; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc1363; VI-NEXT:    v_sub_f16_sdwa v1, v4, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1364; VI-NEXT:    v_sub_f16_e32 v0, v4, v01365; VI-NEXT:    v_or_b32_e32 v0, v0, v11366; VI-NEXT:    v_sub_f16_sdwa v1, v5, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11367; VI-NEXT:    v_sub_f16_e32 v2, v5, v31368; VI-NEXT:    v_or_b32_e32 v1, v2, v11369; VI-NEXT:    s_setpc_b64 s[30:31]1370;1371; GFX9-LABEL: add_select_multi_use_rhs_fneg_fneg_v2f16:1372; GFX9:       ; %bb.0:1373; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1374; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11375; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v3, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11376; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01377; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc1378; GFX9-NEXT:    s_mov_b32 s4, 0x50401001379; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s41380; GFX9-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1381; GFX9-NEXT:    v_pk_add_f16 v1, v5, v3 neg_lo:[0,1] neg_hi:[0,1]1382; GFX9-NEXT:    s_setpc_b64 s[30:31]1383;1384; GFX11-TRUE16-LABEL: add_select_multi_use_rhs_fneg_fneg_v2f16:1385; GFX11-TRUE16:       ; %bb.0:1386; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1387; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11388; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01389; GFX11-TRUE16-NEXT:    v_pk_add_f16 v1, v5, v3 neg_lo:[0,1] neg_hi:[0,1]1390; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.h, v2.h, vcc_lo1391; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1392; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, v2.l, s01393; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1394; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1395;1396; GFX11-FAKE16-LABEL: add_select_multi_use_rhs_fneg_fneg_v2f16:1397; GFX11-FAKE16:       ; %bb.0:1398; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1399; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01400; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v21401; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v7, 16, v31402; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo1403; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11404; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1405; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v7, v6, vcc_lo1406; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401001407; GFX11-FAKE16-NEXT:    v_pk_add_f16 v1, v5, v3 neg_lo:[0,1] neg_hi:[0,1]1408; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)1409; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]1410; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1411  %cmp = icmp eq <2 x i32> %c, zeroinitializer1412  %fneg.x = fneg <2 x half> %x1413  %fneg.y = fneg <2 x half> %y1414  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> %fneg.y1415  %add0 = fadd <2 x half> %select, %z1416  %add1 = fadd <2 x half> %fneg.y, %w1417  %insert.0 = insertvalue { <2 x half>, <2 x half> } poison, <2 x half> %add0, 01418  %insert.1 = insertvalue { <2 x half>, <2 x half> } %insert.0, <2 x half> %add1, 11419  ret { <2 x half>, <2 x half> } %insert.11420}1421 1422define <2 x half> @add_select_fneg_var_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {1423; CI-LABEL: add_select_fneg_var_v2f16:1424; CI:       ; %bb.0:1425; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1426; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31427; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21428; CI-NEXT:    v_cvt_f16_f32_e32 v7, v71429; CI-NEXT:    v_cvt_f16_f32_e32 v4, v41430; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v31431; CI-NEXT:    v_or_b32_e32 v2, v2, v31432; CI-NEXT:    v_cvt_f16_f32_e32 v3, v51433; CI-NEXT:    v_cvt_f16_f32_e32 v6, v61434; CI-NEXT:    v_xor_b32_e32 v2, 0x80008000, v21435; CI-NEXT:    v_cvt_f32_f16_e32 v5, v71436; CI-NEXT:    v_lshrrev_b32_e32 v7, 16, v21437; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31438; CI-NEXT:    v_cvt_f32_f16_e32 v7, v71439; CI-NEXT:    v_cvt_f32_f16_e32 v4, v41440; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21441; CI-NEXT:    v_cvt_f32_f16_e32 v6, v61442; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11443; CI-NEXT:    v_cndmask_b32_e32 v1, v3, v7, vcc1444; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01445; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc1446; CI-NEXT:    v_add_f32_e32 v0, v0, v61447; CI-NEXT:    v_add_f32_e32 v1, v1, v51448; CI-NEXT:    s_setpc_b64 s[30:31]1449;1450; VI-LABEL: add_select_fneg_var_v2f16:1451; VI:       ; %bb.0:1452; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1453; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11454; VI-NEXT:    v_xor_b32_e32 v1, 0x80008000, v21455; VI-NEXT:    v_cndmask_b32_sdwa v2, v3, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11456; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01457; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v1, vcc1458; VI-NEXT:    v_add_f16_sdwa v1, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11459; VI-NEXT:    v_add_f16_e32 v0, v0, v41460; VI-NEXT:    v_or_b32_e32 v0, v0, v11461; VI-NEXT:    s_setpc_b64 s[30:31]1462;1463; GFX9-LABEL: add_select_fneg_var_v2f16:1464; GFX9:       ; %bb.0:1465; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1466; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11467; GFX9-NEXT:    v_xor_b32_e32 v1, 0x80008000, v21468; GFX9-NEXT:    v_cndmask_b32_sdwa v2, v3, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11469; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01470; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v1, vcc1471; GFX9-NEXT:    s_mov_b32 s4, 0x50401001472; GFX9-NEXT:    v_perm_b32 v0, v2, v0, s41473; GFX9-NEXT:    v_pk_add_f16 v0, v0, v41474; GFX9-NEXT:    s_setpc_b64 s[30:31]1475;1476; GFX11-TRUE16-LABEL: add_select_fneg_var_v2f16:1477; GFX11-TRUE16:       ; %bb.0:1478; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1479; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11480; GFX11-TRUE16-NEXT:    v_xor_b32_e32 v1, 0x80008000, v21481; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01482; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)1483; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.h, v1.h, vcc_lo1484; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, v1.l, s01485; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1486; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v41487; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1488;1489; GFX11-FAKE16-LABEL: add_select_fneg_var_v2f16:1490; GFX11-FAKE16:       ; %bb.0:1491; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1492; GFX11-FAKE16-NEXT:    v_xor_b32_e32 v2, 0x80008000, v21493; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v31494; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11495; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)1496; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v21497; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v5, v6, vcc_lo1498; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01499; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo1500; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1501; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401001502; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v41503; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1504  %cmp = icmp eq <2 x i32> %c, zeroinitializer1505  %fneg.x = fneg <2 x half> %x1506  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> %y1507  %add = fadd <2 x half> %select, %z1508  ret <2 x half> %add1509}1510 1511define <2 x half> @add_select_fneg_negk_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {1512; CI-LABEL: add_select_fneg_negk_v2f16:1513; CI:       ; %bb.0:1514; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1515; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31516; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21517; CI-NEXT:    v_cvt_f16_f32_e32 v5, v51518; CI-NEXT:    v_cvt_f16_f32_e32 v4, v41519; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31520; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21521; CI-NEXT:    v_cvt_f32_f16_e32 v5, v51522; CI-NEXT:    v_cvt_f32_f16_e32 v4, v41523; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11524; CI-NEXT:    v_cndmask_b32_e32 v1, 1.0, v3, vcc1525; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01526; CI-NEXT:    v_cndmask_b32_e32 v0, 1.0, v2, vcc1527; CI-NEXT:    v_sub_f32_e32 v0, v4, v01528; CI-NEXT:    v_sub_f32_e32 v1, v5, v11529; CI-NEXT:    s_setpc_b64 s[30:31]1530;1531; VI-LABEL: add_select_fneg_negk_v2f16:1532; VI:       ; %bb.0:1533; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1534; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11535; VI-NEXT:    v_mov_b32_e32 v1, 0x3c001536; VI-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11537; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01538; VI-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc1539; VI-NEXT:    v_sub_f16_sdwa v1, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1540; VI-NEXT:    v_sub_f16_e32 v0, v3, v01541; VI-NEXT:    v_or_b32_e32 v0, v0, v11542; VI-NEXT:    s_setpc_b64 s[30:31]1543;1544; GFX9-LABEL: add_select_fneg_negk_v2f16:1545; GFX9:       ; %bb.0:1546; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1547; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11548; GFX9-NEXT:    v_mov_b32_e32 v1, 0x3c001549; GFX9-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11550; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01551; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc1552; GFX9-NEXT:    s_mov_b32 s4, 0x50401001553; GFX9-NEXT:    v_perm_b32 v0, v4, v0, s41554; GFX9-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]1555; GFX9-NEXT:    s_setpc_b64 s[30:31]1556;1557; GFX11-TRUE16-LABEL: add_select_fneg_negk_v2f16:1558; GFX11-TRUE16:       ; %bb.0:1559; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1560; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11561; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01562; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x3c00, v2.h, vcc_lo1563; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1564; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x3c00, v2.l, s01565; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]1566; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1567;1568; GFX11-FAKE16-LABEL: add_select_fneg_negk_v2f16:1569; GFX11-FAKE16:       ; %bb.0:1570; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1571; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v21572; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11573; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1574; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x3c00, v4, vcc_lo1575; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01576; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x3c00, v2, vcc_lo1577; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401001578; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1579; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]1580; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1581  %cmp = icmp eq <2 x i32> %c, zeroinitializer1582  %fneg.x = fneg <2 x half> %x1583  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> <half -1.0, half -1.0>1584  %add = fadd <2 x half> %select, %y1585  ret <2 x half> %add1586}1587 1588define <2 x half> @add_select_fneg_inv2pi_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {1589; CI-LABEL: add_select_fneg_inv2pi_v2f16:1590; CI:       ; %bb.0:1591; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1592; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31593; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21594; CI-NEXT:    v_cvt_f16_f32_e32 v5, v51595; CI-NEXT:    v_cvt_f16_f32_e32 v4, v41596; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31597; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21598; CI-NEXT:    v_cvt_f32_f16_e32 v5, v51599; CI-NEXT:    v_cvt_f32_f16_e32 v4, v41600; CI-NEXT:    v_mov_b32_e32 v6, 0xbe2300001601; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11602; CI-NEXT:    v_cndmask_b32_e32 v1, v6, v3, vcc1603; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01604; CI-NEXT:    v_cndmask_b32_e32 v0, v6, v2, vcc1605; CI-NEXT:    v_sub_f32_e32 v0, v4, v01606; CI-NEXT:    v_sub_f32_e32 v1, v5, v11607; CI-NEXT:    s_setpc_b64 s[30:31]1608;1609; VI-LABEL: add_select_fneg_inv2pi_v2f16:1610; VI:       ; %bb.0:1611; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1612; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11613; VI-NEXT:    v_mov_b32_e32 v1, 0xb1181614; VI-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11615; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01616; VI-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc1617; VI-NEXT:    v_sub_f16_sdwa v1, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1618; VI-NEXT:    v_sub_f16_e32 v0, v3, v01619; VI-NEXT:    v_or_b32_e32 v0, v0, v11620; VI-NEXT:    s_setpc_b64 s[30:31]1621;1622; GFX9-LABEL: add_select_fneg_inv2pi_v2f16:1623; GFX9:       ; %bb.0:1624; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1625; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11626; GFX9-NEXT:    v_mov_b32_e32 v1, 0xb1181627; GFX9-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11628; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01629; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc1630; GFX9-NEXT:    s_mov_b32 s4, 0x50401001631; GFX9-NEXT:    v_perm_b32 v0, v4, v0, s41632; GFX9-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]1633; GFX9-NEXT:    s_setpc_b64 s[30:31]1634;1635; GFX11-TRUE16-LABEL: add_select_fneg_inv2pi_v2f16:1636; GFX11-TRUE16:       ; %bb.0:1637; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1638; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11639; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01640; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0xb118, v2.h, vcc_lo1641; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1642; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0xb118, v2.l, s01643; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]1644; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1645;1646; GFX11-FAKE16-LABEL: add_select_fneg_inv2pi_v2f16:1647; GFX11-FAKE16:       ; %bb.0:1648; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1649; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v21650; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11651; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1652; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xb118, v4, vcc_lo1653; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01654; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xb118, v2, vcc_lo1655; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401001656; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1657; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]1658; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1659  %cmp = icmp eq <2 x i32> %c, zeroinitializer1660  %fneg.x = fneg <2 x half> %x1661  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> <half 0xH3118, half 0xH3118>1662  %add = fadd <2 x half> %select, %y1663  ret <2 x half> %add1664}1665 1666define <2 x half> @add_select_fneg_neginv2pi_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {1667; CI-LABEL: add_select_fneg_neginv2pi_v2f16:1668; CI:       ; %bb.0:1669; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1670; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31671; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21672; CI-NEXT:    v_cvt_f16_f32_e32 v5, v51673; CI-NEXT:    v_cvt_f16_f32_e32 v4, v41674; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31675; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21676; CI-NEXT:    v_cvt_f32_f16_e32 v5, v51677; CI-NEXT:    v_cvt_f32_f16_e32 v4, v41678; CI-NEXT:    v_mov_b32_e32 v6, 0x3e2300001679; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11680; CI-NEXT:    v_cndmask_b32_e32 v1, v6, v3, vcc1681; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01682; CI-NEXT:    v_cndmask_b32_e32 v0, v6, v2, vcc1683; CI-NEXT:    v_sub_f32_e32 v0, v4, v01684; CI-NEXT:    v_sub_f32_e32 v1, v5, v11685; CI-NEXT:    s_setpc_b64 s[30:31]1686;1687; VI-LABEL: add_select_fneg_neginv2pi_v2f16:1688; VI:       ; %bb.0:1689; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1690; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11691; VI-NEXT:    v_mov_b32_e32 v1, 0x31181692; VI-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11693; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01694; VI-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc1695; VI-NEXT:    v_sub_f16_sdwa v1, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1696; VI-NEXT:    v_sub_f16_e32 v0, v3, v01697; VI-NEXT:    v_or_b32_e32 v0, v0, v11698; VI-NEXT:    s_setpc_b64 s[30:31]1699;1700; GFX9-LABEL: add_select_fneg_neginv2pi_v2f16:1701; GFX9:       ; %bb.0:1702; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1703; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11704; GFX9-NEXT:    v_mov_b32_e32 v1, 0x31181705; GFX9-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11706; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01707; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc1708; GFX9-NEXT:    s_mov_b32 s4, 0x50401001709; GFX9-NEXT:    v_perm_b32 v0, v4, v0, s41710; GFX9-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]1711; GFX9-NEXT:    s_setpc_b64 s[30:31]1712;1713; GFX11-TRUE16-LABEL: add_select_fneg_neginv2pi_v2f16:1714; GFX11-TRUE16:       ; %bb.0:1715; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1716; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11717; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01718; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x3118, v2.h, vcc_lo1719; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)1720; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x3118, v2.l, s01721; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]1722; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1723;1724; GFX11-FAKE16-LABEL: add_select_fneg_neginv2pi_v2f16:1725; GFX11-FAKE16:       ; %bb.0:1726; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1727; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v21728; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11729; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1730; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x3118, v4, vcc_lo1731; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01732; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x3118, v2, vcc_lo1733; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401001734; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1735; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]1736; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1737  %cmp = icmp eq <2 x i32> %c, zeroinitializer1738  %fneg.x = fneg <2 x half> %x1739  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> <half 0xHB118, half 0xHB118>1740  %add = fadd <2 x half> %select, %y1741  ret <2 x half> %add1742}1743 1744define <2 x half> @add_select_negk_negk_v2f16(<2 x i32> %c, <2 x half> %x) {1745; CI-LABEL: add_select_negk_negk_v2f16:1746; CI:       ; %bb.0:1747; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1748; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31749; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21750; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11751; CI-NEXT:    v_cndmask_b32_e64 v1, -1.0, -2.0, vcc1752; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31753; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21754; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01755; CI-NEXT:    v_cndmask_b32_e64 v0, -1.0, -2.0, vcc1756; CI-NEXT:    v_add_f32_e32 v1, v1, v31757; CI-NEXT:    v_add_f32_e32 v0, v0, v21758; CI-NEXT:    s_setpc_b64 s[30:31]1759;1760; VI-LABEL: add_select_negk_negk_v2f16:1761; VI:       ; %bb.0:1762; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1763; VI-NEXT:    v_mov_b32_e32 v3, 0xbc001764; VI-NEXT:    v_mov_b32_e32 v4, 0xc0001765; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01766; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc1767; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11768; VI-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc1769; VI-NEXT:    v_add_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11770; VI-NEXT:    v_add_f16_e32 v0, v0, v21771; VI-NEXT:    v_or_b32_e32 v0, v0, v11772; VI-NEXT:    s_setpc_b64 s[30:31]1773;1774; GFX9-LABEL: add_select_negk_negk_v2f16:1775; GFX9:       ; %bb.0:1776; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1777; GFX9-NEXT:    v_mov_b32_e32 v3, 0xbc001778; GFX9-NEXT:    v_mov_b32_e32 v4, 0xc0001779; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11780; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc1781; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01782; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc1783; GFX9-NEXT:    v_pack_b32_f16 v0, v0, v11784; GFX9-NEXT:    v_pk_add_f16 v0, v0, v21785; GFX9-NEXT:    s_setpc_b64 s[30:31]1786;1787; GFX11-TRUE16-LABEL: add_select_negk_negk_v2f16:1788; GFX11-TRUE16:       ; %bb.0:1789; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1790; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.l, 0xbc001791; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11792; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01793; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1794; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, 0xc000, vcc_lo1795; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.l, 0xc000, s01796; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1797; GFX11-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.h, v0.l1798; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v21799; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1800;1801; GFX11-FAKE16-LABEL: add_select_negk_negk_v2f16:1802; GFX11-FAKE16:       ; %bb.0:1803; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1804; GFX11-FAKE16-NEXT:    v_mov_b32_e32 v3, 0xc0001805; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11806; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1807; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xbc00, v3, vcc_lo1808; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01809; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xbc00, v3, vcc_lo1810; GFX11-FAKE16-NEXT:    v_pack_b32_f16 v0, v0, v11811; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1812; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v21813; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1814  %cmp = icmp eq <2 x i32> %c, zeroinitializer1815  %select = select <2 x i1> %cmp, <2 x half> <half -2.0, half -2.0>, <2 x half> <half -1.0, half -1.0>1816  %add = fadd <2 x half> %select, %x1817  ret <2 x half> %add1818}1819 1820define <2 x half> @add_select_negliteralk_negliteralk_v2f16(<2 x i32> %c, <2 x half> %x) {1821; CI-LABEL: add_select_negliteralk_negliteralk_v2f16:1822; CI:       ; %bb.0:1823; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1824; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31825; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21826; CI-NEXT:    v_mov_b32_e32 v4, 0xc58000001827; CI-NEXT:    v_mov_b32_e32 v5, 0xc50000001828; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31829; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21830; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11831; CI-NEXT:    v_cndmask_b32_e32 v1, v4, v5, vcc1832; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01833; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v5, vcc1834; CI-NEXT:    v_add_f32_e32 v0, v0, v21835; CI-NEXT:    v_add_f32_e32 v1, v1, v31836; CI-NEXT:    s_setpc_b64 s[30:31]1837;1838; VI-LABEL: add_select_negliteralk_negliteralk_v2f16:1839; VI:       ; %bb.0:1840; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1841; VI-NEXT:    v_mov_b32_e32 v3, 0xec001842; VI-NEXT:    v_mov_b32_e32 v4, 0xe8001843; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01844; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc1845; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11846; VI-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc1847; VI-NEXT:    v_add_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11848; VI-NEXT:    v_add_f16_e32 v0, v0, v21849; VI-NEXT:    v_or_b32_e32 v0, v0, v11850; VI-NEXT:    s_setpc_b64 s[30:31]1851;1852; GFX9-LABEL: add_select_negliteralk_negliteralk_v2f16:1853; GFX9:       ; %bb.0:1854; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1855; GFX9-NEXT:    v_mov_b32_e32 v3, 0xec001856; GFX9-NEXT:    v_mov_b32_e32 v4, 0xe8001857; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11858; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc1859; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01860; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc1861; GFX9-NEXT:    v_pack_b32_f16 v0, v0, v11862; GFX9-NEXT:    v_pk_add_f16 v0, v0, v21863; GFX9-NEXT:    s_setpc_b64 s[30:31]1864;1865; GFX11-TRUE16-LABEL: add_select_negliteralk_negliteralk_v2f16:1866; GFX11-TRUE16:       ; %bb.0:1867; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1868; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.l, 0xec001869; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11870; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01871; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1872; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, 0xe800, vcc_lo1873; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.l, 0xe800, s01874; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1875; GFX11-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.h, v0.l1876; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v21877; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1878;1879; GFX11-FAKE16-LABEL: add_select_negliteralk_negliteralk_v2f16:1880; GFX11-FAKE16:       ; %bb.0:1881; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1882; GFX11-FAKE16-NEXT:    v_mov_b32_e32 v3, 0xe8001883; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11884; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1885; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xec00, v3, vcc_lo1886; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01887; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xec00, v3, vcc_lo1888; GFX11-FAKE16-NEXT:    v_pack_b32_f16 v0, v0, v11889; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1890; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v21891; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1892  %cmp = icmp eq <2 x i32> %c, zeroinitializer1893  %select = select <2 x i1> %cmp, <2 x half> <half -2048.0, half -2048.0>, <2 x half> <half -4096.0, half -4096.0>1894  %add = fadd <2 x half> %select, %x1895  ret <2 x half> %add1896}1897 1898define <2 x half> @add_select_fneg_negk_negk_v2f16(<2 x i32> %c, <2 x half> %x) {1899; CI-LABEL: add_select_fneg_negk_negk_v2f16:1900; CI:       ; %bb.0:1901; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1902; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31903; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21904; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11905; CI-NEXT:    v_cndmask_b32_e64 v1, -1.0, -2.0, vcc1906; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31907; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21908; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01909; CI-NEXT:    v_cndmask_b32_e64 v0, -1.0, -2.0, vcc1910; CI-NEXT:    v_sub_f32_e32 v1, v3, v11911; CI-NEXT:    v_sub_f32_e32 v0, v2, v01912; CI-NEXT:    s_setpc_b64 s[30:31]1913;1914; VI-LABEL: add_select_fneg_negk_negk_v2f16:1915; VI:       ; %bb.0:1916; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1917; VI-NEXT:    v_mov_b32_e32 v3, 0xbc001918; VI-NEXT:    v_mov_b32_e32 v4, 0xc0001919; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01920; VI-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc1921; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11922; VI-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc1923; VI-NEXT:    v_sub_f16_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD1924; VI-NEXT:    v_sub_f16_e32 v0, v2, v01925; VI-NEXT:    v_or_b32_e32 v0, v0, v11926; VI-NEXT:    s_setpc_b64 s[30:31]1927;1928; GFX9-LABEL: add_select_fneg_negk_negk_v2f16:1929; GFX9:       ; %bb.0:1930; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1931; GFX9-NEXT:    v_mov_b32_e32 v3, 0xbc001932; GFX9-NEXT:    v_mov_b32_e32 v4, 0xc0001933; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v11934; GFX9-NEXT:    v_cndmask_b32_e32 v1, v3, v4, vcc1935; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v01936; GFX9-NEXT:    v_cndmask_b32_e32 v0, v3, v4, vcc1937; GFX9-NEXT:    v_pack_b32_f16 v0, v0, v11938; GFX9-NEXT:    v_pk_add_f16 v0, v2, v0 neg_lo:[0,1] neg_hi:[0,1]1939; GFX9-NEXT:    s_setpc_b64 s[30:31]1940;1941; GFX11-TRUE16-LABEL: add_select_fneg_negk_negk_v2f16:1942; GFX11-TRUE16:       ; %bb.0:1943; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1944; GFX11-TRUE16-NEXT:    v_mov_b16_e32 v3.l, 0xbc001945; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11946; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v01947; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1948; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v3.l, 0xc000, vcc_lo1949; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v3.l, 0xc000, s01950; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)1951; GFX11-TRUE16-NEXT:    v_pack_b32_f16 v0, v0.h, v0.l1952; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v2, v0 neg_lo:[0,1] neg_hi:[0,1]1953; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]1954;1955; GFX11-FAKE16-LABEL: add_select_fneg_negk_negk_v2f16:1956; GFX11-FAKE16:       ; %bb.0:1957; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1958; GFX11-FAKE16-NEXT:    v_mov_b32_e32 v3, 0xc0001959; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v11960; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)1961; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xbc00, v3, vcc_lo1962; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v01963; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xbc00, v3, vcc_lo1964; GFX11-FAKE16-NEXT:    v_pack_b32_f16 v0, v0, v11965; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)1966; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v2, v0 neg_lo:[0,1] neg_hi:[0,1]1967; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]1968  %cmp = icmp eq <2 x i32> %c, zeroinitializer1969  %select = select <2 x i1> %cmp, <2 x half> <half -2.0, half -2.0>, <2 x half> <half -1.0, half -1.0>1970  %fneg.x = fneg <2 x half> %select1971  %add = fadd <2 x half> %fneg.x, %x1972  ret <2 x half> %add1973}1974 1975define <2 x half> @add_select_negk_fneg_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {1976; CI-LABEL: add_select_negk_fneg_v2f16:1977; CI:       ; %bb.0:1978; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1979; CI-NEXT:    v_cvt_f16_f32_e32 v3, v31980; CI-NEXT:    v_cvt_f16_f32_e32 v2, v21981; CI-NEXT:    v_cvt_f16_f32_e32 v5, v51982; CI-NEXT:    v_cvt_f16_f32_e32 v4, v41983; CI-NEXT:    v_cvt_f32_f16_e32 v3, v31984; CI-NEXT:    v_cvt_f32_f16_e32 v2, v21985; CI-NEXT:    v_cvt_f32_f16_e32 v5, v51986; CI-NEXT:    v_cvt_f32_f16_e32 v4, v41987; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v11988; CI-NEXT:    v_cndmask_b32_e32 v1, 1.0, v3, vcc1989; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v01990; CI-NEXT:    v_cndmask_b32_e32 v0, 1.0, v2, vcc1991; CI-NEXT:    v_sub_f32_e32 v0, v4, v01992; CI-NEXT:    v_sub_f32_e32 v1, v5, v11993; CI-NEXT:    s_setpc_b64 s[30:31]1994;1995; VI-LABEL: add_select_negk_fneg_v2f16:1996; VI:       ; %bb.0:1997; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1998; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v11999; VI-NEXT:    v_mov_b32_e32 v1, 0x3c002000; VI-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12001; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v02002; VI-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc2003; VI-NEXT:    v_sub_f16_sdwa v1, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2004; VI-NEXT:    v_sub_f16_e32 v0, v3, v02005; VI-NEXT:    v_or_b32_e32 v0, v0, v12006; VI-NEXT:    s_setpc_b64 s[30:31]2007;2008; GFX9-LABEL: add_select_negk_fneg_v2f16:2009; GFX9:       ; %bb.0:2010; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2011; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12012; GFX9-NEXT:    v_mov_b32_e32 v1, 0x3c002013; GFX9-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12014; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v02015; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc2016; GFX9-NEXT:    s_mov_b32 s4, 0x50401002017; GFX9-NEXT:    v_perm_b32 v0, v4, v0, s42018; GFX9-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]2019; GFX9-NEXT:    s_setpc_b64 s[30:31]2020;2021; GFX11-TRUE16-LABEL: add_select_negk_fneg_v2f16:2022; GFX11-TRUE16:       ; %bb.0:2023; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2024; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v12025; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e64 s0, 0, v02026; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x3c00, v2.h, vcc_lo2027; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2028; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x3c00, v2.l, s02029; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]2030; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2031;2032; GFX11-FAKE16-LABEL: add_select_negk_fneg_v2f16:2033; GFX11-FAKE16:       ; %bb.0:2034; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2035; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v22036; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v12037; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)2038; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x3c00, v4, vcc_lo2039; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v02040; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x3c00, v2, vcc_lo2041; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002042; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2043; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]2044; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2045  %cmp = icmp eq <2 x i32> %c, zeroinitializer2046  %fneg.x = fneg <2 x half> %x2047  %select = select <2 x i1> %cmp, <2 x half> <half -1.0, half -1.0>, <2 x half> %fneg.x2048  %add = fadd <2 x half> %select, %y2049  ret <2 x half> %add2050}2051 2052define <2 x half> @add_select_fneg_posk_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {2053; CI-LABEL: add_select_fneg_posk_v2f16:2054; CI:       ; %bb.0:2055; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2056; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32057; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22058; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52059; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42060; CI-NEXT:    v_cvt_f32_f16_e32 v3, v32061; CI-NEXT:    v_cvt_f32_f16_e32 v2, v22062; CI-NEXT:    v_cvt_f32_f16_e32 v5, v52063; CI-NEXT:    v_cvt_f32_f16_e32 v4, v42064; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12065; CI-NEXT:    v_cndmask_b32_e32 v1, -1.0, v3, vcc2066; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02067; CI-NEXT:    v_cndmask_b32_e32 v0, -1.0, v2, vcc2068; CI-NEXT:    v_sub_f32_e32 v0, v4, v02069; CI-NEXT:    v_sub_f32_e32 v1, v5, v12070; CI-NEXT:    s_setpc_b64 s[30:31]2071;2072; VI-LABEL: add_select_fneg_posk_v2f16:2073; VI:       ; %bb.0:2074; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2075; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12076; VI-NEXT:    v_mov_b32_e32 v1, 0xbc002077; VI-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12078; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02079; VI-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc2080; VI-NEXT:    v_sub_f16_sdwa v1, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2081; VI-NEXT:    v_sub_f16_e32 v0, v3, v02082; VI-NEXT:    v_or_b32_e32 v0, v0, v12083; VI-NEXT:    s_setpc_b64 s[30:31]2084;2085; GFX9-LABEL: add_select_fneg_posk_v2f16:2086; GFX9:       ; %bb.0:2087; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2088; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12089; GFX9-NEXT:    v_mov_b32_e32 v1, 0xbc002090; GFX9-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12091; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02092; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc2093; GFX9-NEXT:    s_mov_b32 s4, 0x50401002094; GFX9-NEXT:    v_perm_b32 v0, v4, v0, s42095; GFX9-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]2096; GFX9-NEXT:    s_setpc_b64 s[30:31]2097;2098; GFX11-TRUE16-LABEL: add_select_fneg_posk_v2f16:2099; GFX11-TRUE16:       ; %bb.0:2100; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2101; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12102; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v02103; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0xbc00, v2.h, vcc_lo2104; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2105; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0xbc00, v2.l, s02106; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]2107; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2108;2109; GFX11-FAKE16-LABEL: add_select_fneg_posk_v2f16:2110; GFX11-FAKE16:       ; %bb.0:2111; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2112; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v22113; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12114; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)2115; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xbc00, v4, vcc_lo2116; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02117; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xbc00, v2, vcc_lo2118; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002119; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2120; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]2121; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2122  %cmp = icmp eq <2 x i32> %c, zeroinitializer2123  %fneg.x = fneg <2 x half> %x2124  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> <half 1.0, half 1.0>2125  %add = fadd <2 x half> %select, %y2126  ret <2 x half> %add2127}2128 2129define <2 x half> @add_select_posk_fneg_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {2130; CI-LABEL: add_select_posk_fneg_v2f16:2131; CI:       ; %bb.0:2132; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2133; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32134; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22135; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52136; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42137; CI-NEXT:    v_cvt_f32_f16_e32 v3, v32138; CI-NEXT:    v_cvt_f32_f16_e32 v2, v22139; CI-NEXT:    v_cvt_f32_f16_e32 v5, v52140; CI-NEXT:    v_cvt_f32_f16_e32 v4, v42141; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12142; CI-NEXT:    v_cndmask_b32_e32 v1, -1.0, v3, vcc2143; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v02144; CI-NEXT:    v_cndmask_b32_e32 v0, -1.0, v2, vcc2145; CI-NEXT:    v_sub_f32_e32 v0, v4, v02146; CI-NEXT:    v_sub_f32_e32 v1, v5, v12147; CI-NEXT:    s_setpc_b64 s[30:31]2148;2149; VI-LABEL: add_select_posk_fneg_v2f16:2150; VI:       ; %bb.0:2151; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2152; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12153; VI-NEXT:    v_mov_b32_e32 v1, 0xbc002154; VI-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12155; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v02156; VI-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc2157; VI-NEXT:    v_sub_f16_sdwa v1, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2158; VI-NEXT:    v_sub_f16_e32 v0, v3, v02159; VI-NEXT:    v_or_b32_e32 v0, v0, v12160; VI-NEXT:    s_setpc_b64 s[30:31]2161;2162; GFX9-LABEL: add_select_posk_fneg_v2f16:2163; GFX9:       ; %bb.0:2164; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2165; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12166; GFX9-NEXT:    v_mov_b32_e32 v1, 0xbc002167; GFX9-NEXT:    v_cndmask_b32_sdwa v4, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12168; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v02169; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc2170; GFX9-NEXT:    s_mov_b32 s4, 0x50401002171; GFX9-NEXT:    v_perm_b32 v0, v4, v0, s42172; GFX9-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]2173; GFX9-NEXT:    s_setpc_b64 s[30:31]2174;2175; GFX11-TRUE16-LABEL: add_select_posk_fneg_v2f16:2176; GFX11-TRUE16:       ; %bb.0:2177; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2178; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v12179; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e64 s0, 0, v02180; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0xbc00, v2.h, vcc_lo2181; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)2182; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0xbc00, v2.l, s02183; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]2184; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2185;2186; GFX11-FAKE16-LABEL: add_select_posk_fneg_v2f16:2187; GFX11-FAKE16:       ; %bb.0:2188; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2189; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v22190; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v12191; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)2192; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xbc00, v4, vcc_lo2193; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v02194; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xbc00, v2, vcc_lo2195; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002196; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2197; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v3, v0 neg_lo:[0,1] neg_hi:[0,1]2198; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2199  %cmp = icmp eq <2 x i32> %c, zeroinitializer2200  %fneg.x = fneg <2 x half> %x2201  %select = select <2 x i1> %cmp, <2 x half> <half 1.0, half 1.0>, <2 x half> %fneg.x2202  %add = fadd <2 x half> %select, %y2203  ret <2 x half> %add2204}2205 2206define <2 x half> @add_select_negfabs_fabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {2207; CI-LABEL: add_select_negfabs_fabs_v2f16:2208; CI:       ; %bb.0:2209; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2210; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32211; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22212; CI-NEXT:    v_cvt_f16_f32_e32 v7, v72213; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52214; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v32215; CI-NEXT:    v_or_b32_e32 v2, v2, v32216; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42217; CI-NEXT:    v_cvt_f16_f32_e32 v6, v62218; CI-NEXT:    v_or_b32_e32 v2, 0x80008000, v22219; CI-NEXT:    v_cvt_f32_f16_e32 v3, v72220; CI-NEXT:    v_lshrrev_b32_e32 v7, 16, v22221; CI-NEXT:    v_cvt_f32_f16_e32 v7, v72222; CI-NEXT:    v_cvt_f32_f16_e64 v5, |v5|2223; CI-NEXT:    v_cvt_f32_f16_e32 v2, v22224; CI-NEXT:    v_cvt_f32_f16_e64 v4, |v4|2225; CI-NEXT:    v_cvt_f32_f16_e32 v6, v62226; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12227; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v7, vcc2228; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02229; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc2230; CI-NEXT:    v_add_f32_e32 v0, v0, v62231; CI-NEXT:    v_add_f32_e32 v1, v1, v32232; CI-NEXT:    s_setpc_b64 s[30:31]2233;2234; VI-LABEL: add_select_negfabs_fabs_v2f16:2235; VI:       ; %bb.0:2236; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2237; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12238; VI-NEXT:    v_or_b32_e32 v1, 0x80008000, v22239; VI-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v32240; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02241; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2242; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12243; VI-NEXT:    v_add_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12244; VI-NEXT:    v_add_f16_e32 v0, v0, v42245; VI-NEXT:    v_or_b32_e32 v0, v0, v12246; VI-NEXT:    s_setpc_b64 s[30:31]2247;2248; GFX9-LABEL: add_select_negfabs_fabs_v2f16:2249; GFX9:       ; %bb.0:2250; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2251; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12252; GFX9-NEXT:    v_or_b32_e32 v1, 0x80008000, v22253; GFX9-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v32254; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02255; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2256; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12257; GFX9-NEXT:    s_mov_b32 s4, 0x50401002258; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s42259; GFX9-NEXT:    v_pk_add_f16 v0, v0, v42260; GFX9-NEXT:    s_setpc_b64 s[30:31]2261;2262; GFX11-TRUE16-LABEL: add_select_negfabs_fabs_v2f16:2263; GFX11-TRUE16:       ; %bb.0:2264; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2265; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02266; GFX11-TRUE16-NEXT:    v_or_b32_e32 v0, 0x80008000, v22267; GFX11-TRUE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v32268; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v12269; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2270; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo2271; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v2.h, v0.h, s02272; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2273; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v42274; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2275;2276; GFX11-FAKE16-LABEL: add_select_negfabs_fabs_v2f16:2277; GFX11-FAKE16:       ; %bb.0:2278; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2279; GFX11-FAKE16-NEXT:    v_or_b32_e32 v2, 0x80008000, v22280; GFX11-FAKE16-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v32281; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02282; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2283; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v22284; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v32285; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo2286; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12287; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2288; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo2289; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002290; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2291; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v42292; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2293  %cmp = icmp eq <2 x i32> %c, zeroinitializer2294  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)2295  %fneg.fabs.x = fneg <2 x half> %fabs.x2296  %fabs.y = call <2 x half> @llvm.fabs.v2f16(<2 x half> %y)2297  %select = select <2 x i1> %cmp, <2 x half> %fneg.fabs.x, <2 x half> %fabs.y2298  %add = fadd <2 x half> %select, %z2299  ret <2 x half> %add2300}2301 2302define <2 x half> @add_select_fabs_negfabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {2303; CI-LABEL: add_select_fabs_negfabs_v2f16:2304; CI:       ; %bb.0:2305; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2306; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52307; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42308; CI-NEXT:    v_cvt_f16_f32_e32 v7, v72309; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32310; CI-NEXT:    v_lshlrev_b32_e32 v5, 16, v52311; CI-NEXT:    v_or_b32_e32 v4, v4, v52312; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22313; CI-NEXT:    v_cvt_f16_f32_e32 v6, v62314; CI-NEXT:    v_or_b32_e32 v4, 0x80008000, v42315; CI-NEXT:    v_cvt_f32_f16_e32 v5, v72316; CI-NEXT:    v_lshrrev_b32_e32 v7, 16, v42317; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|2318; CI-NEXT:    v_cvt_f32_f16_e32 v7, v72319; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|2320; CI-NEXT:    v_cvt_f32_f16_e32 v4, v42321; CI-NEXT:    v_cvt_f32_f16_e32 v6, v62322; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12323; CI-NEXT:    v_cndmask_b32_e32 v1, v7, v3, vcc2324; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02325; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc2326; CI-NEXT:    v_add_f32_e32 v0, v0, v62327; CI-NEXT:    v_add_f32_e32 v1, v1, v52328; CI-NEXT:    s_setpc_b64 s[30:31]2329;2330; VI-LABEL: add_select_fabs_negfabs_v2f16:2331; VI:       ; %bb.0:2332; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2333; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12334; VI-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v22335; VI-NEXT:    v_or_b32_e32 v2, 0x80008000, v32336; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02337; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2338; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12339; VI-NEXT:    v_add_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12340; VI-NEXT:    v_add_f16_e32 v0, v0, v42341; VI-NEXT:    v_or_b32_e32 v0, v0, v12342; VI-NEXT:    s_setpc_b64 s[30:31]2343;2344; GFX9-LABEL: add_select_fabs_negfabs_v2f16:2345; GFX9:       ; %bb.0:2346; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2347; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12348; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v22349; GFX9-NEXT:    v_or_b32_e32 v2, 0x80008000, v32350; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02351; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2352; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12353; GFX9-NEXT:    s_mov_b32 s4, 0x50401002354; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s42355; GFX9-NEXT:    v_pk_add_f16 v0, v0, v42356; GFX9-NEXT:    s_setpc_b64 s[30:31]2357;2358; GFX11-TRUE16-LABEL: add_select_fabs_negfabs_v2f16:2359; GFX11-TRUE16:       ; %bb.0:2360; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2361; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02362; GFX11-TRUE16-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v22363; GFX11-TRUE16-NEXT:    v_or_b32_e32 v2, 0x80008000, v32364; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v12365; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2366; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo2367; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v2.h, v0.h, s02368; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2369; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v42370; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2371;2372; GFX11-FAKE16-LABEL: add_select_fabs_negfabs_v2f16:2373; GFX11-FAKE16:       ; %bb.0:2374; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2375; GFX11-FAKE16-NEXT:    v_or_b32_e32 v3, 0x80008000, v32376; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02377; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)2378; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v32379; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v22380; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v22381; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo2382; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12383; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2384; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo2385; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002386; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2387; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v42388; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2389  %cmp = icmp eq <2 x i32> %c, zeroinitializer2390  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)2391  %fabs.y = call <2 x half> @llvm.fabs.v2f16(<2 x half> %y)2392  %fneg.fabs.y = fneg <2 x half> %fabs.y2393  %select = select <2 x i1> %cmp, <2 x half> %fabs.x, <2 x half> %fneg.fabs.y2394  %add = fadd <2 x half> %select, %z2395  ret <2 x half> %add2396}2397 2398define <2 x half> @add_select_neg_fabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {2399; CI-LABEL: add_select_neg_fabs_v2f16:2400; CI:       ; %bb.0:2401; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2402; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32403; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22404; CI-NEXT:    v_cvt_f16_f32_e32 v7, v72405; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52406; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v32407; CI-NEXT:    v_or_b32_e32 v2, v2, v32408; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42409; CI-NEXT:    v_cvt_f16_f32_e32 v6, v62410; CI-NEXT:    v_xor_b32_e32 v2, 0x80008000, v22411; CI-NEXT:    v_cvt_f32_f16_e32 v3, v72412; CI-NEXT:    v_lshrrev_b32_e32 v7, 16, v22413; CI-NEXT:    v_cvt_f32_f16_e32 v7, v72414; CI-NEXT:    v_cvt_f32_f16_e64 v5, |v5|2415; CI-NEXT:    v_cvt_f32_f16_e32 v2, v22416; CI-NEXT:    v_cvt_f32_f16_e64 v4, |v4|2417; CI-NEXT:    v_cvt_f32_f16_e32 v6, v62418; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12419; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v7, vcc2420; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02421; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc2422; CI-NEXT:    v_add_f32_e32 v0, v0, v62423; CI-NEXT:    v_add_f32_e32 v1, v1, v32424; CI-NEXT:    s_setpc_b64 s[30:31]2425;2426; VI-LABEL: add_select_neg_fabs_v2f16:2427; VI:       ; %bb.0:2428; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2429; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12430; VI-NEXT:    v_xor_b32_e32 v1, 0x80008000, v22431; VI-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v32432; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02433; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2434; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12435; VI-NEXT:    v_add_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12436; VI-NEXT:    v_add_f16_e32 v0, v0, v42437; VI-NEXT:    v_or_b32_e32 v0, v0, v12438; VI-NEXT:    s_setpc_b64 s[30:31]2439;2440; GFX9-LABEL: add_select_neg_fabs_v2f16:2441; GFX9:       ; %bb.0:2442; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2443; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12444; GFX9-NEXT:    v_xor_b32_e32 v1, 0x80008000, v22445; GFX9-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v32446; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02447; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2448; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12449; GFX9-NEXT:    s_mov_b32 s4, 0x50401002450; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s42451; GFX9-NEXT:    v_pk_add_f16 v0, v0, v42452; GFX9-NEXT:    s_setpc_b64 s[30:31]2453;2454; GFX11-TRUE16-LABEL: add_select_neg_fabs_v2f16:2455; GFX11-TRUE16:       ; %bb.0:2456; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2457; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02458; GFX11-TRUE16-NEXT:    v_xor_b32_e32 v0, 0x80008000, v22459; GFX11-TRUE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v32460; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v12461; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2462; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo2463; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v2.h, v0.h, s02464; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2465; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v42466; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2467;2468; GFX11-FAKE16-LABEL: add_select_neg_fabs_v2f16:2469; GFX11-FAKE16:       ; %bb.0:2470; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2471; GFX11-FAKE16-NEXT:    v_xor_b32_e32 v2, 0x80008000, v22472; GFX11-FAKE16-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v32473; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02474; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)2475; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v22476; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v32477; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo2478; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12479; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2480; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo2481; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002482; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2483; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v42484; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2485  %cmp = icmp eq <2 x i32> %c, zeroinitializer2486  %fneg.x = fneg <2 x half> %x2487  %fabs.y = call <2 x half> @llvm.fabs.v2f16(<2 x half> %y)2488  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> %fabs.y2489  %add = fadd <2 x half> %select, %z2490  ret <2 x half> %add2491}2492 2493define <2 x half> @add_select_fabs_neg_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {2494; CI-LABEL: add_select_fabs_neg_v2f16:2495; CI:       ; %bb.0:2496; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2497; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52498; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42499; CI-NEXT:    v_cvt_f16_f32_e32 v7, v72500; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32501; CI-NEXT:    v_lshlrev_b32_e32 v5, 16, v52502; CI-NEXT:    v_or_b32_e32 v4, v4, v52503; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22504; CI-NEXT:    v_cvt_f16_f32_e32 v6, v62505; CI-NEXT:    v_xor_b32_e32 v4, 0x80008000, v42506; CI-NEXT:    v_cvt_f32_f16_e32 v5, v72507; CI-NEXT:    v_lshrrev_b32_e32 v7, 16, v42508; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|2509; CI-NEXT:    v_cvt_f32_f16_e32 v7, v72510; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|2511; CI-NEXT:    v_cvt_f32_f16_e32 v4, v42512; CI-NEXT:    v_cvt_f32_f16_e32 v6, v62513; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12514; CI-NEXT:    v_cndmask_b32_e32 v1, v7, v3, vcc2515; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02516; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc2517; CI-NEXT:    v_add_f32_e32 v0, v0, v62518; CI-NEXT:    v_add_f32_e32 v1, v1, v52519; CI-NEXT:    s_setpc_b64 s[30:31]2520;2521; VI-LABEL: add_select_fabs_neg_v2f16:2522; VI:       ; %bb.0:2523; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2524; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12525; VI-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v22526; VI-NEXT:    v_xor_b32_e32 v2, 0x80008000, v32527; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02528; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2529; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12530; VI-NEXT:    v_add_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12531; VI-NEXT:    v_add_f16_e32 v0, v0, v42532; VI-NEXT:    v_or_b32_e32 v0, v0, v12533; VI-NEXT:    s_setpc_b64 s[30:31]2534;2535; GFX9-LABEL: add_select_fabs_neg_v2f16:2536; GFX9:       ; %bb.0:2537; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2538; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12539; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v22540; GFX9-NEXT:    v_xor_b32_e32 v2, 0x80008000, v32541; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02542; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2543; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12544; GFX9-NEXT:    s_mov_b32 s4, 0x50401002545; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s42546; GFX9-NEXT:    v_pk_add_f16 v0, v0, v42547; GFX9-NEXT:    s_setpc_b64 s[30:31]2548;2549; GFX11-TRUE16-LABEL: add_select_fabs_neg_v2f16:2550; GFX11-TRUE16:       ; %bb.0:2551; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2552; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02553; GFX11-TRUE16-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v22554; GFX11-TRUE16-NEXT:    v_xor_b32_e32 v2, 0x80008000, v32555; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v12556; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2557; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo2558; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v2.h, v0.h, s02559; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2560; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v0, v42561; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2562;2563; GFX11-FAKE16-LABEL: add_select_fabs_neg_v2f16:2564; GFX11-FAKE16:       ; %bb.0:2565; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2566; GFX11-FAKE16-NEXT:    v_xor_b32_e32 v3, 0x80008000, v32567; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02568; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)2569; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v32570; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v22571; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v22572; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo2573; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12574; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2575; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo2576; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002577; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2578; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v0, v42579; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2580  %cmp = icmp eq <2 x i32> %c, zeroinitializer2581  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)2582  %fneg.y = fneg <2 x half> %y2583  %select = select <2 x i1> %cmp, <2 x half> %fabs.x, <2 x half> %fneg.y2584  %add = fadd <2 x half> %select, %z2585  ret <2 x half> %add2586}2587 2588define <2 x half> @add_select_neg_negfabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {2589; CI-LABEL: add_select_neg_negfabs_v2f16:2590; CI:       ; %bb.0:2591; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2592; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32593; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52594; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22595; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42596; CI-NEXT:    v_cvt_f16_f32_e32 v7, v72597; CI-NEXT:    v_cvt_f16_f32_e32 v6, v62598; CI-NEXT:    v_cvt_f32_f16_e32 v3, v32599; CI-NEXT:    v_cvt_f32_f16_e64 v5, |v5|2600; CI-NEXT:    v_cvt_f32_f16_e32 v2, v22601; CI-NEXT:    v_cvt_f32_f16_e64 v4, |v4|2602; CI-NEXT:    v_cvt_f32_f16_e32 v7, v72603; CI-NEXT:    v_cvt_f32_f16_e32 v6, v62604; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12605; CI-NEXT:    v_cndmask_b32_e32 v1, v5, v3, vcc2606; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02607; CI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc2608; CI-NEXT:    v_sub_f32_e32 v0, v6, v02609; CI-NEXT:    v_sub_f32_e32 v1, v7, v12610; CI-NEXT:    s_setpc_b64 s[30:31]2611;2612; VI-LABEL: add_select_neg_negfabs_v2f16:2613; VI:       ; %bb.0:2614; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2615; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12616; VI-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v32617; VI-NEXT:    v_cndmask_b32_sdwa v3, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12618; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02619; VI-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc2620; VI-NEXT:    v_sub_f16_sdwa v1, v4, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2621; VI-NEXT:    v_sub_f16_e32 v0, v4, v02622; VI-NEXT:    v_or_b32_e32 v0, v0, v12623; VI-NEXT:    s_setpc_b64 s[30:31]2624;2625; GFX9-LABEL: add_select_neg_negfabs_v2f16:2626; GFX9:       ; %bb.0:2627; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2628; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12629; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v32630; GFX9-NEXT:    v_cndmask_b32_sdwa v3, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12631; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02632; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v2, vcc2633; GFX9-NEXT:    s_mov_b32 s4, 0x50401002634; GFX9-NEXT:    v_perm_b32 v0, v3, v0, s42635; GFX9-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]2636; GFX9-NEXT:    s_setpc_b64 s[30:31]2637;2638; GFX11-TRUE16-LABEL: add_select_neg_negfabs_v2f16:2639; GFX11-TRUE16:       ; %bb.0:2640; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2641; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12642; GFX11-TRUE16-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v32643; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v02644; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2645; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v1.h, v2.h, vcc_lo2646; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v1.l, v2.l, s02647; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2648; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]2649; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2650;2651; GFX11-FAKE16-LABEL: add_select_neg_negfabs_v2f16:2652; GFX11-FAKE16:       ; %bb.0:2653; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2654; GFX11-FAKE16-NEXT:    v_and_b32_e32 v3, 0x7fff7fff, v32655; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v22656; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12657; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)2658; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v32659; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo2660; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02661; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v3, v2, vcc_lo2662; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2663; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002664; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]2665; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2666  %cmp = icmp eq <2 x i32> %c, zeroinitializer2667  %fneg.x = fneg <2 x half> %x2668  %fabs.y = call <2 x half> @llvm.fabs.v2f16(<2 x half> %y)2669  %fneg.fabs.y = fneg <2 x half> %fabs.y2670  %select = select <2 x i1> %cmp, <2 x half> %fneg.x, <2 x half> %fneg.fabs.y2671  %add = fadd <2 x half> %select, %z2672  ret <2 x half> %add2673}2674 2675define <2 x half> @add_select_negfabs_neg_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y, <2 x half> %z) {2676; CI-LABEL: add_select_negfabs_neg_v2f16:2677; CI:       ; %bb.0:2678; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2679; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52680; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32681; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42682; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22683; CI-NEXT:    v_cvt_f16_f32_e32 v7, v72684; CI-NEXT:    v_cvt_f16_f32_e32 v6, v62685; CI-NEXT:    v_cvt_f32_f16_e32 v5, v52686; CI-NEXT:    v_cvt_f32_f16_e64 v3, |v3|2687; CI-NEXT:    v_cvt_f32_f16_e32 v4, v42688; CI-NEXT:    v_cvt_f32_f16_e64 v2, |v2|2689; CI-NEXT:    v_cvt_f32_f16_e32 v7, v72690; CI-NEXT:    v_cvt_f32_f16_e32 v6, v62691; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12692; CI-NEXT:    v_cndmask_b32_e32 v1, v3, v5, vcc2693; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02694; CI-NEXT:    v_cndmask_b32_e32 v0, v2, v4, vcc2695; CI-NEXT:    v_sub_f32_e32 v0, v6, v02696; CI-NEXT:    v_sub_f32_e32 v1, v7, v12697; CI-NEXT:    s_setpc_b64 s[30:31]2698;2699; VI-LABEL: add_select_negfabs_neg_v2f16:2700; VI:       ; %bb.0:2701; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2702; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12703; VI-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v22704; VI-NEXT:    v_cndmask_b32_sdwa v2, v1, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12705; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02706; VI-NEXT:    v_cndmask_b32_e32 v0, v1, v3, vcc2707; VI-NEXT:    v_sub_f16_sdwa v1, v4, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD2708; VI-NEXT:    v_sub_f16_e32 v0, v4, v02709; VI-NEXT:    v_or_b32_e32 v0, v0, v12710; VI-NEXT:    s_setpc_b64 s[30:31]2711;2712; GFX9-LABEL: add_select_negfabs_neg_v2f16:2713; GFX9:       ; %bb.0:2714; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2715; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12716; GFX9-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v22717; GFX9-NEXT:    v_cndmask_b32_sdwa v2, v1, v3, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_12718; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02719; GFX9-NEXT:    v_cndmask_b32_e32 v0, v1, v3, vcc2720; GFX9-NEXT:    s_mov_b32 s4, 0x50401002721; GFX9-NEXT:    v_perm_b32 v0, v2, v0, s42722; GFX9-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]2723; GFX9-NEXT:    s_setpc_b64 s[30:31]2724;2725; GFX11-TRUE16-LABEL: add_select_negfabs_neg_v2f16:2726; GFX11-TRUE16:       ; %bb.0:2727; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2728; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12729; GFX11-TRUE16-NEXT:    v_and_b32_e32 v1, 0x7fff7fff, v22730; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v02731; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2732; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, v1.h, v3.h, vcc_lo2733; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, v1.l, v3.l, s02734; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2735; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]2736; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2737;2738; GFX11-FAKE16-LABEL: add_select_negfabs_neg_v2f16:2739; GFX11-FAKE16:       ; %bb.0:2740; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2741; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v5, 16, v32742; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12743; GFX11-FAKE16-NEXT:    v_and_b32_e32 v2, 0x7fff7fff, v22744; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2745; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v6, 16, v22746; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, v6, v5, vcc_lo2747; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02748; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, v2, v3, vcc_lo2749; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2750; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002751; GFX11-FAKE16-NEXT:    v_pk_add_f16 v0, v4, v0 neg_lo:[0,1] neg_hi:[0,1]2752; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2753  %cmp = icmp eq <2 x i32> %c, zeroinitializer2754  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)2755  %fneg.fabs.x = fneg <2 x half> %fabs.x2756  %fneg.y = fneg <2 x half> %y2757  %select = select <2 x i1> %cmp, <2 x half> %fneg.y, <2 x half> %fneg.fabs.x2758  %add = fadd <2 x half> %select, %z2759  ret <2 x half> %add2760}2761 2762define <2 x half> @mul_select_negfabs_posk_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {2763; CI-LABEL: mul_select_negfabs_posk_v2f16:2764; CI:       ; %bb.0:2765; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2766; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32767; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22768; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52769; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42770; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v32771; CI-NEXT:    v_or_b32_e32 v2, v2, v32772; CI-NEXT:    v_or_b32_e32 v2, 0x80008000, v22773; CI-NEXT:    v_cvt_f32_f16_e32 v3, v52774; CI-NEXT:    v_lshrrev_b32_e32 v5, 16, v22775; CI-NEXT:    v_cvt_f32_f16_e32 v5, v52776; CI-NEXT:    v_cvt_f32_f16_e32 v2, v22777; CI-NEXT:    v_cvt_f32_f16_e32 v4, v42778; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12779; CI-NEXT:    v_cndmask_b32_e32 v1, 4.0, v5, vcc2780; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02781; CI-NEXT:    v_cndmask_b32_e32 v0, 4.0, v2, vcc2782; CI-NEXT:    v_mul_f32_e32 v0, v0, v42783; CI-NEXT:    v_mul_f32_e32 v1, v1, v32784; CI-NEXT:    s_setpc_b64 s[30:31]2785;2786; VI-LABEL: mul_select_negfabs_posk_v2f16:2787; VI:       ; %bb.0:2788; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2789; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12790; VI-NEXT:    v_or_b32_e32 v1, 0x80008000, v22791; VI-NEXT:    v_mov_b32_e32 v2, 0x44002792; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02793; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2794; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12795; VI-NEXT:    v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12796; VI-NEXT:    v_mul_f16_e32 v0, v0, v32797; VI-NEXT:    v_or_b32_e32 v0, v0, v12798; VI-NEXT:    s_setpc_b64 s[30:31]2799;2800; GFX9-LABEL: mul_select_negfabs_posk_v2f16:2801; GFX9:       ; %bb.0:2802; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2803; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12804; GFX9-NEXT:    v_or_b32_e32 v1, 0x80008000, v22805; GFX9-NEXT:    v_mov_b32_e32 v2, 0x44002806; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02807; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2808; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12809; GFX9-NEXT:    s_mov_b32 s4, 0x50401002810; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s42811; GFX9-NEXT:    v_pk_mul_f16 v0, v0, v32812; GFX9-NEXT:    s_setpc_b64 s[30:31]2813;2814; GFX11-TRUE16-LABEL: mul_select_negfabs_posk_v2f16:2815; GFX11-TRUE16:       ; %bb.0:2816; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2817; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02818; GFX11-TRUE16-NEXT:    v_or_b32_e32 v0, 0x80008000, v22819; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v12820; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2821; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4400, v0.l, vcc_lo2822; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4400, v0.h, s02823; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2824; GFX11-TRUE16-NEXT:    v_pk_mul_f16 v0, v0, v32825; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2826;2827; GFX11-FAKE16-LABEL: mul_select_negfabs_posk_v2f16:2828; GFX11-FAKE16:       ; %bb.0:2829; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2830; GFX11-FAKE16-NEXT:    v_or_b32_e32 v2, 0x80008000, v22831; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02832; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)2833; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v22834; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4400, v2, vcc_lo2835; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v12836; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4400, v4, vcc_lo2837; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2838; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002839; GFX11-FAKE16-NEXT:    v_pk_mul_f16 v0, v0, v32840; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2841  %cmp = icmp eq <2 x i32> %c, zeroinitializer2842  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)2843  %fneg.fabs.x = fneg <2 x half> %fabs.x2844  %select = select <2 x i1> %cmp, <2 x half> %fneg.fabs.x, <2 x half> <half 4.0, half 4.0>2845  %add = fmul <2 x half> %select, %y2846  ret <2 x half> %add2847}2848 2849define <2 x half> @mul_select_posk_negfabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {2850; CI-LABEL: mul_select_posk_negfabs_v2f16:2851; CI:       ; %bb.0:2852; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2853; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32854; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22855; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52856; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42857; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v32858; CI-NEXT:    v_or_b32_e32 v2, v2, v32859; CI-NEXT:    v_or_b32_e32 v2, 0x80008000, v22860; CI-NEXT:    v_cvt_f32_f16_e32 v3, v52861; CI-NEXT:    v_lshrrev_b32_e32 v5, 16, v22862; CI-NEXT:    v_cvt_f32_f16_e32 v5, v52863; CI-NEXT:    v_cvt_f32_f16_e32 v2, v22864; CI-NEXT:    v_cvt_f32_f16_e32 v4, v42865; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12866; CI-NEXT:    v_cndmask_b32_e32 v1, 4.0, v5, vcc2867; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v02868; CI-NEXT:    v_cndmask_b32_e32 v0, 4.0, v2, vcc2869; CI-NEXT:    v_mul_f32_e32 v0, v0, v42870; CI-NEXT:    v_mul_f32_e32 v1, v1, v32871; CI-NEXT:    s_setpc_b64 s[30:31]2872;2873; VI-LABEL: mul_select_posk_negfabs_v2f16:2874; VI:       ; %bb.0:2875; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2876; VI-NEXT:    v_or_b32_e32 v2, 0x80008000, v22877; VI-NEXT:    v_mov_b32_e32 v4, 0x44002878; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v02879; VI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc2880; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12881; VI-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12882; VI-NEXT:    v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12883; VI-NEXT:    v_mul_f16_e32 v0, v0, v32884; VI-NEXT:    v_or_b32_e32 v0, v0, v12885; VI-NEXT:    s_setpc_b64 s[30:31]2886;2887; GFX9-LABEL: mul_select_posk_negfabs_v2f16:2888; GFX9:       ; %bb.0:2889; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2890; GFX9-NEXT:    v_or_b32_e32 v2, 0x80008000, v22891; GFX9-NEXT:    v_mov_b32_e32 v4, 0x44002892; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v02893; GFX9-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc2894; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12895; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12896; GFX9-NEXT:    s_mov_b32 s4, 0x50401002897; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s42898; GFX9-NEXT:    v_pk_mul_f16 v0, v0, v32899; GFX9-NEXT:    s_setpc_b64 s[30:31]2900;2901; GFX11-TRUE16-LABEL: mul_select_posk_negfabs_v2f16:2902; GFX11-TRUE16:       ; %bb.0:2903; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2904; GFX11-TRUE16-NEXT:    v_or_b32_e32 v2, 0x80008000, v22905; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v02906; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e64 s0, 0, v12907; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2908; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4400, v2.l, vcc_lo2909; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4400, v2.h, s02910; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2911; GFX11-TRUE16-NEXT:    v_pk_mul_f16 v0, v0, v32912; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]2913;2914; GFX11-FAKE16-LABEL: mul_select_posk_negfabs_v2f16:2915; GFX11-FAKE16:       ; %bb.0:2916; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2917; GFX11-FAKE16-NEXT:    v_or_b32_e32 v2, 0x80008000, v22918; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v02919; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)2920; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v22921; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4400, v2, vcc_lo2922; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v12923; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4400, v4, vcc_lo2924; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)2925; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401002926; GFX11-FAKE16-NEXT:    v_pk_mul_f16 v0, v0, v32927; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]2928  %cmp = icmp eq <2 x i32> %c, zeroinitializer2929  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)2930  %fneg.fabs.x = fneg <2 x half> %fabs.x2931  %select = select <2 x i1> %cmp, <2 x half> <half 4.0, half 4.0>, <2 x half> %fneg.fabs.x2932  %add = fmul <2 x half> %select, %y2933  ret <2 x half> %add2934}2935 2936define <2 x half> @mul_select_negfabs_negk_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {2937; CI-LABEL: mul_select_negfabs_negk_v2f16:2938; CI:       ; %bb.0:2939; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2940; CI-NEXT:    v_cvt_f16_f32_e32 v3, v32941; CI-NEXT:    v_cvt_f16_f32_e32 v2, v22942; CI-NEXT:    v_cvt_f16_f32_e32 v5, v52943; CI-NEXT:    v_cvt_f16_f32_e32 v4, v42944; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v32945; CI-NEXT:    v_or_b32_e32 v2, v2, v32946; CI-NEXT:    v_or_b32_e32 v2, 0x80008000, v22947; CI-NEXT:    v_cvt_f32_f16_e32 v3, v52948; CI-NEXT:    v_lshrrev_b32_e32 v5, 16, v22949; CI-NEXT:    v_cvt_f32_f16_e32 v5, v52950; CI-NEXT:    v_cvt_f32_f16_e32 v2, v22951; CI-NEXT:    v_cvt_f32_f16_e32 v4, v42952; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12953; CI-NEXT:    v_cndmask_b32_e32 v1, -4.0, v5, vcc2954; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v02955; CI-NEXT:    v_cndmask_b32_e32 v0, -4.0, v2, vcc2956; CI-NEXT:    v_mul_f32_e32 v0, v0, v42957; CI-NEXT:    v_mul_f32_e32 v1, v1, v32958; CI-NEXT:    s_setpc_b64 s[30:31]2959;2960; VI-LABEL: mul_select_negfabs_negk_v2f16:2961; VI:       ; %bb.0:2962; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2963; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12964; VI-NEXT:    v_or_b32_e32 v1, 0x80008000, v22965; VI-NEXT:    v_mov_b32_e32 v2, 0xc4002966; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02967; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2968; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12969; VI-NEXT:    v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12970; VI-NEXT:    v_mul_f16_e32 v0, v0, v32971; VI-NEXT:    v_or_b32_e32 v0, v0, v12972; VI-NEXT:    s_setpc_b64 s[30:31]2973;2974; GFX9-LABEL: mul_select_negfabs_negk_v2f16:2975; GFX9:       ; %bb.0:2976; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2977; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v12978; GFX9-NEXT:    v_or_b32_e32 v1, 0x80008000, v22979; GFX9-NEXT:    v_mov_b32_e32 v2, 0xc4002980; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v02981; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]2982; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_12983; GFX9-NEXT:    s_mov_b32 s4, 0x50401002984; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s42985; GFX9-NEXT:    v_pk_mul_f16 v0, v0, v32986; GFX9-NEXT:    s_setpc_b64 s[30:31]2987;2988; GFX11-TRUE16-LABEL: mul_select_negfabs_negk_v2f16:2989; GFX11-TRUE16:       ; %bb.0:2990; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2991; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v02992; GFX11-TRUE16-NEXT:    v_or_b32_e32 v0, 0x80008000, v22993; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v12994; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)2995; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0xc400, v0.l, vcc_lo2996; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0xc400, v0.h, s02997; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)2998; GFX11-TRUE16-NEXT:    v_pk_mul_f16 v0, v0, v32999; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3000;3001; GFX11-FAKE16-LABEL: mul_select_negfabs_negk_v2f16:3002; GFX11-FAKE16:       ; %bb.0:3003; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3004; GFX11-FAKE16-NEXT:    v_or_b32_e32 v2, 0x80008000, v23005; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03006; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)3007; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v23008; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xc400, v2, vcc_lo3009; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v13010; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xc400, v4, vcc_lo3011; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3012; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003013; GFX11-FAKE16-NEXT:    v_pk_mul_f16 v0, v0, v33014; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3015  %cmp = icmp eq <2 x i32> %c, zeroinitializer3016  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)3017  %fneg.fabs.x = fneg <2 x half> %fabs.x3018  %select = select <2 x i1> %cmp, <2 x half> %fneg.fabs.x, <2 x half> <half -4.0, half -4.0>3019  %add = fmul <2 x half> %select, %y3020  ret <2 x half> %add3021}3022 3023define <2 x half> @mul_select_negk_negfabs_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {3024; CI-LABEL: mul_select_negk_negfabs_v2f16:3025; CI:       ; %bb.0:3026; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3027; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33028; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23029; CI-NEXT:    v_cvt_f16_f32_e32 v5, v53030; CI-NEXT:    v_cvt_f16_f32_e32 v4, v43031; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v33032; CI-NEXT:    v_or_b32_e32 v2, v2, v33033; CI-NEXT:    v_or_b32_e32 v2, 0x80008000, v23034; CI-NEXT:    v_cvt_f32_f16_e32 v3, v53035; CI-NEXT:    v_lshrrev_b32_e32 v5, 16, v23036; CI-NEXT:    v_cvt_f32_f16_e32 v5, v53037; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23038; CI-NEXT:    v_cvt_f32_f16_e32 v4, v43039; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v13040; CI-NEXT:    v_cndmask_b32_e32 v1, -4.0, v5, vcc3041; CI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v03042; CI-NEXT:    v_cndmask_b32_e32 v0, -4.0, v2, vcc3043; CI-NEXT:    v_mul_f32_e32 v0, v0, v43044; CI-NEXT:    v_mul_f32_e32 v1, v1, v33045; CI-NEXT:    s_setpc_b64 s[30:31]3046;3047; VI-LABEL: mul_select_negk_negfabs_v2f16:3048; VI:       ; %bb.0:3049; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3050; VI-NEXT:    v_or_b32_e32 v2, 0x80008000, v23051; VI-NEXT:    v_mov_b32_e32 v4, 0xc4003052; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v03053; VI-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc3054; VI-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v13055; VI-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13056; VI-NEXT:    v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13057; VI-NEXT:    v_mul_f16_e32 v0, v0, v33058; VI-NEXT:    v_or_b32_e32 v0, v0, v13059; VI-NEXT:    s_setpc_b64 s[30:31]3060;3061; GFX9-LABEL: mul_select_negk_negfabs_v2f16:3062; GFX9:       ; %bb.0:3063; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3064; GFX9-NEXT:    v_or_b32_e32 v2, 0x80008000, v23065; GFX9-NEXT:    v_mov_b32_e32 v4, 0xc4003066; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v03067; GFX9-NEXT:    v_cndmask_b32_e32 v0, v4, v2, vcc3068; GFX9-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v13069; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v4, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13070; GFX9-NEXT:    s_mov_b32 s4, 0x50401003071; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s43072; GFX9-NEXT:    v_pk_mul_f16 v0, v0, v33073; GFX9-NEXT:    s_setpc_b64 s[30:31]3074;3075; GFX11-TRUE16-LABEL: mul_select_negk_negfabs_v2f16:3076; GFX11-TRUE16:       ; %bb.0:3077; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3078; GFX11-TRUE16-NEXT:    v_or_b32_e32 v2, 0x80008000, v23079; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v03080; GFX11-TRUE16-NEXT:    v_cmp_ne_u32_e64 s0, 0, v13081; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)3082; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0xc400, v2.l, vcc_lo3083; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0xc400, v2.h, s03084; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)3085; GFX11-TRUE16-NEXT:    v_pk_mul_f16 v0, v0, v33086; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3087;3088; GFX11-FAKE16-LABEL: mul_select_negk_negfabs_v2f16:3089; GFX11-FAKE16:       ; %bb.0:3090; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3091; GFX11-FAKE16-NEXT:    v_or_b32_e32 v2, 0x80008000, v23092; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v03093; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)3094; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v4, 16, v23095; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0xc400, v2, vcc_lo3096; GFX11-FAKE16-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v13097; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0xc400, v4, vcc_lo3098; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)3099; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003100; GFX11-FAKE16-NEXT:    v_pk_mul_f16 v0, v0, v33101; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3102  %cmp = icmp eq <2 x i32> %c, zeroinitializer3103  %fabs.x = call <2 x half> @llvm.fabs.v2f16(<2 x half> %x)3104  %fneg.fabs.x = fneg <2 x half> %fabs.x3105  %select = select <2 x i1> %cmp, <2 x half> <half -4.0, half -4.0>, <2 x half> %fneg.fabs.x3106  %add = fmul <2 x half> %select, %y3107  ret <2 x half> %add3108}3109 3110; --------------------------------------------------------------------------------3111; Don't fold if fneg can fold into the source3112; --------------------------------------------------------------------------------3113 3114define <2 x half> @select_fneg_posk_src_add_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {3115; CI-LABEL: select_fneg_posk_src_add_v2f16:3116; CI:       ; %bb.0:3117; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3118; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33119; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23120; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v03121; CI-NEXT:    v_cvt_f32_f16_e32 v3, v33122; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23123; CI-NEXT:    v_add_f32_e32 v3, 4.0, v33124; CI-NEXT:    v_add_f32_e32 v2, 4.0, v23125; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33126; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23127; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v33128; CI-NEXT:    v_or_b32_e32 v2, v2, v33129; CI-NEXT:    v_xor_b32_e32 v2, 0x80008000, v23130; CI-NEXT:    v_cvt_f32_f16_e32 v3, v23131; CI-NEXT:    v_lshrrev_b32_e32 v2, 16, v23132; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23133; CI-NEXT:    v_cndmask_b32_e32 v0, 2.0, v3, vcc3134; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13135; CI-NEXT:    v_cndmask_b32_e32 v1, 2.0, v2, vcc3136; CI-NEXT:    s_setpc_b64 s[30:31]3137;3138; VI-LABEL: select_fneg_posk_src_add_v2f16:3139; VI:       ; %bb.0:3140; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3141; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13142; VI-NEXT:    v_mov_b32_e32 v1, 0x44003143; VI-NEXT:    v_add_f16_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3144; VI-NEXT:    v_add_f16_e32 v2, 4.0, v23145; VI-NEXT:    v_or_b32_e32 v1, v2, v13146; VI-NEXT:    v_xor_b32_e32 v1, 0x80008000, v13147; VI-NEXT:    v_mov_b32_e32 v2, 0x40003148; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03149; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3150; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13151; VI-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3152; VI-NEXT:    s_setpc_b64 s[30:31]3153;3154; GFX9-LABEL: select_fneg_posk_src_add_v2f16:3155; GFX9:       ; %bb.0:3156; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3157; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13158; GFX9-NEXT:    v_pk_add_f16 v1, v2, 4.0 op_sel_hi:[1,0]3159; GFX9-NEXT:    v_xor_b32_e32 v1, 0x80008000, v13160; GFX9-NEXT:    v_mov_b32_e32 v2, 0x40003161; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03162; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3163; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13164; GFX9-NEXT:    s_mov_b32 s4, 0x50401003165; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s43166; GFX9-NEXT:    s_setpc_b64 s[30:31]3167;3168; GFX11-TRUE16-LABEL: select_fneg_posk_src_add_v2f16:3169; GFX11-TRUE16:       ; %bb.0:3170; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3171; GFX11-TRUE16-NEXT:    v_pk_add_f16 v2, v2, 4.0 op_sel_hi:[1,0]3172; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03173; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v13174; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3175; GFX11-TRUE16-NEXT:    v_xor_b32_e32 v0, 0x80008000, v23176; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo3177; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)3178; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4000, v0.h, s03179; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3180;3181; GFX11-FAKE16-LABEL: select_fneg_posk_src_add_v2f16:3182; GFX11-FAKE16:       ; %bb.0:3183; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3184; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, v2, 4.0 op_sel_hi:[1,0]3185; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03186; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3187; GFX11-FAKE16-NEXT:    v_xor_b32_e32 v2, 0x80008000, v23188; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v23189; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4000, v2, vcc_lo3190; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v13191; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3192; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4000, v3, vcc_lo3193; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003194; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3195  %cmp = icmp eq <2 x i32> %c, zeroinitializer3196  %add = fadd <2 x half> %x, <half 4.0, half 4.0>3197  %fneg = fneg <2 x half> %add3198  %select = select <2 x i1> %cmp, <2 x half> %fneg, <2 x half> <half 2.0, half 2.0>3199  ret <2 x half> %select3200}3201 3202define <2 x half> @select_fneg_posk_src_add_v2f16_nsz(<2 x i32> %c, <2 x half> %x, <2 x half> %y) {3203; CI-LABEL: select_fneg_posk_src_add_v2f16_nsz:3204; CI:       ; %bb.0:3205; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3206; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23207; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33208; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v03209; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23210; CI-NEXT:    v_cvt_f32_f16_e32 v3, v33211; CI-NEXT:    v_sub_f32_e32 v2, -4.0, v23212; CI-NEXT:    v_sub_f32_e32 v3, -4.0, v33213; CI-NEXT:    v_cndmask_b32_e32 v0, 2.0, v2, vcc3214; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13215; CI-NEXT:    v_cndmask_b32_e32 v1, 2.0, v3, vcc3216; CI-NEXT:    s_setpc_b64 s[30:31]3217;3218; VI-LABEL: select_fneg_posk_src_add_v2f16_nsz:3219; VI:       ; %bb.0:3220; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3221; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13222; VI-NEXT:    v_mov_b32_e32 v1, 0xc4003223; VI-NEXT:    v_sub_f16_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13224; VI-NEXT:    v_sub_f16_e32 v2, -4.0, v23225; VI-NEXT:    v_mov_b32_e32 v3, 0x40003226; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03227; VI-NEXT:    v_cndmask_b32_e64 v0, v3, v2, s[4:5]3228; VI-NEXT:    v_cndmask_b32_sdwa v1, v3, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3229; VI-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3230; VI-NEXT:    s_setpc_b64 s[30:31]3231;3232; GFX9-LABEL: select_fneg_posk_src_add_v2f16_nsz:3233; GFX9:       ; %bb.0:3234; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3235; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13236; GFX9-NEXT:    v_pk_add_f16 v1, v2, -4.0 op_sel_hi:[1,0] neg_lo:[1,0] neg_hi:[1,0]3237; GFX9-NEXT:    v_mov_b32_e32 v2, 0x40003238; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03239; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3240; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13241; GFX9-NEXT:    s_mov_b32 s4, 0x50401003242; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s43243; GFX9-NEXT:    s_setpc_b64 s[30:31]3244;3245; GFX11-TRUE16-LABEL: select_fneg_posk_src_add_v2f16_nsz:3246; GFX11-TRUE16:       ; %bb.0:3247; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3248; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03249; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v2, -4.0 op_sel_hi:[1,0] neg_lo:[1,0] neg_hi:[1,0]3250; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v13251; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3252; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo3253; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4000, v0.h, s03254; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3255;3256; GFX11-FAKE16-LABEL: select_fneg_posk_src_add_v2f16_nsz:3257; GFX11-FAKE16:       ; %bb.0:3258; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3259; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, v2, -4.0 op_sel_hi:[1,0] neg_lo:[1,0] neg_hi:[1,0]3260; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03261; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)3262; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v23263; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4000, v2, vcc_lo3264; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v13265; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4000, v3, vcc_lo3266; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)3267; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003268; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3269  %cmp = icmp eq <2 x i32> %c, zeroinitializer3270  %add = fadd nsz <2 x half> %x, <half 4.0, half 4.0>3271  %fneg = fneg <2 x half> %add3272  %select = select <2 x i1> %cmp, <2 x half> %fneg, <2 x half> <half 2.0, half 2.0>3273  ret <2 x half> %select3274}3275 3276define <2 x half> @select_fneg_posk_src_sub_v2f16(<2 x i32> %c, <2 x half> %x) {3277; CI-LABEL: select_fneg_posk_src_sub_v2f16:3278; CI:       ; %bb.0:3279; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3280; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33281; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23282; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v03283; CI-NEXT:    v_cvt_f32_f16_e32 v3, v33284; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23285; CI-NEXT:    v_add_f32_e32 v3, -4.0, v33286; CI-NEXT:    v_add_f32_e32 v2, -4.0, v23287; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33288; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23289; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v33290; CI-NEXT:    v_or_b32_e32 v2, v2, v33291; CI-NEXT:    v_xor_b32_e32 v2, 0x80008000, v23292; CI-NEXT:    v_cvt_f32_f16_e32 v3, v23293; CI-NEXT:    v_lshrrev_b32_e32 v2, 16, v23294; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23295; CI-NEXT:    v_cndmask_b32_e32 v0, 2.0, v3, vcc3296; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13297; CI-NEXT:    v_cndmask_b32_e32 v1, 2.0, v2, vcc3298; CI-NEXT:    s_setpc_b64 s[30:31]3299;3300; VI-LABEL: select_fneg_posk_src_sub_v2f16:3301; VI:       ; %bb.0:3302; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3303; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13304; VI-NEXT:    v_mov_b32_e32 v1, 0xc4003305; VI-NEXT:    v_add_f16_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3306; VI-NEXT:    v_add_f16_e32 v2, -4.0, v23307; VI-NEXT:    v_or_b32_e32 v1, v2, v13308; VI-NEXT:    v_xor_b32_e32 v1, 0x80008000, v13309; VI-NEXT:    v_mov_b32_e32 v2, 0x40003310; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03311; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3312; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13313; VI-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3314; VI-NEXT:    s_setpc_b64 s[30:31]3315;3316; GFX9-LABEL: select_fneg_posk_src_sub_v2f16:3317; GFX9:       ; %bb.0:3318; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3319; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13320; GFX9-NEXT:    v_pk_add_f16 v1, v2, -4.0 op_sel_hi:[1,0]3321; GFX9-NEXT:    v_xor_b32_e32 v1, 0x80008000, v13322; GFX9-NEXT:    v_mov_b32_e32 v2, 0x40003323; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03324; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3325; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13326; GFX9-NEXT:    s_mov_b32 s4, 0x50401003327; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s43328; GFX9-NEXT:    s_setpc_b64 s[30:31]3329;3330; GFX11-TRUE16-LABEL: select_fneg_posk_src_sub_v2f16:3331; GFX11-TRUE16:       ; %bb.0:3332; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3333; GFX11-TRUE16-NEXT:    v_pk_add_f16 v2, v2, -4.0 op_sel_hi:[1,0]3334; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03335; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v13336; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3337; GFX11-TRUE16-NEXT:    v_xor_b32_e32 v0, 0x80008000, v23338; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo3339; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)3340; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4000, v0.h, s03341; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3342;3343; GFX11-FAKE16-LABEL: select_fneg_posk_src_sub_v2f16:3344; GFX11-FAKE16:       ; %bb.0:3345; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3346; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, v2, -4.0 op_sel_hi:[1,0]3347; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03348; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3349; GFX11-FAKE16-NEXT:    v_xor_b32_e32 v2, 0x80008000, v23350; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v23351; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4000, v2, vcc_lo3352; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v13353; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3354; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4000, v3, vcc_lo3355; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003356; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3357  %cmp = icmp eq <2 x i32> %c, zeroinitializer3358  %add = fsub <2 x half> %x, <half 4.0, half 4.0>3359  %fneg = fneg <2 x half> %add3360  %select = select <2 x i1> %cmp, <2 x half> %fneg, <2 x half> <half 2.0, half 2.0>3361  ret <2 x half> %select3362}3363 3364define <2 x half> @select_fneg_posk_src_sub_v2f16_nsz(<2 x i32> %c, <2 x half> %x) {3365; CI-LABEL: select_fneg_posk_src_sub_v2f16_nsz:3366; CI:       ; %bb.0:3367; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3368; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23369; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33370; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v03371; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23372; CI-NEXT:    v_cvt_f32_f16_e32 v3, v33373; CI-NEXT:    v_sub_f32_e32 v2, 4.0, v23374; CI-NEXT:    v_sub_f32_e32 v3, 4.0, v33375; CI-NEXT:    v_cndmask_b32_e32 v0, 2.0, v2, vcc3376; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13377; CI-NEXT:    v_cndmask_b32_e32 v1, 2.0, v3, vcc3378; CI-NEXT:    s_setpc_b64 s[30:31]3379;3380; VI-LABEL: select_fneg_posk_src_sub_v2f16_nsz:3381; VI:       ; %bb.0:3382; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3383; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13384; VI-NEXT:    v_mov_b32_e32 v1, 0x44003385; VI-NEXT:    v_sub_f16_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13386; VI-NEXT:    v_sub_f16_e32 v2, 4.0, v23387; VI-NEXT:    v_mov_b32_e32 v3, 0x40003388; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03389; VI-NEXT:    v_cndmask_b32_e64 v0, v3, v2, s[4:5]3390; VI-NEXT:    v_cndmask_b32_sdwa v1, v3, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3391; VI-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3392; VI-NEXT:    s_setpc_b64 s[30:31]3393;3394; GFX9-LABEL: select_fneg_posk_src_sub_v2f16_nsz:3395; GFX9:       ; %bb.0:3396; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3397; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13398; GFX9-NEXT:    v_pk_add_f16 v1, v2, 4.0 op_sel_hi:[1,0] neg_lo:[1,0] neg_hi:[1,0]3399; GFX9-NEXT:    v_mov_b32_e32 v2, 0x40003400; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03401; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3402; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13403; GFX9-NEXT:    s_mov_b32 s4, 0x50401003404; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s43405; GFX9-NEXT:    s_setpc_b64 s[30:31]3406;3407; GFX11-TRUE16-LABEL: select_fneg_posk_src_sub_v2f16_nsz:3408; GFX11-TRUE16:       ; %bb.0:3409; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3410; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03411; GFX11-TRUE16-NEXT:    v_pk_add_f16 v0, v2, 4.0 op_sel_hi:[1,0] neg_lo:[1,0] neg_hi:[1,0]3412; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v13413; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3414; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo3415; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4000, v0.h, s03416; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3417;3418; GFX11-FAKE16-LABEL: select_fneg_posk_src_sub_v2f16_nsz:3419; GFX11-FAKE16:       ; %bb.0:3420; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3421; GFX11-FAKE16-NEXT:    v_pk_add_f16 v2, v2, 4.0 op_sel_hi:[1,0] neg_lo:[1,0] neg_hi:[1,0]3422; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03423; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)3424; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v23425; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4000, v2, vcc_lo3426; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v13427; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4000, v3, vcc_lo3428; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)3429; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003430; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3431  %cmp = icmp eq <2 x i32> %c, zeroinitializer3432  %add = fsub <2 x half> %x, <half 4.0, half 4.0>3433  %fneg = fneg nsz <2 x half> %add3434  %select = select <2 x i1> %cmp, <2 x half> %fneg, <2 x half> <half 2.0, half 2.0>3435  ret <2 x half> %select3436}3437 3438define <2 x half> @select_fneg_posk_src_mul_v2f16(<2 x i32> %c, <2 x half> %x) {3439; CI-LABEL: select_fneg_posk_src_mul_v2f16:3440; CI:       ; %bb.0:3441; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3442; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23443; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33444; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v03445; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23446; CI-NEXT:    v_cvt_f32_f16_e32 v3, v33447; CI-NEXT:    v_mul_f32_e32 v2, -4.0, v23448; CI-NEXT:    v_mul_f32_e32 v3, -4.0, v33449; CI-NEXT:    v_cndmask_b32_e32 v0, 2.0, v2, vcc3450; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13451; CI-NEXT:    v_cndmask_b32_e32 v1, 2.0, v3, vcc3452; CI-NEXT:    s_setpc_b64 s[30:31]3453;3454; VI-LABEL: select_fneg_posk_src_mul_v2f16:3455; VI:       ; %bb.0:3456; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3457; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13458; VI-NEXT:    v_mov_b32_e32 v1, 0xc4003459; VI-NEXT:    v_mul_f16_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD3460; VI-NEXT:    v_mul_f16_e32 v2, -4.0, v23461; VI-NEXT:    v_mov_b32_e32 v3, 0x40003462; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03463; VI-NEXT:    v_cndmask_b32_e64 v0, v3, v2, s[4:5]3464; VI-NEXT:    v_cndmask_b32_sdwa v1, v3, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3465; VI-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3466; VI-NEXT:    s_setpc_b64 s[30:31]3467;3468; GFX9-LABEL: select_fneg_posk_src_mul_v2f16:3469; GFX9:       ; %bb.0:3470; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3471; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13472; GFX9-NEXT:    v_pk_mul_f16 v1, v2, -4.0 op_sel_hi:[1,0]3473; GFX9-NEXT:    v_mov_b32_e32 v2, 0x40003474; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03475; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3476; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13477; GFX9-NEXT:    s_mov_b32 s4, 0x50401003478; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s43479; GFX9-NEXT:    s_setpc_b64 s[30:31]3480;3481; GFX11-TRUE16-LABEL: select_fneg_posk_src_mul_v2f16:3482; GFX11-TRUE16:       ; %bb.0:3483; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3484; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03485; GFX11-TRUE16-NEXT:    v_pk_mul_f16 v0, v2, -4.0 op_sel_hi:[1,0]3486; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v13487; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3488; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo3489; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4000, v0.h, s03490; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3491;3492; GFX11-FAKE16-LABEL: select_fneg_posk_src_mul_v2f16:3493; GFX11-FAKE16:       ; %bb.0:3494; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3495; GFX11-FAKE16-NEXT:    v_pk_mul_f16 v2, v2, -4.0 op_sel_hi:[1,0]3496; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03497; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)3498; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v23499; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4000, v2, vcc_lo3500; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v13501; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4000, v3, vcc_lo3502; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)3503; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003504; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3505  %cmp = icmp eq <2 x i32> %c, zeroinitializer3506  %mul = fmul <2 x half> %x, <half 4.0, half 4.0>3507  %fneg = fneg <2 x half> %mul3508  %select = select <2 x i1> %cmp, <2 x half> %fneg, <2 x half> <half 2.0, half 2.0>3509  ret <2 x half> %select3510}3511 3512define <2 x half> @select_fneg_posk_src_fma_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %z) {3513; CI-LABEL: select_fneg_posk_src_fma_v2f16:3514; CI:       ; %bb.0:3515; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3516; CI-NEXT:    v_cvt_f16_f32_e32 v5, v53517; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33518; CI-NEXT:    v_cvt_f16_f32_e32 v4, v43519; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23520; CI-NEXT:    v_cvt_f32_f16_e32 v5, v53521; CI-NEXT:    v_cvt_f32_f16_e32 v3, v33522; CI-NEXT:    v_cvt_f32_f16_e32 v4, v43523; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23524; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v03525; CI-NEXT:    v_fma_f32 v3, v3, 4.0, v53526; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33527; CI-NEXT:    v_fma_f32 v2, v2, 4.0, v43528; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23529; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v33530; CI-NEXT:    v_or_b32_e32 v2, v2, v33531; CI-NEXT:    v_xor_b32_e32 v2, 0x80008000, v23532; CI-NEXT:    v_cvt_f32_f16_e32 v3, v23533; CI-NEXT:    v_lshrrev_b32_e32 v2, 16, v23534; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23535; CI-NEXT:    v_cndmask_b32_e32 v0, 2.0, v3, vcc3536; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13537; CI-NEXT:    v_cndmask_b32_e32 v1, 2.0, v2, vcc3538; CI-NEXT:    s_setpc_b64 s[30:31]3539;3540; VI-LABEL: select_fneg_posk_src_fma_v2f16:3541; VI:       ; %bb.0:3542; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3543; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13544; VI-NEXT:    v_lshrrev_b32_e32 v1, 16, v33545; VI-NEXT:    v_lshrrev_b32_e32 v4, 16, v23546; VI-NEXT:    v_fma_f16 v1, v4, 4.0, v13547; VI-NEXT:    v_lshlrev_b32_e32 v1, 16, v13548; VI-NEXT:    v_fma_f16 v2, v2, 4.0, v33549; VI-NEXT:    v_or_b32_e32 v1, v2, v13550; VI-NEXT:    v_xor_b32_e32 v1, 0x80008000, v13551; VI-NEXT:    v_mov_b32_e32 v2, 0x40003552; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03553; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3554; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13555; VI-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3556; VI-NEXT:    s_setpc_b64 s[30:31]3557;3558; GFX9-LABEL: select_fneg_posk_src_fma_v2f16:3559; GFX9:       ; %bb.0:3560; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3561; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13562; GFX9-NEXT:    v_pk_fma_f16 v1, v2, 4.0, v3 op_sel_hi:[1,0,1]3563; GFX9-NEXT:    v_xor_b32_e32 v1, 0x80008000, v13564; GFX9-NEXT:    v_mov_b32_e32 v2, 0x40003565; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03566; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3567; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13568; GFX9-NEXT:    s_mov_b32 s4, 0x50401003569; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s43570; GFX9-NEXT:    s_setpc_b64 s[30:31]3571;3572; GFX11-TRUE16-LABEL: select_fneg_posk_src_fma_v2f16:3573; GFX11-TRUE16:       ; %bb.0:3574; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3575; GFX11-TRUE16-NEXT:    v_pk_fma_f16 v2, v2, 4.0, v3 op_sel_hi:[1,0,1]3576; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03577; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v13578; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3579; GFX11-TRUE16-NEXT:    v_xor_b32_e32 v0, 0x80008000, v23580; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo3581; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)3582; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4000, v0.h, s03583; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3584;3585; GFX11-FAKE16-LABEL: select_fneg_posk_src_fma_v2f16:3586; GFX11-FAKE16:       ; %bb.0:3587; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3588; GFX11-FAKE16-NEXT:    v_pk_fma_f16 v2, v2, 4.0, v3 op_sel_hi:[1,0,1]3589; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03590; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3591; GFX11-FAKE16-NEXT:    v_xor_b32_e32 v2, 0x80008000, v23592; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v23593; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4000, v2, vcc_lo3594; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v13595; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3596; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4000, v3, vcc_lo3597; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003598; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3599  %cmp = icmp eq <2 x i32> %c, zeroinitializer3600  %fma = call <2 x half> @llvm.fma.v2f16(<2 x half> %x, <2 x half> <half 4.0, half 4.0>, <2 x half> %z)3601  %fneg = fneg <2 x half> %fma3602  %select = select <2 x i1> %cmp, <2 x half> %fneg, <2 x half> <half 2.0, half 2.0>3603  ret <2 x half> %select3604}3605 3606define <2 x half> @select_fneg_posk_src_fmad_v2f16(<2 x i32> %c, <2 x half> %x, <2 x half> %z) {3607; CI-LABEL: select_fneg_posk_src_fmad_v2f16:3608; CI:       ; %bb.0:3609; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3610; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33611; CI-NEXT:    v_cvt_f16_f32_e32 v5, v53612; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23613; CI-NEXT:    v_cvt_f16_f32_e32 v4, v43614; CI-NEXT:    v_cvt_f32_f16_e32 v3, v33615; CI-NEXT:    v_cvt_f32_f16_e32 v5, v53616; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23617; CI-NEXT:    v_cvt_f32_f16_e32 v4, v43618; CI-NEXT:    v_mul_f32_e32 v3, 4.0, v33619; CI-NEXT:    v_add_f32_e32 v3, v3, v53620; CI-NEXT:    v_mul_f32_e32 v2, 4.0, v23621; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33622; CI-NEXT:    v_add_f32_e32 v2, v2, v43623; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23624; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v03625; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v33626; CI-NEXT:    v_or_b32_e32 v2, v2, v33627; CI-NEXT:    v_xor_b32_e32 v2, 0x80008000, v23628; CI-NEXT:    v_cvt_f32_f16_e32 v3, v23629; CI-NEXT:    v_lshrrev_b32_e32 v2, 16, v23630; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23631; CI-NEXT:    v_cndmask_b32_e32 v0, 2.0, v3, vcc3632; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13633; CI-NEXT:    v_cndmask_b32_e32 v1, 2.0, v2, vcc3634; CI-NEXT:    s_setpc_b64 s[30:31]3635;3636; VI-LABEL: select_fneg_posk_src_fmad_v2f16:3637; VI:       ; %bb.0:3638; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3639; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13640; VI-NEXT:    v_lshrrev_b32_e32 v1, 16, v33641; VI-NEXT:    v_lshrrev_b32_e32 v4, 16, v23642; VI-NEXT:    v_fma_f16 v1, v4, 4.0, v13643; VI-NEXT:    v_lshlrev_b32_e32 v1, 16, v13644; VI-NEXT:    v_fma_f16 v2, v2, 4.0, v33645; VI-NEXT:    v_or_b32_e32 v1, v2, v13646; VI-NEXT:    v_xor_b32_e32 v1, 0x80008000, v13647; VI-NEXT:    v_mov_b32_e32 v2, 0x40003648; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03649; VI-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3650; VI-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13651; VI-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3652; VI-NEXT:    s_setpc_b64 s[30:31]3653;3654; GFX9-LABEL: select_fneg_posk_src_fmad_v2f16:3655; GFX9:       ; %bb.0:3656; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3657; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13658; GFX9-NEXT:    v_pk_fma_f16 v1, v2, 4.0, v3 op_sel_hi:[1,0,1]3659; GFX9-NEXT:    v_xor_b32_e32 v1, 0x80008000, v13660; GFX9-NEXT:    v_mov_b32_e32 v2, 0x40003661; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03662; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3663; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13664; GFX9-NEXT:    s_mov_b32 s4, 0x50401003665; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s43666; GFX9-NEXT:    s_setpc_b64 s[30:31]3667;3668; GFX11-TRUE16-LABEL: select_fneg_posk_src_fmad_v2f16:3669; GFX11-TRUE16:       ; %bb.0:3670; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3671; GFX11-TRUE16-NEXT:    v_pk_fma_f16 v2, v2, 4.0, v3 op_sel_hi:[1,0,1]3672; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03673; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v13674; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3675; GFX11-TRUE16-NEXT:    v_xor_b32_e32 v0, 0x80008000, v23676; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo3677; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2)3678; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4000, v0.h, s03679; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3680;3681; GFX11-FAKE16-LABEL: select_fneg_posk_src_fmad_v2f16:3682; GFX11-FAKE16:       ; %bb.0:3683; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3684; GFX11-FAKE16-NEXT:    v_pk_fma_f16 v2, v2, 4.0, v3 op_sel_hi:[1,0,1]3685; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03686; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)3687; GFX11-FAKE16-NEXT:    v_xor_b32_e32 v2, 0x80008000, v23688; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v23689; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4000, v2, vcc_lo3690; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v13691; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)3692; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4000, v3, vcc_lo3693; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003694; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3695  %cmp = icmp eq <2 x i32> %c, zeroinitializer3696  %fmad = call <2 x half> @llvm.fmuladd.v2f16(<2 x half> %x, <2 x half> <half 4.0, half 4.0>, <2 x half> %z)3697  %fneg = fneg <2 x half> %fmad3698  %select = select <2 x i1> %cmp, <2 x half> %fneg, <2 x half> <half 2.0, half 2.0>3699  ret <2 x half> %select3700}3701 3702define <2 x half> @select_fneg_posk_src_fmad_v2f16_nsz(<2 x i32> %c, <2 x half> %x, <2 x half> %z) {3703; CI-LABEL: select_fneg_posk_src_fmad_v2f16_nsz:3704; CI:       ; %bb.0:3705; CI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3706; CI-NEXT:    v_cvt_f16_f32_e32 v2, v23707; CI-NEXT:    v_cvt_f16_f32_e32 v3, v33708; CI-NEXT:    v_cvt_f16_f32_e32 v4, v43709; CI-NEXT:    v_cvt_f16_f32_e32 v5, v53710; CI-NEXT:    v_cvt_f32_f16_e32 v2, v23711; CI-NEXT:    v_cvt_f32_f16_e32 v3, v33712; CI-NEXT:    v_cvt_f32_f16_e32 v4, v43713; CI-NEXT:    v_cvt_f32_f16_e32 v5, v53714; CI-NEXT:    v_mul_f32_e32 v2, -4.0, v23715; CI-NEXT:    v_mul_f32_e32 v3, -4.0, v33716; CI-NEXT:    v_sub_f32_e32 v2, v2, v43717; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v03718; CI-NEXT:    v_sub_f32_e32 v3, v3, v53719; CI-NEXT:    v_cndmask_b32_e32 v0, 2.0, v2, vcc3720; CI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13721; CI-NEXT:    v_cndmask_b32_e32 v1, 2.0, v3, vcc3722; CI-NEXT:    s_setpc_b64 s[30:31]3723;3724; VI-LABEL: select_fneg_posk_src_fmad_v2f16_nsz:3725; VI:       ; %bb.0:3726; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3727; VI-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13728; VI-NEXT:    v_lshrrev_b32_e32 v1, 16, v33729; VI-NEXT:    v_lshrrev_b32_e32 v4, 16, v23730; VI-NEXT:    v_fma_f16 v1, v4, -4.0, -v13731; VI-NEXT:    v_fma_f16 v2, v2, -4.0, -v33732; VI-NEXT:    v_mov_b32_e32 v3, 0x40003733; VI-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03734; VI-NEXT:    v_cndmask_b32_e64 v0, v3, v2, s[4:5]3735; VI-NEXT:    v_cndmask_b32_sdwa v1, v3, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD3736; VI-NEXT:    v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3737; VI-NEXT:    s_setpc_b64 s[30:31]3738;3739; GFX9-LABEL: select_fneg_posk_src_fmad_v2f16_nsz:3740; GFX9:       ; %bb.0:3741; GFX9-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3742; GFX9-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v13743; GFX9-NEXT:    v_pk_fma_f16 v1, v2, -4.0, v3 op_sel_hi:[1,0,1] neg_lo:[0,0,1] neg_hi:[0,0,1]3744; GFX9-NEXT:    v_mov_b32_e32 v2, 0x40003745; GFX9-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v03746; GFX9-NEXT:    v_cndmask_b32_e64 v0, v2, v1, s[4:5]3747; GFX9-NEXT:    v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_13748; GFX9-NEXT:    s_mov_b32 s4, 0x50401003749; GFX9-NEXT:    v_perm_b32 v0, v1, v0, s43750; GFX9-NEXT:    s_setpc_b64 s[30:31]3751;3752; GFX11-TRUE16-LABEL: select_fneg_posk_src_fmad_v2f16_nsz:3753; GFX11-TRUE16:       ; %bb.0:3754; GFX11-TRUE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3755; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03756; GFX11-TRUE16-NEXT:    v_pk_fma_f16 v0, v2, -4.0, v3 op_sel_hi:[1,0,1] neg_lo:[0,0,1] neg_hi:[0,0,1]3757; GFX11-TRUE16-NEXT:    v_cmp_eq_u32_e64 s0, 0, v13758; GFX11-TRUE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)3759; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.l, 0x4000, v0.l, vcc_lo3760; GFX11-TRUE16-NEXT:    v_cndmask_b16 v0.h, 0x4000, v0.h, s03761; GFX11-TRUE16-NEXT:    s_setpc_b64 s[30:31]3762;3763; GFX11-FAKE16-LABEL: select_fneg_posk_src_fmad_v2f16_nsz:3764; GFX11-FAKE16:       ; %bb.0:3765; GFX11-FAKE16-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3766; GFX11-FAKE16-NEXT:    v_pk_fma_f16 v2, v2, -4.0, v3 op_sel_hi:[1,0,1] neg_lo:[0,0,1] neg_hi:[0,0,1]3767; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v03768; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)3769; GFX11-FAKE16-NEXT:    v_lshrrev_b32_e32 v3, 16, v23770; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v0, 0x4000, v2, vcc_lo3771; GFX11-FAKE16-NEXT:    v_cmp_eq_u32_e32 vcc_lo, 0, v13772; GFX11-FAKE16-NEXT:    v_cndmask_b32_e32 v1, 0x4000, v3, vcc_lo3773; GFX11-FAKE16-NEXT:    s_delay_alu instid0(VALU_DEP_1)3774; GFX11-FAKE16-NEXT:    v_perm_b32 v0, v1, v0, 0x50401003775; GFX11-FAKE16-NEXT:    s_setpc_b64 s[30:31]3776  %cmp = icmp eq <2 x i32> %c, zeroinitializer3777  %fmad = call nsz <2 x half> @llvm.fmuladd.v2f16(<2 x half> %x, <2 x half> <half 4.0, half 4.0>, <2 x half> %z)3778  %fneg = fneg <2 x half> %fmad3779  %select = select <2 x i1> %cmp, <2 x half> %fneg, <2 x half> <half 2.0, half 2.0>3780  ret <2 x half> %select3781}3782 3783declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #03784declare <2 x half> @llvm.fma.v2f16(<2 x half>, <2 x half>, <2 x half>) #03785declare <2 x half> @llvm.fmuladd.v2f16(<2 x half>, <2 x half>, <2 x half>) #03786 3787attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }3788;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:3789; GFX11: {{.*}}3790