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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdpal -mcpu=hawaii %s -o - | FileCheck %s3 4; For all these tests we disable optimizations through function attributes5; because the code we are exercising here needs phis and we want to keep the6; IR small.7 8; This code used to crash in SDISel because f16 was promoted to f32 through9; a `f32 = vector_extract_elt <1 x f16>, i32 0`, which is illegal.10; The invalid SDNode and thus, the crash was only exposed by the constant11; folding.12define void @phi_vec1half_to_f32_with_const_folding(ptr addrspace(1) %dst) #0 {13; CHECK-LABEL: phi_vec1half_to_f32_with_const_folding:14; CHECK: ; %bb.0: ; %entry15; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)16; CHECK-NEXT: s_mov_b32 s4, 017; CHECK-NEXT: ; %bb.1: ; %bb18; CHECK-NEXT: v_cvt_f16_f32_e64 v2, s419; CHECK-NEXT: s_mov_b32 s7, 0xf00020; CHECK-NEXT: s_mov_b32 s6, 021; CHECK-NEXT: s_mov_b32 s4, s622; CHECK-NEXT: s_mov_b32 s5, s623; CHECK-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64 offset:224; CHECK-NEXT: v_cvt_f16_f32_e64 v2, s425; CHECK-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr6426; CHECK-NEXT: s_waitcnt vmcnt(0)27; CHECK-NEXT: s_setpc_b64 s[30:31]28entry:29 br label %bb30 31bb:32 %phi = phi <1 x half> [ zeroinitializer, %entry ]33 %res = shufflevector <1 x half> poison, <1 x half> %phi, <2 x i32> <i32 0, i32 1>34 store <2 x half> %res, ptr addrspace(1) %dst35 ret void36}37 38; Same as phi_vec1half_to_f32_with_const_folding but without the folding.39; This test exercises the same invalid SDNode, but it happened to work by40; accident before. Here we make sure the fix also work as expected in the41; non-constant folding case.42define void @phi_vec1half_to_f32(ptr addrspace(1) %src, ptr addrspace(1) %dst) #0 {43; CHECK-LABEL: phi_vec1half_to_f32:44; CHECK: ; %bb.0: ; %entry45; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)46; CHECK-NEXT: s_mov_b32 s7, 0xf00047; CHECK-NEXT: s_mov_b32 s6, 048; CHECK-NEXT: s_mov_b32 s4, s649; CHECK-NEXT: s_mov_b32 s5, s650; CHECK-NEXT: buffer_load_ushort v0, v[0:1], s[4:7], 0 addr6451; CHECK-NEXT: s_waitcnt vmcnt(0)52; CHECK-NEXT: v_cvt_f32_f16_e64 v0, v053; CHECK-NEXT: ; %bb.1: ; %bb54; CHECK-NEXT: v_cvt_f16_f32_e64 v0, v055; CHECK-NEXT: s_mov_b32 s7, 0xf00056; CHECK-NEXT: s_mov_b32 s6, 057; CHECK-NEXT: s_mov_b32 s4, s658; CHECK-NEXT: s_mov_b32 s5, s659; CHECK-NEXT: buffer_store_short v0, v[2:3], s[4:7], 0 addr64 offset:260; CHECK-NEXT: v_cvt_f16_f32_e64 v0, s461; CHECK-NEXT: buffer_store_short v0, v[2:3], s[4:7], 0 addr6462; CHECK-NEXT: s_waitcnt vmcnt(0)63; CHECK-NEXT: s_setpc_b64 s[30:31]64entry:65 %input = load <1 x half>, ptr addrspace(1) %src66 br label %bb67 68bb:69 %phi = phi <1 x half> [ %input, %entry ]70 %res = shufflevector <1 x half> poison, <1 x half> %phi, <2 x i32> <i32 0, i32 1>71 store <2 x half> %res, ptr addrspace(1) %dst72 ret void73}74 75; Same as phi_vec1bf16_to_f32 but with bfloat instead of half.76define void @phi_vec1bf16_to_f32(ptr addrspace(1) %src, ptr addrspace(1) %dst) #0 {77; CHECK-LABEL: phi_vec1bf16_to_f32:78; CHECK: ; %bb.0: ; %entry79; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)80; CHECK-NEXT: s_mov_b32 s7, 0xf00081; CHECK-NEXT: s_mov_b32 s6, 082; CHECK-NEXT: s_mov_b32 s4, s683; CHECK-NEXT: s_mov_b32 s5, s684; CHECK-NEXT: buffer_load_ushort v0, v[0:1], s[4:7], 0 addr6485; CHECK-NEXT: s_mov_b32 s4, 1686; CHECK-NEXT: s_waitcnt vmcnt(0)87; CHECK-NEXT: v_lshlrev_b32_e64 v0, s4, v088; CHECK-NEXT: ; %bb.1: ; %bb89; CHECK-NEXT: v_mul_f32_e64 v0, 1.0, v090; CHECK-NEXT: s_mov_b32 s4, 1691; CHECK-NEXT: v_lshrrev_b32_e64 v0, s4, v092; CHECK-NEXT: s_mov_b32 s7, 0xf00093; CHECK-NEXT: s_mov_b32 s6, 094; CHECK-NEXT: s_mov_b32 s4, s695; CHECK-NEXT: s_mov_b32 s5, s696; CHECK-NEXT: buffer_store_short v0, v[2:3], s[4:7], 0 addr64 offset:297; CHECK-NEXT: s_waitcnt vmcnt(0)98; CHECK-NEXT: s_setpc_b64 s[30:31]99entry:100 %input = load <1 x bfloat>, ptr addrspace(1) %src101 br label %bb102 103bb:104 %phi = phi <1 x bfloat> [ %input, %entry ]105 %res = shufflevector <1 x bfloat> poison, <1 x bfloat> %phi, <2 x i32> <i32 0, i32 1>106 store <2 x bfloat> %res, ptr addrspace(1) %dst107 ret void108}109 110; Same as phi_vec1half_to_f32_with_const_folding but with bfloat instead of half.111define void @phi_vec1bf16_to_f32_with_const_folding(ptr addrspace(1) %dst) #0 {112; CHECK-LABEL: phi_vec1bf16_to_f32_with_const_folding:113; CHECK: ; %bb.0: ; %entry114; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)115; CHECK-NEXT: s_mov_b32 s4, 0116; CHECK-NEXT: ; %bb.1: ; %bb117; CHECK-NEXT: v_mul_f32_e64 v2, 1.0, s4118; CHECK-NEXT: s_mov_b32 s4, 16119; CHECK-NEXT: v_lshrrev_b32_e32 v2, s4, v2120; CHECK-NEXT: s_mov_b32 s7, 0xf000121; CHECK-NEXT: s_mov_b32 s6, 0122; CHECK-NEXT: s_mov_b32 s4, s6123; CHECK-NEXT: s_mov_b32 s5, s6124; CHECK-NEXT: buffer_store_short v2, v[0:1], s[4:7], 0 addr64 offset:2125; CHECK-NEXT: s_waitcnt vmcnt(0)126; CHECK-NEXT: s_setpc_b64 s[30:31]127entry:128 br label %bb129 130bb:131 %phi = phi <1 x bfloat> [ zeroinitializer, %entry ]132 %res = shufflevector <1 x bfloat> poison, <1 x bfloat> %phi, <2 x i32> <i32 0, i32 1>133 store <2 x bfloat> %res, ptr addrspace(1) %dst134 ret void135}136 137attributes #0 = { noinline optnone }138