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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-- -mcpu=tahiti | FileCheck %s --check-prefix=SI3; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-- -mcpu=fiji -mattr=-flat-for-global | FileCheck %s --check-prefix=VI4; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+real-true16 -mattr=-flat-for-global | FileCheck %s --check-prefixes=GFX11,GFX11-TRUE165; RUN: llc < %s -amdgpu-scalarize-global-loads=false -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global | FileCheck %s --check-prefixes=GFX11,GFX11-FAKE166 7define amdgpu_kernel void @select_f16(8; SI-LABEL: select_f16:9; SI: ; %bb.0: ; %entry10; SI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x911; SI-NEXT: s_mov_b32 s3, 0xf00012; SI-NEXT: s_mov_b32 s2, -113; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x1114; SI-NEXT: s_mov_b32 s18, s215; SI-NEXT: s_waitcnt lgkmcnt(0)16; SI-NEXT: s_mov_b32 s16, s1017; SI-NEXT: s_mov_b32 s17, s1118; SI-NEXT: s_mov_b32 s19, s319; SI-NEXT: s_mov_b32 s20, s1220; SI-NEXT: s_mov_b32 s21, s1321; SI-NEXT: s_mov_b32 s22, s222; SI-NEXT: s_mov_b32 s23, s323; SI-NEXT: s_mov_b32 s12, s1424; SI-NEXT: s_mov_b32 s13, s1525; SI-NEXT: s_mov_b32 s14, s226; SI-NEXT: s_mov_b32 s15, s327; SI-NEXT: s_mov_b32 s6, s228; SI-NEXT: s_mov_b32 s7, s329; SI-NEXT: buffer_load_ushort v0, off, s[16:19], 0 glc30; SI-NEXT: s_waitcnt vmcnt(0)31; SI-NEXT: buffer_load_ushort v1, off, s[20:23], 0 glc32; SI-NEXT: s_waitcnt vmcnt(0)33; SI-NEXT: buffer_load_ushort v2, off, s[12:15], 0 glc34; SI-NEXT: s_waitcnt vmcnt(0)35; SI-NEXT: buffer_load_ushort v3, off, s[4:7], 0 glc36; SI-NEXT: s_waitcnt vmcnt(0)37; SI-NEXT: s_mov_b32 s0, s838; SI-NEXT: s_mov_b32 s1, s939; SI-NEXT: v_cvt_f32_f16_e32 v0, v040; SI-NEXT: v_cvt_f32_f16_e32 v1, v141; SI-NEXT: v_cvt_f32_f16_e32 v2, v242; SI-NEXT: v_cvt_f32_f16_e32 v3, v343; SI-NEXT: v_cmp_lt_f32_e32 vcc, v0, v144; SI-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc45; SI-NEXT: v_cvt_f16_f32_e32 v0, v046; SI-NEXT: buffer_store_short v0, off, s[0:3], 047; SI-NEXT: s_endpgm48;49; VI-LABEL: select_f16:50; VI: ; %bb.0: ; %entry51; VI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x2452; VI-NEXT: s_mov_b32 s3, 0xf00053; VI-NEXT: s_mov_b32 s2, -154; VI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x4455; VI-NEXT: s_mov_b32 s18, s256; VI-NEXT: s_waitcnt lgkmcnt(0)57; VI-NEXT: s_mov_b32 s16, s1058; VI-NEXT: s_mov_b32 s17, s1159; VI-NEXT: s_mov_b32 s19, s360; VI-NEXT: s_mov_b32 s20, s1261; VI-NEXT: s_mov_b32 s21, s1362; VI-NEXT: s_mov_b32 s22, s263; VI-NEXT: s_mov_b32 s23, s364; VI-NEXT: s_mov_b32 s12, s1465; VI-NEXT: s_mov_b32 s13, s1566; VI-NEXT: s_mov_b32 s14, s267; VI-NEXT: s_mov_b32 s15, s368; VI-NEXT: s_mov_b32 s6, s269; VI-NEXT: s_mov_b32 s7, s370; VI-NEXT: buffer_load_ushort v0, off, s[16:19], 0 glc71; VI-NEXT: s_waitcnt vmcnt(0)72; VI-NEXT: buffer_load_ushort v1, off, s[20:23], 0 glc73; VI-NEXT: s_waitcnt vmcnt(0)74; VI-NEXT: buffer_load_ushort v2, off, s[12:15], 0 glc75; VI-NEXT: s_waitcnt vmcnt(0)76; VI-NEXT: buffer_load_ushort v3, off, s[4:7], 0 glc77; VI-NEXT: s_waitcnt vmcnt(0)78; VI-NEXT: s_mov_b32 s0, s879; VI-NEXT: s_mov_b32 s1, s980; VI-NEXT: v_cmp_lt_f16_e32 vcc, v0, v181; VI-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc82; VI-NEXT: buffer_store_short v0, off, s[0:3], 083; VI-NEXT: s_endpgm84;85; GFX11-TRUE16-LABEL: select_f16:86; GFX11-TRUE16: ; %bb.0: ; %entry87; GFX11-TRUE16-NEXT: s_clause 0x188; GFX11-TRUE16-NEXT: s_load_b256 s[8:15], s[4:5], 0x2489; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x4490; GFX11-TRUE16-NEXT: s_mov_b32 s6, -191; GFX11-TRUE16-NEXT: s_mov_b32 s7, 0x3101600092; GFX11-TRUE16-NEXT: s_mov_b32 s18, s693; GFX11-TRUE16-NEXT: s_mov_b32 s19, s794; GFX11-TRUE16-NEXT: s_mov_b32 s22, s695; GFX11-TRUE16-NEXT: s_mov_b32 s23, s796; GFX11-TRUE16-NEXT: s_mov_b32 s26, s697; GFX11-TRUE16-NEXT: s_mov_b32 s27, s798; GFX11-TRUE16-NEXT: s_mov_b32 s2, s699; GFX11-TRUE16-NEXT: s_mov_b32 s3, s7100; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)101; GFX11-TRUE16-NEXT: s_mov_b32 s16, s10102; GFX11-TRUE16-NEXT: s_mov_b32 s17, s11103; GFX11-TRUE16-NEXT: s_mov_b32 s20, s12104; GFX11-TRUE16-NEXT: s_mov_b32 s21, s13105; GFX11-TRUE16-NEXT: s_mov_b32 s24, s14106; GFX11-TRUE16-NEXT: s_mov_b32 s25, s15107; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[16:19], 0 glc dlc108; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)109; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[20:23], 0 glc dlc110; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)111; GFX11-TRUE16-NEXT: buffer_load_u16 v3, off, s[24:27], 0 glc dlc112; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)113; GFX11-TRUE16-NEXT: buffer_load_u16 v2, off, s[0:3], 0 glc dlc114; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)115; GFX11-TRUE16-NEXT: s_mov_b32 s4, s8116; GFX11-TRUE16-NEXT: s_mov_b32 s5, s9117; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0.l, v1.l118; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v3.l119; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)120; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo121; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0122; GFX11-TRUE16-NEXT: s_endpgm123;124; GFX11-FAKE16-LABEL: select_f16:125; GFX11-FAKE16: ; %bb.0: ; %entry126; GFX11-FAKE16-NEXT: s_clause 0x1127; GFX11-FAKE16-NEXT: s_load_b256 s[8:15], s[4:5], 0x24128; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[4:5], 0x44129; GFX11-FAKE16-NEXT: s_mov_b32 s6, -1130; GFX11-FAKE16-NEXT: s_mov_b32 s7, 0x31016000131; GFX11-FAKE16-NEXT: s_mov_b32 s18, s6132; GFX11-FAKE16-NEXT: s_mov_b32 s19, s7133; GFX11-FAKE16-NEXT: s_mov_b32 s22, s6134; GFX11-FAKE16-NEXT: s_mov_b32 s23, s7135; GFX11-FAKE16-NEXT: s_mov_b32 s26, s6136; GFX11-FAKE16-NEXT: s_mov_b32 s27, s7137; GFX11-FAKE16-NEXT: s_mov_b32 s2, s6138; GFX11-FAKE16-NEXT: s_mov_b32 s3, s7139; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)140; GFX11-FAKE16-NEXT: s_mov_b32 s16, s10141; GFX11-FAKE16-NEXT: s_mov_b32 s17, s11142; GFX11-FAKE16-NEXT: s_mov_b32 s20, s12143; GFX11-FAKE16-NEXT: s_mov_b32 s21, s13144; GFX11-FAKE16-NEXT: s_mov_b32 s24, s14145; GFX11-FAKE16-NEXT: s_mov_b32 s25, s15146; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[16:19], 0 glc dlc147; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)148; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[20:23], 0 glc dlc149; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)150; GFX11-FAKE16-NEXT: buffer_load_u16 v2, off, s[24:27], 0 glc dlc151; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)152; GFX11-FAKE16-NEXT: buffer_load_u16 v3, off, s[0:3], 0 glc dlc153; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)154; GFX11-FAKE16-NEXT: s_mov_b32 s4, s8155; GFX11-FAKE16-NEXT: s_mov_b32 s5, s9156; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0, v1157; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc_lo158; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[4:7], 0159; GFX11-FAKE16-NEXT: s_endpgm160 161 ptr addrspace(1) %r,162 ptr addrspace(1) %a,163 ptr addrspace(1) %b,164 ptr addrspace(1) %c,165 ptr addrspace(1) %d) {166entry:167 %a.val = load volatile half, ptr addrspace(1) %a168 %b.val = load volatile half, ptr addrspace(1) %b169 %c.val = load volatile half, ptr addrspace(1) %c170 %d.val = load volatile half, ptr addrspace(1) %d171 %fcmp = fcmp olt half %a.val, %b.val172 %r.val = select i1 %fcmp, half %c.val, half %d.val173 store half %r.val, ptr addrspace(1) %r174 ret void175}176 177define amdgpu_kernel void @select_f16_imm_a(178; SI-LABEL: select_f16_imm_a:179; SI: ; %bb.0: ; %entry180; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9181; SI-NEXT: s_mov_b32 s11, 0xf000182; SI-NEXT: s_mov_b32 s10, -1183; SI-NEXT: s_mov_b32 s14, s10184; SI-NEXT: s_mov_b32 s15, s11185; SI-NEXT: s_waitcnt lgkmcnt(0)186; SI-NEXT: s_mov_b32 s12, s2187; SI-NEXT: s_mov_b32 s13, s3188; SI-NEXT: s_mov_b32 s16, s4189; SI-NEXT: s_mov_b32 s17, s5190; SI-NEXT: s_mov_b32 s18, s10191; SI-NEXT: s_mov_b32 s19, s11192; SI-NEXT: s_mov_b32 s4, s6193; SI-NEXT: s_mov_b32 s5, s7194; SI-NEXT: s_mov_b32 s6, s10195; SI-NEXT: s_mov_b32 s7, s11196; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc197; SI-NEXT: s_waitcnt vmcnt(0)198; SI-NEXT: buffer_load_ushort v1, off, s[16:19], 0 glc199; SI-NEXT: s_waitcnt vmcnt(0)200; SI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc201; SI-NEXT: s_waitcnt vmcnt(0)202; SI-NEXT: s_mov_b32 s8, s0203; SI-NEXT: s_mov_b32 s9, s1204; SI-NEXT: v_cvt_f32_f16_e32 v0, v0205; SI-NEXT: v_cvt_f32_f16_e32 v1, v1206; SI-NEXT: v_cvt_f32_f16_e32 v2, v2207; SI-NEXT: v_cmp_lt_f32_e32 vcc, 0.5, v0208; SI-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc209; SI-NEXT: v_cvt_f16_f32_e32 v0, v0210; SI-NEXT: buffer_store_short v0, off, s[8:11], 0211; SI-NEXT: s_endpgm212;213; VI-LABEL: select_f16_imm_a:214; VI: ; %bb.0: ; %entry215; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24216; VI-NEXT: s_mov_b32 s11, 0xf000217; VI-NEXT: s_mov_b32 s10, -1218; VI-NEXT: s_mov_b32 s14, s10219; VI-NEXT: s_mov_b32 s15, s11220; VI-NEXT: s_waitcnt lgkmcnt(0)221; VI-NEXT: s_mov_b32 s12, s2222; VI-NEXT: s_mov_b32 s13, s3223; VI-NEXT: s_mov_b32 s16, s4224; VI-NEXT: s_mov_b32 s17, s5225; VI-NEXT: s_mov_b32 s18, s10226; VI-NEXT: s_mov_b32 s19, s11227; VI-NEXT: s_mov_b32 s4, s6228; VI-NEXT: s_mov_b32 s5, s7229; VI-NEXT: s_mov_b32 s6, s10230; VI-NEXT: s_mov_b32 s7, s11231; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc232; VI-NEXT: s_waitcnt vmcnt(0)233; VI-NEXT: buffer_load_ushort v1, off, s[16:19], 0 glc234; VI-NEXT: s_waitcnt vmcnt(0)235; VI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc236; VI-NEXT: s_waitcnt vmcnt(0)237; VI-NEXT: s_mov_b32 s8, s0238; VI-NEXT: s_mov_b32 s9, s1239; VI-NEXT: v_cmp_lt_f16_e32 vcc, 0.5, v0240; VI-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc241; VI-NEXT: buffer_store_short v0, off, s[8:11], 0242; VI-NEXT: s_endpgm243;244; GFX11-TRUE16-LABEL: select_f16_imm_a:245; GFX11-TRUE16: ; %bb.0: ; %entry246; GFX11-TRUE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24247; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1248; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000249; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10250; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11251; GFX11-TRUE16-NEXT: s_mov_b32 s18, s10252; GFX11-TRUE16-NEXT: s_mov_b32 s19, s11253; GFX11-TRUE16-NEXT: s_mov_b32 s22, s10254; GFX11-TRUE16-NEXT: s_mov_b32 s23, s11255; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)256; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2257; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3258; GFX11-TRUE16-NEXT: s_mov_b32 s16, s4259; GFX11-TRUE16-NEXT: s_mov_b32 s17, s5260; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc261; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)262; GFX11-TRUE16-NEXT: s_mov_b32 s20, s6263; GFX11-TRUE16-NEXT: s_mov_b32 s21, s7264; GFX11-TRUE16-NEXT: buffer_load_u16 v2, off, s[16:19], 0 glc dlc265; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)266; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[20:23], 0 glc dlc267; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)268; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0269; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1270; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, 0.5, v0.l271; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l272; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)273; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, vcc_lo274; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0275; GFX11-TRUE16-NEXT: s_endpgm276;277; GFX11-FAKE16-LABEL: select_f16_imm_a:278; GFX11-FAKE16: ; %bb.0: ; %entry279; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24280; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1281; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000282; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10283; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11284; GFX11-FAKE16-NEXT: s_mov_b32 s18, s10285; GFX11-FAKE16-NEXT: s_mov_b32 s19, s11286; GFX11-FAKE16-NEXT: s_mov_b32 s22, s10287; GFX11-FAKE16-NEXT: s_mov_b32 s23, s11288; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)289; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2290; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3291; GFX11-FAKE16-NEXT: s_mov_b32 s16, s4292; GFX11-FAKE16-NEXT: s_mov_b32 s17, s5293; GFX11-FAKE16-NEXT: s_mov_b32 s20, s6294; GFX11-FAKE16-NEXT: s_mov_b32 s21, s7295; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc296; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)297; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[16:19], 0 glc dlc298; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)299; GFX11-FAKE16-NEXT: buffer_load_u16 v2, off, s[20:23], 0 glc dlc300; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)301; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0302; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1303; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, 0.5, v0304; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc_lo305; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0306; GFX11-FAKE16-NEXT: s_endpgm307 ptr addrspace(1) %r,308 ptr addrspace(1) %b,309 ptr addrspace(1) %c,310 ptr addrspace(1) %d) {311entry:312 %b.val = load volatile half, ptr addrspace(1) %b313 %c.val = load volatile half, ptr addrspace(1) %c314 %d.val = load volatile half, ptr addrspace(1) %d315 %fcmp = fcmp olt half 0xH3800, %b.val316 %r.val = select i1 %fcmp, half %c.val, half %d.val317 store half %r.val, ptr addrspace(1) %r318 ret void319}320 321define amdgpu_kernel void @select_f16_imm_b(322; SI-LABEL: select_f16_imm_b:323; SI: ; %bb.0: ; %entry324; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9325; SI-NEXT: s_mov_b32 s11, 0xf000326; SI-NEXT: s_mov_b32 s10, -1327; SI-NEXT: s_mov_b32 s14, s10328; SI-NEXT: s_mov_b32 s15, s11329; SI-NEXT: s_waitcnt lgkmcnt(0)330; SI-NEXT: s_mov_b32 s12, s2331; SI-NEXT: s_mov_b32 s13, s3332; SI-NEXT: s_mov_b32 s16, s4333; SI-NEXT: s_mov_b32 s17, s5334; SI-NEXT: s_mov_b32 s18, s10335; SI-NEXT: s_mov_b32 s19, s11336; SI-NEXT: s_mov_b32 s4, s6337; SI-NEXT: s_mov_b32 s5, s7338; SI-NEXT: s_mov_b32 s6, s10339; SI-NEXT: s_mov_b32 s7, s11340; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc341; SI-NEXT: s_waitcnt vmcnt(0)342; SI-NEXT: buffer_load_ushort v1, off, s[16:19], 0 glc343; SI-NEXT: s_waitcnt vmcnt(0)344; SI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc345; SI-NEXT: s_waitcnt vmcnt(0)346; SI-NEXT: s_mov_b32 s8, s0347; SI-NEXT: s_mov_b32 s9, s1348; SI-NEXT: v_cvt_f32_f16_e32 v0, v0349; SI-NEXT: v_cvt_f32_f16_e32 v1, v1350; SI-NEXT: v_cvt_f32_f16_e32 v2, v2351; SI-NEXT: v_cmp_gt_f32_e32 vcc, 0.5, v0352; SI-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc353; SI-NEXT: v_cvt_f16_f32_e32 v0, v0354; SI-NEXT: buffer_store_short v0, off, s[8:11], 0355; SI-NEXT: s_endpgm356;357; VI-LABEL: select_f16_imm_b:358; VI: ; %bb.0: ; %entry359; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24360; VI-NEXT: s_mov_b32 s11, 0xf000361; VI-NEXT: s_mov_b32 s10, -1362; VI-NEXT: s_mov_b32 s14, s10363; VI-NEXT: s_mov_b32 s15, s11364; VI-NEXT: s_waitcnt lgkmcnt(0)365; VI-NEXT: s_mov_b32 s12, s2366; VI-NEXT: s_mov_b32 s13, s3367; VI-NEXT: s_mov_b32 s16, s4368; VI-NEXT: s_mov_b32 s17, s5369; VI-NEXT: s_mov_b32 s18, s10370; VI-NEXT: s_mov_b32 s19, s11371; VI-NEXT: s_mov_b32 s4, s6372; VI-NEXT: s_mov_b32 s5, s7373; VI-NEXT: s_mov_b32 s6, s10374; VI-NEXT: s_mov_b32 s7, s11375; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc376; VI-NEXT: s_waitcnt vmcnt(0)377; VI-NEXT: buffer_load_ushort v1, off, s[16:19], 0 glc378; VI-NEXT: s_waitcnt vmcnt(0)379; VI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc380; VI-NEXT: s_waitcnt vmcnt(0)381; VI-NEXT: s_mov_b32 s8, s0382; VI-NEXT: s_mov_b32 s9, s1383; VI-NEXT: v_cmp_gt_f16_e32 vcc, 0.5, v0384; VI-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc385; VI-NEXT: buffer_store_short v0, off, s[8:11], 0386; VI-NEXT: s_endpgm387;388; GFX11-TRUE16-LABEL: select_f16_imm_b:389; GFX11-TRUE16: ; %bb.0: ; %entry390; GFX11-TRUE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24391; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1392; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000393; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10394; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11395; GFX11-TRUE16-NEXT: s_mov_b32 s18, s10396; GFX11-TRUE16-NEXT: s_mov_b32 s19, s11397; GFX11-TRUE16-NEXT: s_mov_b32 s22, s10398; GFX11-TRUE16-NEXT: s_mov_b32 s23, s11399; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)400; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2401; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3402; GFX11-TRUE16-NEXT: s_mov_b32 s16, s4403; GFX11-TRUE16-NEXT: s_mov_b32 s17, s5404; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc405; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)406; GFX11-TRUE16-NEXT: s_mov_b32 s20, s6407; GFX11-TRUE16-NEXT: s_mov_b32 s21, s7408; GFX11-TRUE16-NEXT: buffer_load_u16 v2, off, s[16:19], 0 glc dlc409; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)410; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[20:23], 0 glc dlc411; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)412; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0413; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1414; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0.5, v0.l415; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l416; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)417; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v1.l, v0.l, vcc_lo418; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0419; GFX11-TRUE16-NEXT: s_endpgm420;421; GFX11-FAKE16-LABEL: select_f16_imm_b:422; GFX11-FAKE16: ; %bb.0: ; %entry423; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24424; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1425; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000426; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10427; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11428; GFX11-FAKE16-NEXT: s_mov_b32 s18, s10429; GFX11-FAKE16-NEXT: s_mov_b32 s19, s11430; GFX11-FAKE16-NEXT: s_mov_b32 s22, s10431; GFX11-FAKE16-NEXT: s_mov_b32 s23, s11432; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)433; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2434; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3435; GFX11-FAKE16-NEXT: s_mov_b32 s16, s4436; GFX11-FAKE16-NEXT: s_mov_b32 s17, s5437; GFX11-FAKE16-NEXT: s_mov_b32 s20, s6438; GFX11-FAKE16-NEXT: s_mov_b32 s21, s7439; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc440; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)441; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[16:19], 0 glc dlc442; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)443; GFX11-FAKE16-NEXT: buffer_load_u16 v2, off, s[20:23], 0 glc dlc444; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)445; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0446; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1447; GFX11-FAKE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0.5, v0448; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc_lo449; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0450; GFX11-FAKE16-NEXT: s_endpgm451 ptr addrspace(1) %r,452 ptr addrspace(1) %a,453 ptr addrspace(1) %c,454 ptr addrspace(1) %d) {455entry:456 %a.val = load volatile half, ptr addrspace(1) %a457 %c.val = load volatile half, ptr addrspace(1) %c458 %d.val = load volatile half, ptr addrspace(1) %d459 %fcmp = fcmp olt half %a.val, 0xH3800460 %r.val = select i1 %fcmp, half %c.val, half %d.val461 store half %r.val, ptr addrspace(1) %r462 ret void463}464 465define amdgpu_kernel void @select_f16_imm_c(466; SI-LABEL: select_f16_imm_c:467; SI: ; %bb.0: ; %entry468; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9469; SI-NEXT: s_mov_b32 s11, 0xf000470; SI-NEXT: s_mov_b32 s10, -1471; SI-NEXT: s_mov_b32 s14, s10472; SI-NEXT: s_mov_b32 s15, s11473; SI-NEXT: s_waitcnt lgkmcnt(0)474; SI-NEXT: s_mov_b32 s12, s2475; SI-NEXT: s_mov_b32 s13, s3476; SI-NEXT: s_mov_b32 s16, s4477; SI-NEXT: s_mov_b32 s17, s5478; SI-NEXT: s_mov_b32 s18, s10479; SI-NEXT: s_mov_b32 s19, s11480; SI-NEXT: s_mov_b32 s4, s6481; SI-NEXT: s_mov_b32 s5, s7482; SI-NEXT: s_mov_b32 s6, s10483; SI-NEXT: s_mov_b32 s7, s11484; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc485; SI-NEXT: s_waitcnt vmcnt(0)486; SI-NEXT: buffer_load_ushort v1, off, s[16:19], 0 glc487; SI-NEXT: s_waitcnt vmcnt(0)488; SI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc489; SI-NEXT: s_waitcnt vmcnt(0)490; SI-NEXT: s_mov_b32 s8, s0491; SI-NEXT: s_mov_b32 s9, s1492; SI-NEXT: v_cvt_f32_f16_e32 v0, v0493; SI-NEXT: v_cvt_f32_f16_e32 v1, v1494; SI-NEXT: v_cvt_f32_f16_e32 v2, v2495; SI-NEXT: v_cmp_nlt_f32_e32 vcc, v0, v1496; SI-NEXT: v_cndmask_b32_e32 v0, 0.5, v2, vcc497; SI-NEXT: v_cvt_f16_f32_e32 v0, v0498; SI-NEXT: buffer_store_short v0, off, s[8:11], 0499; SI-NEXT: s_endpgm500;501; VI-LABEL: select_f16_imm_c:502; VI: ; %bb.0: ; %entry503; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24504; VI-NEXT: s_mov_b32 s11, 0xf000505; VI-NEXT: s_mov_b32 s10, -1506; VI-NEXT: s_mov_b32 s14, s10507; VI-NEXT: s_mov_b32 s15, s11508; VI-NEXT: s_waitcnt lgkmcnt(0)509; VI-NEXT: s_mov_b32 s12, s2510; VI-NEXT: s_mov_b32 s13, s3511; VI-NEXT: s_mov_b32 s16, s4512; VI-NEXT: s_mov_b32 s17, s5513; VI-NEXT: s_mov_b32 s18, s10514; VI-NEXT: s_mov_b32 s19, s11515; VI-NEXT: s_mov_b32 s4, s6516; VI-NEXT: s_mov_b32 s5, s7517; VI-NEXT: s_mov_b32 s6, s10518; VI-NEXT: s_mov_b32 s7, s11519; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc520; VI-NEXT: s_waitcnt vmcnt(0)521; VI-NEXT: buffer_load_ushort v1, off, s[16:19], 0 glc522; VI-NEXT: s_waitcnt vmcnt(0)523; VI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc524; VI-NEXT: s_waitcnt vmcnt(0)525; VI-NEXT: v_mov_b32_e32 v3, 0x3800526; VI-NEXT: s_mov_b32 s8, s0527; VI-NEXT: s_mov_b32 s9, s1528; VI-NEXT: v_cmp_nlt_f16_e32 vcc, v0, v1529; VI-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc530; VI-NEXT: buffer_store_short v0, off, s[8:11], 0531; VI-NEXT: s_endpgm532;533; GFX11-TRUE16-LABEL: select_f16_imm_c:534; GFX11-TRUE16: ; %bb.0: ; %entry535; GFX11-TRUE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24536; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1537; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000538; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10539; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11540; GFX11-TRUE16-NEXT: s_mov_b32 s18, s10541; GFX11-TRUE16-NEXT: s_mov_b32 s19, s11542; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)543; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2544; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3545; GFX11-TRUE16-NEXT: s_mov_b32 s16, s4546; GFX11-TRUE16-NEXT: s_mov_b32 s17, s5547; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc548; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)549; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[16:19], 0 glc dlc550; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)551; GFX11-TRUE16-NEXT: s_mov_b32 s12, s6552; GFX11-TRUE16-NEXT: s_mov_b32 s13, s7553; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0554; GFX11-TRUE16-NEXT: buffer_load_u16 v2, off, s[12:15], 0 glc dlc555; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)556; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1557; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v0.l, v1.l558; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l559; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)560; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x3800, v0.l, vcc_lo561; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0562; GFX11-TRUE16-NEXT: s_endpgm563;564; GFX11-FAKE16-LABEL: select_f16_imm_c:565; GFX11-FAKE16: ; %bb.0: ; %entry566; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24567; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1568; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000569; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10570; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11571; GFX11-FAKE16-NEXT: s_mov_b32 s18, s10572; GFX11-FAKE16-NEXT: s_mov_b32 s19, s11573; GFX11-FAKE16-NEXT: s_mov_b32 s22, s10574; GFX11-FAKE16-NEXT: s_mov_b32 s23, s11575; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)576; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2577; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3578; GFX11-FAKE16-NEXT: s_mov_b32 s16, s4579; GFX11-FAKE16-NEXT: s_mov_b32 s17, s5580; GFX11-FAKE16-NEXT: s_mov_b32 s20, s6581; GFX11-FAKE16-NEXT: s_mov_b32 s21, s7582; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc583; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)584; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[16:19], 0 glc dlc585; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)586; GFX11-FAKE16-NEXT: buffer_load_u16 v2, off, s[20:23], 0 glc dlc587; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)588; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0589; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1590; GFX11-FAKE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v0, v1591; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x3800, v2, vcc_lo592; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0593; GFX11-FAKE16-NEXT: s_endpgm594 ptr addrspace(1) %r,595 ptr addrspace(1) %a,596 ptr addrspace(1) %b,597 ptr addrspace(1) %d) {598entry:599 %a.val = load volatile half, ptr addrspace(1) %a600 %b.val = load volatile half, ptr addrspace(1) %b601 %d.val = load volatile half, ptr addrspace(1) %d602 %fcmp = fcmp olt half %a.val, %b.val603 %r.val = select i1 %fcmp, half 0xH3800, half %d.val604 store half %r.val, ptr addrspace(1) %r605 ret void606}607 608define amdgpu_kernel void @select_f16_imm_d(609; SI-LABEL: select_f16_imm_d:610; SI: ; %bb.0: ; %entry611; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9612; SI-NEXT: s_mov_b32 s11, 0xf000613; SI-NEXT: s_mov_b32 s10, -1614; SI-NEXT: s_mov_b32 s14, s10615; SI-NEXT: s_mov_b32 s15, s11616; SI-NEXT: s_waitcnt lgkmcnt(0)617; SI-NEXT: s_mov_b32 s12, s2618; SI-NEXT: s_mov_b32 s13, s3619; SI-NEXT: s_mov_b32 s16, s4620; SI-NEXT: s_mov_b32 s17, s5621; SI-NEXT: s_mov_b32 s18, s10622; SI-NEXT: s_mov_b32 s19, s11623; SI-NEXT: s_mov_b32 s4, s6624; SI-NEXT: s_mov_b32 s5, s7625; SI-NEXT: s_mov_b32 s6, s10626; SI-NEXT: s_mov_b32 s7, s11627; SI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc628; SI-NEXT: s_waitcnt vmcnt(0)629; SI-NEXT: buffer_load_ushort v1, off, s[16:19], 0 glc630; SI-NEXT: s_waitcnt vmcnt(0)631; SI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc632; SI-NEXT: s_waitcnt vmcnt(0)633; SI-NEXT: s_mov_b32 s8, s0634; SI-NEXT: s_mov_b32 s9, s1635; SI-NEXT: v_cvt_f32_f16_e32 v0, v0636; SI-NEXT: v_cvt_f32_f16_e32 v1, v1637; SI-NEXT: v_cvt_f32_f16_e32 v2, v2638; SI-NEXT: v_cmp_lt_f32_e32 vcc, v0, v1639; SI-NEXT: v_cndmask_b32_e32 v0, 0.5, v2, vcc640; SI-NEXT: v_cvt_f16_f32_e32 v0, v0641; SI-NEXT: buffer_store_short v0, off, s[8:11], 0642; SI-NEXT: s_endpgm643;644; VI-LABEL: select_f16_imm_d:645; VI: ; %bb.0: ; %entry646; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x24647; VI-NEXT: s_mov_b32 s11, 0xf000648; VI-NEXT: s_mov_b32 s10, -1649; VI-NEXT: s_mov_b32 s14, s10650; VI-NEXT: s_mov_b32 s15, s11651; VI-NEXT: s_waitcnt lgkmcnt(0)652; VI-NEXT: s_mov_b32 s12, s2653; VI-NEXT: s_mov_b32 s13, s3654; VI-NEXT: s_mov_b32 s16, s4655; VI-NEXT: s_mov_b32 s17, s5656; VI-NEXT: s_mov_b32 s18, s10657; VI-NEXT: s_mov_b32 s19, s11658; VI-NEXT: s_mov_b32 s4, s6659; VI-NEXT: s_mov_b32 s5, s7660; VI-NEXT: s_mov_b32 s6, s10661; VI-NEXT: s_mov_b32 s7, s11662; VI-NEXT: buffer_load_ushort v0, off, s[12:15], 0 glc663; VI-NEXT: s_waitcnt vmcnt(0)664; VI-NEXT: buffer_load_ushort v1, off, s[16:19], 0 glc665; VI-NEXT: s_waitcnt vmcnt(0)666; VI-NEXT: buffer_load_ushort v2, off, s[4:7], 0 glc667; VI-NEXT: s_waitcnt vmcnt(0)668; VI-NEXT: v_mov_b32_e32 v3, 0x3800669; VI-NEXT: s_mov_b32 s8, s0670; VI-NEXT: s_mov_b32 s9, s1671; VI-NEXT: v_cmp_lt_f16_e32 vcc, v0, v1672; VI-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc673; VI-NEXT: buffer_store_short v0, off, s[8:11], 0674; VI-NEXT: s_endpgm675;676; GFX11-TRUE16-LABEL: select_f16_imm_d:677; GFX11-TRUE16: ; %bb.0: ; %entry678; GFX11-TRUE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24679; GFX11-TRUE16-NEXT: s_mov_b32 s10, -1680; GFX11-TRUE16-NEXT: s_mov_b32 s11, 0x31016000681; GFX11-TRUE16-NEXT: s_mov_b32 s14, s10682; GFX11-TRUE16-NEXT: s_mov_b32 s15, s11683; GFX11-TRUE16-NEXT: s_mov_b32 s18, s10684; GFX11-TRUE16-NEXT: s_mov_b32 s19, s11685; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)686; GFX11-TRUE16-NEXT: s_mov_b32 s12, s2687; GFX11-TRUE16-NEXT: s_mov_b32 s13, s3688; GFX11-TRUE16-NEXT: s_mov_b32 s16, s4689; GFX11-TRUE16-NEXT: s_mov_b32 s17, s5690; GFX11-TRUE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc691; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)692; GFX11-TRUE16-NEXT: buffer_load_u16 v1, off, s[16:19], 0 glc dlc693; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)694; GFX11-TRUE16-NEXT: s_mov_b32 s12, s6695; GFX11-TRUE16-NEXT: s_mov_b32 s13, s7696; GFX11-TRUE16-NEXT: s_mov_b32 s8, s0697; GFX11-TRUE16-NEXT: buffer_load_u16 v2, off, s[12:15], 0 glc dlc698; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)699; GFX11-TRUE16-NEXT: s_mov_b32 s9, s1700; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0.l, v1.l701; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l702; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)703; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, 0x3800, v0.l, vcc_lo704; GFX11-TRUE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0705; GFX11-TRUE16-NEXT: s_endpgm706;707; GFX11-FAKE16-LABEL: select_f16_imm_d:708; GFX11-FAKE16: ; %bb.0: ; %entry709; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x24710; GFX11-FAKE16-NEXT: s_mov_b32 s10, -1711; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x31016000712; GFX11-FAKE16-NEXT: s_mov_b32 s14, s10713; GFX11-FAKE16-NEXT: s_mov_b32 s15, s11714; GFX11-FAKE16-NEXT: s_mov_b32 s18, s10715; GFX11-FAKE16-NEXT: s_mov_b32 s19, s11716; GFX11-FAKE16-NEXT: s_mov_b32 s22, s10717; GFX11-FAKE16-NEXT: s_mov_b32 s23, s11718; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)719; GFX11-FAKE16-NEXT: s_mov_b32 s12, s2720; GFX11-FAKE16-NEXT: s_mov_b32 s13, s3721; GFX11-FAKE16-NEXT: s_mov_b32 s16, s4722; GFX11-FAKE16-NEXT: s_mov_b32 s17, s5723; GFX11-FAKE16-NEXT: s_mov_b32 s20, s6724; GFX11-FAKE16-NEXT: s_mov_b32 s21, s7725; GFX11-FAKE16-NEXT: buffer_load_u16 v0, off, s[12:15], 0 glc dlc726; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)727; GFX11-FAKE16-NEXT: buffer_load_u16 v1, off, s[16:19], 0 glc dlc728; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)729; GFX11-FAKE16-NEXT: buffer_load_u16 v2, off, s[20:23], 0 glc dlc730; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)731; GFX11-FAKE16-NEXT: s_mov_b32 s8, s0732; GFX11-FAKE16-NEXT: s_mov_b32 s9, s1733; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v0, v1734; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x3800, v2, vcc_lo735; GFX11-FAKE16-NEXT: buffer_store_b16 v0, off, s[8:11], 0736; GFX11-FAKE16-NEXT: s_endpgm737 ptr addrspace(1) %r,738 ptr addrspace(1) %a,739 ptr addrspace(1) %b,740 ptr addrspace(1) %c) {741entry:742 %a.val = load volatile half, ptr addrspace(1) %a743 %b.val = load volatile half, ptr addrspace(1) %b744 %c.val = load volatile half, ptr addrspace(1) %c745 %fcmp = fcmp olt half %a.val, %b.val746 %r.val = select i1 %fcmp, half %c.val, half 0xH3800747 store half %r.val, ptr addrspace(1) %r748 ret void749}750 751define amdgpu_kernel void @select_v2f16(752; SI-LABEL: select_v2f16:753; SI: ; %bb.0: ; %entry754; SI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x9755; SI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x11756; SI-NEXT: s_mov_b32 s3, 0xf000757; SI-NEXT: s_mov_b32 s2, -1758; SI-NEXT: s_mov_b32 s18, s2759; SI-NEXT: s_waitcnt lgkmcnt(0)760; SI-NEXT: s_mov_b32 s16, s10761; SI-NEXT: s_mov_b32 s17, s11762; SI-NEXT: s_mov_b32 s19, s3763; SI-NEXT: s_mov_b32 s20, s12764; SI-NEXT: s_mov_b32 s21, s13765; SI-NEXT: s_mov_b32 s22, s2766; SI-NEXT: s_mov_b32 s23, s3767; SI-NEXT: s_mov_b32 s6, s2768; SI-NEXT: s_mov_b32 s7, s3769; SI-NEXT: buffer_load_dword v1, off, s[16:19], 0770; SI-NEXT: s_mov_b32 s12, s14771; SI-NEXT: s_mov_b32 s13, s15772; SI-NEXT: buffer_load_dword v0, off, s[4:7], 0773; SI-NEXT: s_mov_b32 s14, s2774; SI-NEXT: s_mov_b32 s15, s3775; SI-NEXT: buffer_load_dword v2, off, s[20:23], 0776; SI-NEXT: buffer_load_dword v3, off, s[12:15], 0777; SI-NEXT: s_mov_b32 s0, s8778; SI-NEXT: s_mov_b32 s1, s9779; SI-NEXT: s_waitcnt vmcnt(3)780; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v1781; SI-NEXT: v_cvt_f32_f16_e32 v5, v5782; SI-NEXT: v_cvt_f32_f16_e32 v1, v1783; SI-NEXT: s_waitcnt vmcnt(2)784; SI-NEXT: v_cvt_f32_f16_e32 v4, v0785; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0786; SI-NEXT: s_waitcnt vmcnt(1)787; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v2788; SI-NEXT: s_waitcnt vmcnt(0)789; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v3790; SI-NEXT: v_cvt_f32_f16_e32 v6, v6791; SI-NEXT: v_cvt_f32_f16_e32 v0, v0792; SI-NEXT: v_cvt_f32_f16_e32 v7, v7793; SI-NEXT: v_cvt_f32_f16_e32 v2, v2794; SI-NEXT: v_cvt_f32_f16_e32 v3, v3795; SI-NEXT: v_cmp_lt_f32_e32 vcc, v5, v6796; SI-NEXT: v_cndmask_b32_e32 v0, v0, v7, vcc797; SI-NEXT: v_cmp_lt_f32_e32 vcc, v1, v2798; SI-NEXT: v_cvt_f16_f32_e32 v0, v0799; SI-NEXT: v_cndmask_b32_e32 v1, v4, v3, vcc800; SI-NEXT: v_cvt_f16_f32_e32 v1, v1801; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0802; SI-NEXT: v_or_b32_e32 v0, v1, v0803; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0804; SI-NEXT: s_endpgm805;806; VI-LABEL: select_v2f16:807; VI: ; %bb.0: ; %entry808; VI-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x24809; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x44810; VI-NEXT: s_mov_b32 s7, 0xf000811; VI-NEXT: s_mov_b32 s6, -1812; VI-NEXT: s_mov_b32 s22, s6813; VI-NEXT: s_waitcnt lgkmcnt(0)814; VI-NEXT: s_mov_b32 s20, s12815; VI-NEXT: s_mov_b32 s21, s13816; VI-NEXT: s_mov_b32 s23, s7817; VI-NEXT: s_mov_b32 s16, s10818; VI-NEXT: s_mov_b32 s17, s11819; VI-NEXT: s_mov_b32 s18, s6820; VI-NEXT: s_mov_b32 s19, s7821; VI-NEXT: buffer_load_dword v0, off, s[20:23], 0822; VI-NEXT: buffer_load_dword v1, off, s[16:19], 0823; VI-NEXT: s_mov_b32 s2, s6824; VI-NEXT: s_mov_b32 s3, s7825; VI-NEXT: s_mov_b32 s12, s14826; VI-NEXT: s_mov_b32 s13, s15827; VI-NEXT: s_mov_b32 s14, s6828; VI-NEXT: s_mov_b32 s15, s7829; VI-NEXT: buffer_load_dword v2, off, s[0:3], 0830; VI-NEXT: buffer_load_dword v3, off, s[12:15], 0831; VI-NEXT: s_mov_b32 s4, s8832; VI-NEXT: s_mov_b32 s5, s9833; VI-NEXT: s_waitcnt vmcnt(3)834; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v0835; VI-NEXT: s_waitcnt vmcnt(2)836; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v1837; VI-NEXT: v_cmp_lt_f16_e32 vcc, v5, v4838; VI-NEXT: v_cmp_lt_f16_e64 s[0:1], v1, v0839; VI-NEXT: s_waitcnt vmcnt(0)840; VI-NEXT: v_cndmask_b32_e64 v0, v2, v3, s[0:1]841; VI-NEXT: v_cndmask_b32_sdwa v1, v2, v3, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1842; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD843; VI-NEXT: buffer_store_dword v0, off, s[4:7], 0844; VI-NEXT: s_endpgm845;846; GFX11-TRUE16-LABEL: select_v2f16:847; GFX11-TRUE16: ; %bb.0: ; %entry848; GFX11-TRUE16-NEXT: s_clause 0x1849; GFX11-TRUE16-NEXT: s_load_b256 s[8:15], s[4:5], 0x24850; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x44851; GFX11-TRUE16-NEXT: s_mov_b32 s2, -1852; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x31016000853; GFX11-TRUE16-NEXT: s_mov_b32 s22, s2854; GFX11-TRUE16-NEXT: s_mov_b32 s23, s3855; GFX11-TRUE16-NEXT: s_mov_b32 s18, s2856; GFX11-TRUE16-NEXT: s_mov_b32 s19, s3857; GFX11-TRUE16-NEXT: s_mov_b32 s26, s2858; GFX11-TRUE16-NEXT: s_mov_b32 s27, s3859; GFX11-TRUE16-NEXT: s_mov_b32 s6, s2860; GFX11-TRUE16-NEXT: s_mov_b32 s7, s3861; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)862; GFX11-TRUE16-NEXT: s_mov_b32 s20, s12863; GFX11-TRUE16-NEXT: s_mov_b32 s21, s13864; GFX11-TRUE16-NEXT: s_mov_b32 s16, s10865; GFX11-TRUE16-NEXT: s_mov_b32 s17, s11866; GFX11-TRUE16-NEXT: s_mov_b32 s24, s14867; GFX11-TRUE16-NEXT: s_mov_b32 s25, s15868; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[20:23], 0869; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[16:19], 0870; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[24:27], 0871; GFX11-TRUE16-NEXT: buffer_load_b32 v3, off, s[4:7], 0872; GFX11-TRUE16-NEXT: s_mov_b32 s1, s9873; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)874; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0875; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)876; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1877; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)878; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2879; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)880; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v7, 16, v3881; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l882; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v2.l883; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, v5.l, v4.l884; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v6.l885; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)886; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v3.l, v0.l, vcc_lo887; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v7.l, v1.l, s0888; GFX11-TRUE16-NEXT: s_mov_b32 s0, s8889; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0890; GFX11-TRUE16-NEXT: s_endpgm891;892; GFX11-FAKE16-LABEL: select_v2f16:893; GFX11-FAKE16: ; %bb.0: ; %entry894; GFX11-FAKE16-NEXT: s_clause 0x1895; GFX11-FAKE16-NEXT: s_load_b256 s[8:15], s[4:5], 0x24896; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x44897; GFX11-FAKE16-NEXT: s_mov_b32 s2, -1898; GFX11-FAKE16-NEXT: s_mov_b32 s3, 0x31016000899; GFX11-FAKE16-NEXT: s_mov_b32 s6, s2900; GFX11-FAKE16-NEXT: s_mov_b32 s7, s3901; GFX11-FAKE16-NEXT: s_mov_b32 s22, s2902; GFX11-FAKE16-NEXT: s_mov_b32 s23, s3903; GFX11-FAKE16-NEXT: s_mov_b32 s18, s2904; GFX11-FAKE16-NEXT: s_mov_b32 s19, s3905; GFX11-FAKE16-NEXT: s_mov_b32 s26, s2906; GFX11-FAKE16-NEXT: s_mov_b32 s27, s3907; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)908; GFX11-FAKE16-NEXT: s_mov_b32 s20, s12909; GFX11-FAKE16-NEXT: s_mov_b32 s21, s13910; GFX11-FAKE16-NEXT: s_mov_b32 s16, s10911; GFX11-FAKE16-NEXT: s_mov_b32 s17, s11912; GFX11-FAKE16-NEXT: s_mov_b32 s24, s14913; GFX11-FAKE16-NEXT: s_mov_b32 s25, s15914; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[4:7], 0915; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[20:23], 0916; GFX11-FAKE16-NEXT: buffer_load_b32 v2, off, s[16:19], 0917; GFX11-FAKE16-NEXT: buffer_load_b32 v3, off, s[24:27], 0918; GFX11-FAKE16-NEXT: s_mov_b32 s0, s8919; GFX11-FAKE16-NEXT: s_mov_b32 s1, s9920; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(3)921; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v0922; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2)923; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v1924; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)925; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 16, v2926; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v2, v1927; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)928; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 16, v3929; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc_lo930; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v6, v5931; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)932; GFX11-FAKE16-NEXT: v_dual_cndmask_b32 v1, v4, v7 :: v_dual_and_b32 v0, 0xffff, v0933; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v0934; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[0:3], 0935; GFX11-FAKE16-NEXT: s_endpgm936 ptr addrspace(1) %r,937 ptr addrspace(1) %a,938 ptr addrspace(1) %b,939 ptr addrspace(1) %c,940 ptr addrspace(1) %d) {941entry:942 %a.val = load <2 x half>, ptr addrspace(1) %a943 %b.val = load <2 x half>, ptr addrspace(1) %b944 %c.val = load <2 x half>, ptr addrspace(1) %c945 %d.val = load <2 x half>, ptr addrspace(1) %d946 %fcmp = fcmp olt <2 x half> %a.val, %b.val947 %r.val = select <2 x i1> %fcmp, <2 x half> %c.val, <2 x half> %d.val948 store <2 x half> %r.val, ptr addrspace(1) %r949 ret void950}951 952define amdgpu_kernel void @select_v2f16_imm_a(953; SI-LABEL: select_v2f16_imm_a:954; SI: ; %bb.0: ; %entry955; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x9956; SI-NEXT: s_mov_b32 s11, 0xf000957; SI-NEXT: s_mov_b32 s10, -1958; SI-NEXT: s_mov_b32 s14, s10959; SI-NEXT: s_mov_b32 s15, s11960; SI-NEXT: s_waitcnt lgkmcnt(0)961; SI-NEXT: s_mov_b32 s12, s2962; SI-NEXT: s_mov_b32 s13, s3963; SI-NEXT: s_mov_b32 s16, s4964; SI-NEXT: s_mov_b32 s17, s5965; SI-NEXT: s_mov_b32 s18, s10966; SI-NEXT: s_mov_b32 s19, s11967; SI-NEXT: buffer_load_dword v0, off, s[12:15], 0968; SI-NEXT: s_mov_b32 s4, s6969; SI-NEXT: s_mov_b32 s5, s7970; SI-NEXT: s_mov_b32 s6, s10971; SI-NEXT: s_mov_b32 s7, s11972; SI-NEXT: buffer_load_dword v1, off, s[16:19], 0973; SI-NEXT: buffer_load_dword v2, off, s[4:7], 0974; SI-NEXT: s_mov_b32 s2, 0x3f200000975; SI-NEXT: s_mov_b32 s8, s0976; SI-NEXT: s_mov_b32 s9, s1977; SI-NEXT: s_waitcnt vmcnt(2)978; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v0979; SI-NEXT: v_cvt_f32_f16_e32 v3, v3980; SI-NEXT: v_cvt_f32_f16_e32 v0, v0981; SI-NEXT: s_waitcnt vmcnt(1)982; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v1983; SI-NEXT: s_waitcnt vmcnt(0)984; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v2985; SI-NEXT: v_cvt_f32_f16_e32 v4, v4986; SI-NEXT: v_cvt_f32_f16_e32 v5, v5987; SI-NEXT: v_cvt_f32_f16_e32 v1, v1988; SI-NEXT: v_cvt_f32_f16_e32 v2, v2989; SI-NEXT: v_cmp_lt_f32_e32 vcc, s2, v3990; SI-NEXT: v_cndmask_b32_e32 v3, v5, v4, vcc991; SI-NEXT: v_cmp_lt_f32_e32 vcc, 0.5, v0992; SI-NEXT: v_cvt_f16_f32_e32 v3, v3993; SI-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc994; SI-NEXT: v_cvt_f16_f32_e32 v0, v0995; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v3996; SI-NEXT: v_or_b32_e32 v0, v0, v1997; SI-NEXT: buffer_store_dword v0, off, s[8:11], 0998; SI-NEXT: s_endpgm999;1000; VI-LABEL: select_v2f16_imm_a:1001; VI: ; %bb.0: ; %entry1002; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x241003; VI-NEXT: s_mov_b32 s11, 0xf0001004; VI-NEXT: s_mov_b32 s10, -11005; VI-NEXT: s_mov_b32 s14, s101006; VI-NEXT: s_mov_b32 s15, s111007; VI-NEXT: s_waitcnt lgkmcnt(0)1008; VI-NEXT: s_mov_b32 s12, s21009; VI-NEXT: s_mov_b32 s13, s31010; VI-NEXT: buffer_load_dword v0, off, s[12:15], 01011; VI-NEXT: s_mov_b32 s16, s41012; VI-NEXT: s_mov_b32 s17, s51013; VI-NEXT: s_mov_b32 s18, s101014; VI-NEXT: s_mov_b32 s19, s111015; VI-NEXT: s_mov_b32 s4, s61016; VI-NEXT: s_mov_b32 s5, s71017; VI-NEXT: s_mov_b32 s6, s101018; VI-NEXT: s_mov_b32 s7, s111019; VI-NEXT: buffer_load_dword v1, off, s[16:19], 01020; VI-NEXT: buffer_load_dword v2, off, s[4:7], 01021; VI-NEXT: s_movk_i32 s2, 0x39001022; VI-NEXT: s_mov_b32 s8, s01023; VI-NEXT: s_mov_b32 s9, s11024; VI-NEXT: s_waitcnt vmcnt(2)1025; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v01026; VI-NEXT: v_cmp_lt_f16_e32 vcc, s2, v31027; VI-NEXT: v_cmp_lt_f16_e64 s[0:1], 0.5, v01028; VI-NEXT: s_waitcnt vmcnt(0)1029; VI-NEXT: v_cndmask_b32_e64 v0, v2, v1, s[0:1]1030; VI-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11031; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1032; VI-NEXT: buffer_store_dword v0, off, s[8:11], 01033; VI-NEXT: s_endpgm1034;1035; GFX11-TRUE16-LABEL: select_v2f16_imm_a:1036; GFX11-TRUE16: ; %bb.0: ; %entry1037; GFX11-TRUE16-NEXT: s_load_b256 s[4:11], s[4:5], 0x241038; GFX11-TRUE16-NEXT: s_mov_b32 s2, -11039; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x310160001040; GFX11-TRUE16-NEXT: s_mov_b32 s14, s21041; GFX11-TRUE16-NEXT: s_mov_b32 s15, s31042; GFX11-TRUE16-NEXT: s_mov_b32 s18, s21043; GFX11-TRUE16-NEXT: s_mov_b32 s19, s31044; GFX11-TRUE16-NEXT: s_mov_b32 s22, s21045; GFX11-TRUE16-NEXT: s_mov_b32 s23, s31046; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1047; GFX11-TRUE16-NEXT: s_mov_b32 s12, s61048; GFX11-TRUE16-NEXT: s_mov_b32 s13, s71049; GFX11-TRUE16-NEXT: s_mov_b32 s16, s81050; GFX11-TRUE16-NEXT: s_mov_b32 s17, s91051; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[12:15], 01052; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[16:19], 01053; GFX11-TRUE16-NEXT: s_mov_b32 s20, s101054; GFX11-TRUE16-NEXT: s_mov_b32 s21, s111055; GFX11-TRUE16-NEXT: s_mov_b32 s1, s51056; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[20:23], 01057; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)1058; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01059; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)1060; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v11061; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, 0.5, v0.l1062; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l1063; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1064; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v21065; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, 0x3900, v3.l1066; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v4.l1067; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo1068; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1069; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v1.l, s01070; GFX11-TRUE16-NEXT: s_mov_b32 s0, s41071; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 01072; GFX11-TRUE16-NEXT: s_endpgm1073;1074; GFX11-FAKE16-LABEL: select_v2f16_imm_a:1075; GFX11-FAKE16: ; %bb.0: ; %entry1076; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x241077; GFX11-FAKE16-NEXT: s_mov_b32 s10, -11078; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x310160001079; GFX11-FAKE16-NEXT: s_mov_b32 s14, s101080; GFX11-FAKE16-NEXT: s_mov_b32 s15, s111081; GFX11-FAKE16-NEXT: s_mov_b32 s18, s101082; GFX11-FAKE16-NEXT: s_mov_b32 s19, s111083; GFX11-FAKE16-NEXT: s_mov_b32 s22, s101084; GFX11-FAKE16-NEXT: s_mov_b32 s23, s111085; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1086; GFX11-FAKE16-NEXT: s_mov_b32 s12, s21087; GFX11-FAKE16-NEXT: s_mov_b32 s13, s31088; GFX11-FAKE16-NEXT: s_mov_b32 s16, s41089; GFX11-FAKE16-NEXT: s_mov_b32 s17, s51090; GFX11-FAKE16-NEXT: s_mov_b32 s20, s61091; GFX11-FAKE16-NEXT: s_mov_b32 s21, s71092; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[12:15], 01093; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[16:19], 01094; GFX11-FAKE16-NEXT: buffer_load_b32 v2, off, s[20:23], 01095; GFX11-FAKE16-NEXT: s_mov_b32 s8, s01096; GFX11-FAKE16-NEXT: s_mov_b32 s9, s11097; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2)1098; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01099; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, 0.5, v01100; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)1101; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v11102; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1103; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v21104; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc_lo1105; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, 0x3900, v31106; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1107; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc_lo1108; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v01109; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1110; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v01111; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 01112; GFX11-FAKE16-NEXT: s_endpgm1113 ptr addrspace(1) %r,1114 ptr addrspace(1) %b,1115 ptr addrspace(1) %c,1116 ptr addrspace(1) %d) {1117entry:1118 %b.val = load <2 x half>, ptr addrspace(1) %b1119 %c.val = load <2 x half>, ptr addrspace(1) %c1120 %d.val = load <2 x half>, ptr addrspace(1) %d1121 %fcmp = fcmp olt <2 x half> <half 0xH3800, half 0xH3900>, %b.val1122 %r.val = select <2 x i1> %fcmp, <2 x half> %c.val, <2 x half> %d.val1123 store <2 x half> %r.val, ptr addrspace(1) %r1124 ret void1125}1126 1127define amdgpu_kernel void @select_v2f16_imm_b(1128; SI-LABEL: select_v2f16_imm_b:1129; SI: ; %bb.0: ; %entry1130; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x91131; SI-NEXT: s_mov_b32 s11, 0xf0001132; SI-NEXT: s_mov_b32 s10, -11133; SI-NEXT: s_mov_b32 s14, s101134; SI-NEXT: s_mov_b32 s15, s111135; SI-NEXT: s_waitcnt lgkmcnt(0)1136; SI-NEXT: s_mov_b32 s12, s21137; SI-NEXT: s_mov_b32 s13, s31138; SI-NEXT: s_mov_b32 s16, s41139; SI-NEXT: s_mov_b32 s17, s51140; SI-NEXT: s_mov_b32 s18, s101141; SI-NEXT: s_mov_b32 s19, s111142; SI-NEXT: buffer_load_dword v0, off, s[12:15], 01143; SI-NEXT: s_mov_b32 s4, s61144; SI-NEXT: s_mov_b32 s5, s71145; SI-NEXT: s_mov_b32 s6, s101146; SI-NEXT: s_mov_b32 s7, s111147; SI-NEXT: buffer_load_dword v1, off, s[16:19], 01148; SI-NEXT: buffer_load_dword v2, off, s[4:7], 01149; SI-NEXT: s_mov_b32 s2, 0x3f2000001150; SI-NEXT: s_mov_b32 s8, s01151; SI-NEXT: s_mov_b32 s9, s11152; SI-NEXT: s_waitcnt vmcnt(2)1153; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v01154; SI-NEXT: v_cvt_f32_f16_e32 v3, v31155; SI-NEXT: v_cvt_f32_f16_e32 v0, v01156; SI-NEXT: s_waitcnt vmcnt(1)1157; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v11158; SI-NEXT: s_waitcnt vmcnt(0)1159; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v21160; SI-NEXT: v_cvt_f32_f16_e32 v4, v41161; SI-NEXT: v_cvt_f32_f16_e32 v5, v51162; SI-NEXT: v_cvt_f32_f16_e32 v1, v11163; SI-NEXT: v_cvt_f32_f16_e32 v2, v21164; SI-NEXT: v_cmp_gt_f32_e32 vcc, s2, v31165; SI-NEXT: v_cndmask_b32_e32 v3, v5, v4, vcc1166; SI-NEXT: v_cmp_gt_f32_e32 vcc, 0.5, v01167; SI-NEXT: v_cvt_f16_f32_e32 v3, v31168; SI-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc1169; SI-NEXT: v_cvt_f16_f32_e32 v0, v01170; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v31171; SI-NEXT: v_or_b32_e32 v0, v0, v11172; SI-NEXT: buffer_store_dword v0, off, s[8:11], 01173; SI-NEXT: s_endpgm1174;1175; VI-LABEL: select_v2f16_imm_b:1176; VI: ; %bb.0: ; %entry1177; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x241178; VI-NEXT: s_mov_b32 s11, 0xf0001179; VI-NEXT: s_mov_b32 s10, -11180; VI-NEXT: s_mov_b32 s14, s101181; VI-NEXT: s_mov_b32 s15, s111182; VI-NEXT: s_waitcnt lgkmcnt(0)1183; VI-NEXT: s_mov_b32 s12, s21184; VI-NEXT: s_mov_b32 s13, s31185; VI-NEXT: buffer_load_dword v0, off, s[12:15], 01186; VI-NEXT: s_mov_b32 s16, s41187; VI-NEXT: s_mov_b32 s17, s51188; VI-NEXT: s_mov_b32 s18, s101189; VI-NEXT: s_mov_b32 s19, s111190; VI-NEXT: s_mov_b32 s4, s61191; VI-NEXT: s_mov_b32 s5, s71192; VI-NEXT: s_mov_b32 s6, s101193; VI-NEXT: s_mov_b32 s7, s111194; VI-NEXT: buffer_load_dword v1, off, s[16:19], 01195; VI-NEXT: buffer_load_dword v2, off, s[4:7], 01196; VI-NEXT: s_movk_i32 s2, 0x39001197; VI-NEXT: s_mov_b32 s8, s01198; VI-NEXT: s_mov_b32 s9, s11199; VI-NEXT: s_waitcnt vmcnt(2)1200; VI-NEXT: v_lshrrev_b32_e32 v3, 16, v01201; VI-NEXT: v_cmp_gt_f16_e32 vcc, s2, v31202; VI-NEXT: v_cmp_gt_f16_e64 s[0:1], 0.5, v01203; VI-NEXT: s_waitcnt vmcnt(0)1204; VI-NEXT: v_cndmask_b32_e64 v0, v2, v1, s[0:1]1205; VI-NEXT: v_cndmask_b32_sdwa v1, v2, v1, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_11206; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1207; VI-NEXT: buffer_store_dword v0, off, s[8:11], 01208; VI-NEXT: s_endpgm1209;1210; GFX11-TRUE16-LABEL: select_v2f16_imm_b:1211; GFX11-TRUE16: ; %bb.0: ; %entry1212; GFX11-TRUE16-NEXT: s_load_b256 s[4:11], s[4:5], 0x241213; GFX11-TRUE16-NEXT: s_mov_b32 s2, -11214; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x310160001215; GFX11-TRUE16-NEXT: s_mov_b32 s14, s21216; GFX11-TRUE16-NEXT: s_mov_b32 s15, s31217; GFX11-TRUE16-NEXT: s_mov_b32 s18, s21218; GFX11-TRUE16-NEXT: s_mov_b32 s19, s31219; GFX11-TRUE16-NEXT: s_mov_b32 s22, s21220; GFX11-TRUE16-NEXT: s_mov_b32 s23, s31221; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1222; GFX11-TRUE16-NEXT: s_mov_b32 s12, s61223; GFX11-TRUE16-NEXT: s_mov_b32 s13, s71224; GFX11-TRUE16-NEXT: s_mov_b32 s16, s81225; GFX11-TRUE16-NEXT: s_mov_b32 s17, s91226; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[12:15], 01227; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[16:19], 01228; GFX11-TRUE16-NEXT: s_mov_b32 s20, s101229; GFX11-TRUE16-NEXT: s_mov_b32 s21, s111230; GFX11-TRUE16-NEXT: s_mov_b32 s1, s51231; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[20:23], 01232; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)1233; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01234; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)1235; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v11236; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0.5, v0.l1237; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, v1.l1238; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1239; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 16, v21240; GFX11-TRUE16-NEXT: v_cmp_gt_f16_e64 s0, 0x3900, v3.l1241; GFX11-TRUE16-NEXT: v_mov_b16_e32 v1.l, v4.l1242; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, vcc_lo1243; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1244; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v5.l, v1.l, s01245; GFX11-TRUE16-NEXT: s_mov_b32 s0, s41246; GFX11-TRUE16-NEXT: buffer_store_b32 v0, off, s[0:3], 01247; GFX11-TRUE16-NEXT: s_endpgm1248;1249; GFX11-FAKE16-LABEL: select_v2f16_imm_b:1250; GFX11-FAKE16: ; %bb.0: ; %entry1251; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x241252; GFX11-FAKE16-NEXT: s_mov_b32 s10, -11253; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x310160001254; GFX11-FAKE16-NEXT: s_mov_b32 s14, s101255; GFX11-FAKE16-NEXT: s_mov_b32 s15, s111256; GFX11-FAKE16-NEXT: s_mov_b32 s18, s101257; GFX11-FAKE16-NEXT: s_mov_b32 s19, s111258; GFX11-FAKE16-NEXT: s_mov_b32 s22, s101259; GFX11-FAKE16-NEXT: s_mov_b32 s23, s111260; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1261; GFX11-FAKE16-NEXT: s_mov_b32 s12, s21262; GFX11-FAKE16-NEXT: s_mov_b32 s13, s31263; GFX11-FAKE16-NEXT: s_mov_b32 s16, s41264; GFX11-FAKE16-NEXT: s_mov_b32 s17, s51265; GFX11-FAKE16-NEXT: s_mov_b32 s20, s61266; GFX11-FAKE16-NEXT: s_mov_b32 s21, s71267; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[12:15], 01268; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[16:19], 01269; GFX11-FAKE16-NEXT: buffer_load_b32 v2, off, s[20:23], 01270; GFX11-FAKE16-NEXT: s_mov_b32 s8, s01271; GFX11-FAKE16-NEXT: s_mov_b32 s9, s11272; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2)1273; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01274; GFX11-FAKE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0.5, v01275; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)1276; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v11277; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1278; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v21279; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v1, vcc_lo1280; GFX11-FAKE16-NEXT: v_cmp_gt_f16_e32 vcc_lo, 0x3900, v31281; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)1282; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v4, vcc_lo1283; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v01284; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1285; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v01286; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 01287; GFX11-FAKE16-NEXT: s_endpgm1288 ptr addrspace(1) %r,1289 ptr addrspace(1) %a,1290 ptr addrspace(1) %c,1291 ptr addrspace(1) %d) {1292entry:1293 %a.val = load <2 x half>, ptr addrspace(1) %a1294 %c.val = load <2 x half>, ptr addrspace(1) %c1295 %d.val = load <2 x half>, ptr addrspace(1) %d1296 %fcmp = fcmp olt <2 x half> %a.val, <half 0xH3800, half 0xH3900>1297 %r.val = select <2 x i1> %fcmp, <2 x half> %c.val, <2 x half> %d.val1298 store <2 x half> %r.val, ptr addrspace(1) %r1299 ret void1300}1301 1302define amdgpu_kernel void @select_v2f16_imm_c(1303; SI-LABEL: select_v2f16_imm_c:1304; SI: ; %bb.0: ; %entry1305; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x91306; SI-NEXT: s_mov_b32 s11, 0xf0001307; SI-NEXT: s_mov_b32 s10, -11308; SI-NEXT: s_mov_b32 s14, s101309; SI-NEXT: s_mov_b32 s15, s111310; SI-NEXT: s_waitcnt lgkmcnt(0)1311; SI-NEXT: s_mov_b32 s12, s21312; SI-NEXT: s_mov_b32 s13, s31313; SI-NEXT: s_mov_b32 s16, s41314; SI-NEXT: s_mov_b32 s17, s51315; SI-NEXT: s_mov_b32 s18, s101316; SI-NEXT: s_mov_b32 s19, s111317; SI-NEXT: buffer_load_dword v0, off, s[12:15], 01318; SI-NEXT: s_mov_b32 s4, s61319; SI-NEXT: s_mov_b32 s5, s71320; SI-NEXT: s_mov_b32 s6, s101321; SI-NEXT: s_mov_b32 s7, s111322; SI-NEXT: buffer_load_dword v1, off, s[16:19], 01323; SI-NEXT: buffer_load_dword v2, off, s[4:7], 01324; SI-NEXT: v_mov_b32_e32 v3, 0x3f2000001325; SI-NEXT: s_mov_b32 s8, s01326; SI-NEXT: s_mov_b32 s9, s11327; SI-NEXT: s_waitcnt vmcnt(2)1328; SI-NEXT: v_cvt_f32_f16_e32 v4, v01329; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v01330; SI-NEXT: v_cvt_f32_f16_e32 v0, v01331; SI-NEXT: s_waitcnt vmcnt(1)1332; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v11333; SI-NEXT: s_waitcnt vmcnt(0)1334; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v21335; SI-NEXT: v_cvt_f32_f16_e32 v5, v51336; SI-NEXT: v_cvt_f32_f16_e32 v6, v61337; SI-NEXT: v_cvt_f32_f16_e32 v1, v11338; SI-NEXT: v_cvt_f32_f16_e32 v2, v21339; SI-NEXT: v_cmp_nlt_f32_e32 vcc, v0, v51340; SI-NEXT: v_cndmask_b32_e32 v0, v3, v6, vcc1341; SI-NEXT: v_cmp_nlt_f32_e32 vcc, v4, v11342; SI-NEXT: v_cvt_f16_f32_e32 v0, v01343; SI-NEXT: v_cndmask_b32_e32 v1, 0.5, v2, vcc1344; SI-NEXT: v_cvt_f16_f32_e32 v1, v11345; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v01346; SI-NEXT: v_or_b32_e32 v0, v1, v01347; SI-NEXT: buffer_store_dword v0, off, s[8:11], 01348; SI-NEXT: s_endpgm1349;1350; VI-LABEL: select_v2f16_imm_c:1351; VI: ; %bb.0: ; %entry1352; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x241353; VI-NEXT: s_mov_b32 s11, 0xf0001354; VI-NEXT: s_mov_b32 s10, -11355; VI-NEXT: s_mov_b32 s18, s101356; VI-NEXT: s_mov_b32 s19, s111357; VI-NEXT: s_waitcnt lgkmcnt(0)1358; VI-NEXT: s_mov_b32 s16, s41359; VI-NEXT: s_mov_b32 s17, s51360; VI-NEXT: s_mov_b32 s14, s101361; VI-NEXT: s_mov_b32 s12, s21362; VI-NEXT: s_mov_b32 s13, s31363; VI-NEXT: s_mov_b32 s15, s111364; VI-NEXT: s_mov_b32 s4, s61365; VI-NEXT: s_mov_b32 s5, s71366; VI-NEXT: s_mov_b32 s6, s101367; VI-NEXT: buffer_load_dword v0, off, s[16:19], 01368; VI-NEXT: buffer_load_dword v1, off, s[12:15], 01369; VI-NEXT: s_mov_b32 s7, s111370; VI-NEXT: buffer_load_dword v2, off, s[4:7], 01371; VI-NEXT: v_mov_b32_e32 v3, 0x38001372; VI-NEXT: s_mov_b32 s8, s01373; VI-NEXT: s_mov_b32 s9, s11374; VI-NEXT: s_waitcnt vmcnt(2)1375; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v01376; VI-NEXT: s_waitcnt vmcnt(1)1377; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v11378; VI-NEXT: v_cmp_nlt_f16_e32 vcc, v1, v01379; VI-NEXT: s_waitcnt vmcnt(0)1380; VI-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc1381; VI-NEXT: v_cmp_nlt_f16_e32 vcc, v5, v41382; VI-NEXT: v_mov_b32_e32 v1, 0x39001383; VI-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11384; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1385; VI-NEXT: buffer_store_dword v0, off, s[8:11], 01386; VI-NEXT: s_endpgm1387;1388; GFX11-TRUE16-LABEL: select_v2f16_imm_c:1389; GFX11-TRUE16: ; %bb.0: ; %entry1390; GFX11-TRUE16-NEXT: s_load_b256 s[4:11], s[4:5], 0x241391; GFX11-TRUE16-NEXT: s_mov_b32 s2, -11392; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x310160001393; GFX11-TRUE16-NEXT: s_mov_b32 s18, s21394; GFX11-TRUE16-NEXT: s_mov_b32 s19, s31395; GFX11-TRUE16-NEXT: s_mov_b32 s14, s21396; GFX11-TRUE16-NEXT: s_mov_b32 s15, s31397; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1398; GFX11-TRUE16-NEXT: s_mov_b32 s16, s81399; GFX11-TRUE16-NEXT: s_mov_b32 s17, s91400; GFX11-TRUE16-NEXT: s_mov_b32 s12, s61401; GFX11-TRUE16-NEXT: s_mov_b32 s13, s71402; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[16:19], 01403; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 01404; GFX11-TRUE16-NEXT: s_mov_b32 s12, s101405; GFX11-TRUE16-NEXT: s_mov_b32 s13, s111406; GFX11-TRUE16-NEXT: s_mov_b32 s1, s51407; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], 01408; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)1409; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01410; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)1411; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v11412; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1.l, v0.l1413; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1414; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v21415; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)1416; GFX11-TRUE16-NEXT: v_cmp_nlt_f16_e64 s0, v4.l, v3.l1417; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x3800, v2.l, vcc_lo1418; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x3900, v0.l, s01419; GFX11-TRUE16-NEXT: s_mov_b32 s0, s41420; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[0:3], 01421; GFX11-TRUE16-NEXT: s_endpgm1422;1423; GFX11-FAKE16-LABEL: select_v2f16_imm_c:1424; GFX11-FAKE16: ; %bb.0: ; %entry1425; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x241426; GFX11-FAKE16-NEXT: s_mov_b32 s10, -11427; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x310160001428; GFX11-FAKE16-NEXT: s_mov_b32 s18, s101429; GFX11-FAKE16-NEXT: s_mov_b32 s19, s111430; GFX11-FAKE16-NEXT: s_mov_b32 s14, s101431; GFX11-FAKE16-NEXT: s_mov_b32 s15, s111432; GFX11-FAKE16-NEXT: s_mov_b32 s22, s101433; GFX11-FAKE16-NEXT: s_mov_b32 s23, s111434; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1435; GFX11-FAKE16-NEXT: s_mov_b32 s16, s41436; GFX11-FAKE16-NEXT: s_mov_b32 s17, s51437; GFX11-FAKE16-NEXT: s_mov_b32 s12, s21438; GFX11-FAKE16-NEXT: s_mov_b32 s13, s31439; GFX11-FAKE16-NEXT: s_mov_b32 s20, s61440; GFX11-FAKE16-NEXT: s_mov_b32 s21, s71441; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[16:19], 01442; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 01443; GFX11-FAKE16-NEXT: buffer_load_b32 v2, off, s[20:23], 01444; GFX11-FAKE16-NEXT: s_mov_b32 s8, s01445; GFX11-FAKE16-NEXT: s_mov_b32 s9, s11446; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2)1447; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01448; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)1449; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v11450; GFX11-FAKE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v1, v01451; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1452; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v21453; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x3800, v2, vcc_lo1454; GFX11-FAKE16-NEXT: v_cmp_nlt_f16_e32 vcc_lo, v4, v31455; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)1456; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v01457; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3900, v5, vcc_lo1458; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1459; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v01460; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 01461; GFX11-FAKE16-NEXT: s_endpgm1462 ptr addrspace(1) %r,1463 ptr addrspace(1) %a,1464 ptr addrspace(1) %b,1465 ptr addrspace(1) %d) {1466entry:1467 %a.val = load <2 x half>, ptr addrspace(1) %a1468 %b.val = load <2 x half>, ptr addrspace(1) %b1469 %d.val = load <2 x half>, ptr addrspace(1) %d1470 %fcmp = fcmp olt <2 x half> %a.val, %b.val1471 %r.val = select <2 x i1> %fcmp, <2 x half> <half 0xH3800, half 0xH3900>, <2 x half> %d.val1472 store <2 x half> %r.val, ptr addrspace(1) %r1473 ret void1474}1475 1476define amdgpu_kernel void @select_v2f16_imm_d(1477; SI-LABEL: select_v2f16_imm_d:1478; SI: ; %bb.0: ; %entry1479; SI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x91480; SI-NEXT: s_mov_b32 s11, 0xf0001481; SI-NEXT: s_mov_b32 s10, -11482; SI-NEXT: s_mov_b32 s14, s101483; SI-NEXT: s_mov_b32 s15, s111484; SI-NEXT: s_waitcnt lgkmcnt(0)1485; SI-NEXT: s_mov_b32 s12, s21486; SI-NEXT: s_mov_b32 s13, s31487; SI-NEXT: s_mov_b32 s16, s41488; SI-NEXT: s_mov_b32 s17, s51489; SI-NEXT: s_mov_b32 s18, s101490; SI-NEXT: s_mov_b32 s19, s111491; SI-NEXT: buffer_load_dword v0, off, s[12:15], 01492; SI-NEXT: s_mov_b32 s4, s61493; SI-NEXT: s_mov_b32 s5, s71494; SI-NEXT: s_mov_b32 s6, s101495; SI-NEXT: s_mov_b32 s7, s111496; SI-NEXT: buffer_load_dword v1, off, s[16:19], 01497; SI-NEXT: buffer_load_dword v2, off, s[4:7], 01498; SI-NEXT: v_mov_b32_e32 v3, 0x3f2000001499; SI-NEXT: s_mov_b32 s8, s01500; SI-NEXT: s_mov_b32 s9, s11501; SI-NEXT: s_waitcnt vmcnt(2)1502; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v01503; SI-NEXT: v_cvt_f32_f16_e32 v4, v41504; SI-NEXT: v_cvt_f32_f16_e32 v0, v01505; SI-NEXT: s_waitcnt vmcnt(1)1506; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v11507; SI-NEXT: s_waitcnt vmcnt(0)1508; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v21509; SI-NEXT: v_cvt_f32_f16_e32 v5, v51510; SI-NEXT: v_cvt_f32_f16_e32 v6, v61511; SI-NEXT: v_cvt_f32_f16_e32 v1, v11512; SI-NEXT: v_cvt_f32_f16_e32 v2, v21513; SI-NEXT: v_cmp_lt_f32_e32 vcc, v4, v51514; SI-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc1515; SI-NEXT: v_cmp_lt_f32_e32 vcc, v0, v11516; SI-NEXT: v_cvt_f16_f32_e32 v3, v31517; SI-NEXT: v_cndmask_b32_e32 v0, 0.5, v2, vcc1518; SI-NEXT: v_cvt_f16_f32_e32 v0, v01519; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v31520; SI-NEXT: v_or_b32_e32 v0, v0, v11521; SI-NEXT: buffer_store_dword v0, off, s[8:11], 01522; SI-NEXT: s_endpgm1523;1524; VI-LABEL: select_v2f16_imm_d:1525; VI: ; %bb.0: ; %entry1526; VI-NEXT: s_load_dwordx8 s[0:7], s[4:5], 0x241527; VI-NEXT: s_mov_b32 s11, 0xf0001528; VI-NEXT: s_mov_b32 s10, -11529; VI-NEXT: s_mov_b32 s18, s101530; VI-NEXT: s_mov_b32 s19, s111531; VI-NEXT: s_waitcnt lgkmcnt(0)1532; VI-NEXT: s_mov_b32 s16, s41533; VI-NEXT: s_mov_b32 s17, s51534; VI-NEXT: s_mov_b32 s14, s101535; VI-NEXT: s_mov_b32 s12, s21536; VI-NEXT: s_mov_b32 s13, s31537; VI-NEXT: s_mov_b32 s15, s111538; VI-NEXT: s_mov_b32 s4, s61539; VI-NEXT: s_mov_b32 s5, s71540; VI-NEXT: s_mov_b32 s6, s101541; VI-NEXT: buffer_load_dword v0, off, s[16:19], 01542; VI-NEXT: buffer_load_dword v1, off, s[12:15], 01543; VI-NEXT: s_mov_b32 s7, s111544; VI-NEXT: buffer_load_dword v2, off, s[4:7], 01545; VI-NEXT: v_mov_b32_e32 v3, 0x38001546; VI-NEXT: s_mov_b32 s8, s01547; VI-NEXT: s_mov_b32 s9, s11548; VI-NEXT: s_waitcnt vmcnt(2)1549; VI-NEXT: v_lshrrev_b32_e32 v4, 16, v01550; VI-NEXT: s_waitcnt vmcnt(1)1551; VI-NEXT: v_lshrrev_b32_e32 v5, 16, v11552; VI-NEXT: v_cmp_lt_f16_e32 vcc, v1, v01553; VI-NEXT: s_waitcnt vmcnt(0)1554; VI-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc1555; VI-NEXT: v_cmp_lt_f16_e32 vcc, v5, v41556; VI-NEXT: v_mov_b32_e32 v1, 0x39001557; VI-NEXT: v_cndmask_b32_sdwa v1, v1, v2, vcc dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_11558; VI-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1559; VI-NEXT: buffer_store_dword v0, off, s[8:11], 01560; VI-NEXT: s_endpgm1561;1562; GFX11-TRUE16-LABEL: select_v2f16_imm_d:1563; GFX11-TRUE16: ; %bb.0: ; %entry1564; GFX11-TRUE16-NEXT: s_load_b256 s[4:11], s[4:5], 0x241565; GFX11-TRUE16-NEXT: s_mov_b32 s2, -11566; GFX11-TRUE16-NEXT: s_mov_b32 s3, 0x310160001567; GFX11-TRUE16-NEXT: s_mov_b32 s18, s21568; GFX11-TRUE16-NEXT: s_mov_b32 s19, s31569; GFX11-TRUE16-NEXT: s_mov_b32 s14, s21570; GFX11-TRUE16-NEXT: s_mov_b32 s15, s31571; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1572; GFX11-TRUE16-NEXT: s_mov_b32 s16, s81573; GFX11-TRUE16-NEXT: s_mov_b32 s17, s91574; GFX11-TRUE16-NEXT: s_mov_b32 s12, s61575; GFX11-TRUE16-NEXT: s_mov_b32 s13, s71576; GFX11-TRUE16-NEXT: buffer_load_b32 v0, off, s[16:19], 01577; GFX11-TRUE16-NEXT: buffer_load_b32 v1, off, s[12:15], 01578; GFX11-TRUE16-NEXT: s_mov_b32 s12, s101579; GFX11-TRUE16-NEXT: s_mov_b32 s13, s111580; GFX11-TRUE16-NEXT: s_mov_b32 s1, s51581; GFX11-TRUE16-NEXT: buffer_load_b32 v2, off, s[12:15], 01582; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)1583; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01584; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)1585; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 16, v11586; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1.l, v0.l1587; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1588; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v0, 16, v21589; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)1590; GFX11-TRUE16-NEXT: v_cmp_lt_f16_e64 s0, v4.l, v3.l1591; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, 0x3800, v2.l, vcc_lo1592; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, 0x3900, v0.l, s01593; GFX11-TRUE16-NEXT: s_mov_b32 s0, s41594; GFX11-TRUE16-NEXT: buffer_store_b32 v1, off, s[0:3], 01595; GFX11-TRUE16-NEXT: s_endpgm1596;1597; GFX11-FAKE16-LABEL: select_v2f16_imm_d:1598; GFX11-FAKE16: ; %bb.0: ; %entry1599; GFX11-FAKE16-NEXT: s_load_b256 s[0:7], s[4:5], 0x241600; GFX11-FAKE16-NEXT: s_mov_b32 s10, -11601; GFX11-FAKE16-NEXT: s_mov_b32 s11, 0x310160001602; GFX11-FAKE16-NEXT: s_mov_b32 s18, s101603; GFX11-FAKE16-NEXT: s_mov_b32 s19, s111604; GFX11-FAKE16-NEXT: s_mov_b32 s14, s101605; GFX11-FAKE16-NEXT: s_mov_b32 s15, s111606; GFX11-FAKE16-NEXT: s_mov_b32 s22, s101607; GFX11-FAKE16-NEXT: s_mov_b32 s23, s111608; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1609; GFX11-FAKE16-NEXT: s_mov_b32 s16, s41610; GFX11-FAKE16-NEXT: s_mov_b32 s17, s51611; GFX11-FAKE16-NEXT: s_mov_b32 s12, s21612; GFX11-FAKE16-NEXT: s_mov_b32 s13, s31613; GFX11-FAKE16-NEXT: s_mov_b32 s20, s61614; GFX11-FAKE16-NEXT: s_mov_b32 s21, s71615; GFX11-FAKE16-NEXT: buffer_load_b32 v0, off, s[16:19], 01616; GFX11-FAKE16-NEXT: buffer_load_b32 v1, off, s[12:15], 01617; GFX11-FAKE16-NEXT: buffer_load_b32 v2, off, s[20:23], 01618; GFX11-FAKE16-NEXT: s_mov_b32 s8, s01619; GFX11-FAKE16-NEXT: s_mov_b32 s9, s11620; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2)1621; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v3, 16, v01622; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)1623; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v4, 16, v11624; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v1, v01625; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1626; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 16, v21627; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, 0x3800, v2, vcc_lo1628; GFX11-FAKE16-NEXT: v_cmp_lt_f16_e32 vcc_lo, v4, v31629; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)1630; GFX11-FAKE16-NEXT: v_and_b32_e32 v0, 0xffff, v01631; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, 0x3900, v5, vcc_lo1632; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1633; GFX11-FAKE16-NEXT: v_lshl_or_b32 v0, v1, 16, v01634; GFX11-FAKE16-NEXT: buffer_store_b32 v0, off, s[8:11], 01635; GFX11-FAKE16-NEXT: s_endpgm1636 ptr addrspace(1) %r,1637 ptr addrspace(1) %a,1638 ptr addrspace(1) %b,1639 ptr addrspace(1) %c) {1640entry:1641 %a.val = load <2 x half>, ptr addrspace(1) %a1642 %b.val = load <2 x half>, ptr addrspace(1) %b1643 %c.val = load <2 x half>, ptr addrspace(1) %c1644 %fcmp = fcmp olt <2 x half> %a.val, %b.val1645 %r.val = select <2 x i1> %fcmp, <2 x half> %c.val, <2 x half> <half 0xH3800, half 0xH3900>1646 store <2 x half> %r.val, ptr addrspace(1) %r1647 ret void1648}1649 1650define <4 x half> @v_select_v4f16(<4 x half> %a, <4 x half> %b, i32 %cond) {1651; SI-LABEL: v_select_v4f16:1652; SI: ; %bb.0:1653; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1654; SI-NEXT: v_cvt_f16_f32_e32 v3, v31655; SI-NEXT: v_cvt_f16_f32_e32 v1, v11656; SI-NEXT: v_cvt_f16_f32_e32 v2, v21657; SI-NEXT: v_cvt_f16_f32_e32 v7, v71658; SI-NEXT: v_cvt_f16_f32_e32 v0, v01659; SI-NEXT: v_cvt_f16_f32_e32 v5, v51660; SI-NEXT: v_cvt_f16_f32_e32 v6, v61661; SI-NEXT: v_cvt_f16_f32_e32 v4, v41662; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v31663; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v11664; SI-NEXT: v_or_b32_e32 v2, v2, v31665; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v71666; SI-NEXT: v_or_b32_e32 v0, v0, v11667; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v51668; SI-NEXT: v_or_b32_e32 v3, v6, v31669; SI-NEXT: v_or_b32_e32 v1, v4, v11670; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v81671; SI-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc1672; SI-NEXT: v_cndmask_b32_e32 v3, v3, v2, vcc1673; SI-NEXT: v_cvt_f32_f16_e32 v0, v11674; SI-NEXT: v_cvt_f32_f16_e32 v2, v31675; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11676; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v31677; SI-NEXT: v_cvt_f32_f16_e32 v1, v11678; SI-NEXT: v_cvt_f32_f16_e32 v3, v31679; SI-NEXT: s_setpc_b64 s[30:31]1680;1681; VI-LABEL: v_select_v4f16:1682; VI: ; %bb.0:1683; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1684; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v41685; VI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc1686; VI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc1687; VI-NEXT: s_setpc_b64 s[30:31]1688;1689; GFX11-LABEL: v_select_v4f16:1690; GFX11: ; %bb.0:1691; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1692; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v41693; GFX11-NEXT: v_dual_cndmask_b32 v0, v2, v0 :: v_dual_cndmask_b32 v1, v3, v11694; GFX11-NEXT: s_setpc_b64 s[30:31]1695 %cmp = icmp eq i32 %cond, 01696 %select = select i1 %cmp, <4 x half> %a, <4 x half> %b1697 ret <4 x half> %select1698}1699 1700define <4 x half> @v_vselect_v4f16(<4 x half> %a, <4 x half> %b, <4 x i32> %cond) {1701; SI-LABEL: v_vselect_v4f16:1702; SI: ; %bb.0:1703; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1704; SI-NEXT: v_cvt_f16_f32_e32 v0, v01705; SI-NEXT: v_cvt_f16_f32_e32 v4, v41706; SI-NEXT: v_cvt_f16_f32_e32 v1, v11707; SI-NEXT: v_cvt_f16_f32_e32 v5, v51708; SI-NEXT: v_cvt_f16_f32_e32 v2, v21709; SI-NEXT: v_cvt_f16_f32_e32 v6, v61710; SI-NEXT: v_cvt_f16_f32_e32 v3, v31711; SI-NEXT: v_cvt_f16_f32_e32 v7, v71712; SI-NEXT: v_cvt_f32_f16_e32 v0, v01713; SI-NEXT: v_cvt_f32_f16_e32 v4, v41714; SI-NEXT: v_cvt_f32_f16_e32 v1, v11715; SI-NEXT: v_cvt_f32_f16_e32 v5, v51716; SI-NEXT: v_cvt_f32_f16_e32 v2, v21717; SI-NEXT: v_cvt_f32_f16_e32 v6, v61718; SI-NEXT: v_cvt_f32_f16_e32 v3, v31719; SI-NEXT: v_cvt_f32_f16_e32 v7, v71720; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v81721; SI-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc1722; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v91723; SI-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc1724; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v101725; SI-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc1726; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v111727; SI-NEXT: v_cndmask_b32_e32 v3, v7, v3, vcc1728; SI-NEXT: s_setpc_b64 s[30:31]1729;1730; VI-LABEL: v_vselect_v4f16:1731; VI: ; %bb.0:1732; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1733; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v11734; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v31735; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v71736; VI-NEXT: v_cndmask_b32_e32 v7, v9, v8, vcc1737; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v01738; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v21739; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v51740; VI-NEXT: v_cndmask_b32_e32 v5, v9, v8, vcc1741; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v61742; VI-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc1743; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v41744; VI-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc1745; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v51746; VI-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1747; VI-NEXT: v_lshlrev_b32_e32 v2, 16, v71748; VI-NEXT: v_or_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1749; VI-NEXT: s_setpc_b64 s[30:31]1750;1751; GFX11-TRUE16-LABEL: v_vselect_v4f16:1752; GFX11-TRUE16: ; %bb.0:1753; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1754; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v71755; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v51756; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s1, 0, v41757; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v61758; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v3.h, v1.h, vcc_lo1759; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1760; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v2.h, v0.h, s01761; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v2.l, v0.l, s11762; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)1763; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v3.l, v1.l, s21764; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1765;1766; GFX11-FAKE16-LABEL: v_vselect_v4f16:1767; GFX11-FAKE16: ; %bb.0:1768; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1769; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 16, v11770; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v9, 16, v31771; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v71772; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v10, 16, v01773; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v11, 16, v21774; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)1775; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v9, v8, vcc_lo1776; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v51777; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v11, v10, vcc_lo1778; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v41779; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc_lo1780; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v61781; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)1782; GFX11-FAKE16-NEXT: v_perm_b32 v0, v5, v0, 0x50401001783; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v1, vcc_lo1784; GFX11-FAKE16-NEXT: v_perm_b32 v1, v7, v1, 0x50401001785; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]1786 %cmp = icmp eq <4 x i32> %cond, zeroinitializer1787 %select = select <4 x i1> %cmp, <4 x half> %a, <4 x half> %b1788 ret <4 x half> %select1789}1790 1791define <8 x half> @v_select_v8f16(<8 x half> %a, <8 x half> %b, i32 %cond) {1792; SI-LABEL: v_select_v8f16:1793; SI: ; %bb.0:1794; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1795; SI-NEXT: v_cvt_f16_f32_e32 v7, v71796; SI-NEXT: v_cvt_f16_f32_e32 v5, v51797; SI-NEXT: v_cvt_f16_f32_e32 v3, v31798; SI-NEXT: v_cvt_f16_f32_e32 v1, v11799; SI-NEXT: v_cvt_f16_f32_e32 v6, v61800; SI-NEXT: v_cvt_f16_f32_e32 v15, v151801; SI-NEXT: v_cvt_f16_f32_e32 v4, v41802; SI-NEXT: v_cvt_f16_f32_e32 v13, v131803; SI-NEXT: v_cvt_f16_f32_e32 v2, v21804; SI-NEXT: v_cvt_f16_f32_e32 v11, v111805; SI-NEXT: v_cvt_f16_f32_e32 v0, v01806; SI-NEXT: v_cvt_f16_f32_e32 v9, v91807; SI-NEXT: v_cvt_f16_f32_e32 v14, v141808; SI-NEXT: v_cvt_f16_f32_e32 v12, v121809; SI-NEXT: v_cvt_f16_f32_e32 v10, v101810; SI-NEXT: v_cvt_f16_f32_e32 v8, v81811; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v71812; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v51813; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v31814; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v11815; SI-NEXT: v_or_b32_e32 v6, v6, v71816; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v151817; SI-NEXT: v_or_b32_e32 v4, v4, v51818; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v131819; SI-NEXT: v_or_b32_e32 v2, v2, v31820; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v111821; SI-NEXT: v_or_b32_e32 v0, v0, v11822; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v91823; SI-NEXT: v_or_b32_e32 v7, v14, v71824; SI-NEXT: v_or_b32_e32 v5, v12, v51825; SI-NEXT: v_or_b32_e32 v3, v10, v31826; SI-NEXT: v_or_b32_e32 v1, v8, v11827; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v161828; SI-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc1829; SI-NEXT: v_cndmask_b32_e32 v3, v3, v2, vcc1830; SI-NEXT: v_cndmask_b32_e32 v5, v5, v4, vcc1831; SI-NEXT: v_cndmask_b32_e32 v7, v7, v6, vcc1832; SI-NEXT: v_cvt_f32_f16_e32 v0, v11833; SI-NEXT: v_cvt_f32_f16_e32 v2, v31834; SI-NEXT: v_cvt_f32_f16_e32 v4, v51835; SI-NEXT: v_cvt_f32_f16_e32 v6, v71836; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v11837; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v31838; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v51839; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v71840; SI-NEXT: v_cvt_f32_f16_e32 v1, v11841; SI-NEXT: v_cvt_f32_f16_e32 v3, v31842; SI-NEXT: v_cvt_f32_f16_e32 v5, v51843; SI-NEXT: v_cvt_f32_f16_e32 v7, v71844; SI-NEXT: s_setpc_b64 s[30:31]1845;1846; VI-LABEL: v_select_v8f16:1847; VI: ; %bb.0:1848; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1849; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v81850; VI-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc1851; VI-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc1852; VI-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc1853; VI-NEXT: v_cndmask_b32_e32 v3, v7, v3, vcc1854; VI-NEXT: s_setpc_b64 s[30:31]1855;1856; GFX11-LABEL: v_select_v8f16:1857; GFX11: ; %bb.0:1858; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1859; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v81860; GFX11-NEXT: v_dual_cndmask_b32 v0, v4, v0 :: v_dual_cndmask_b32 v1, v5, v11861; GFX11-NEXT: v_dual_cndmask_b32 v2, v6, v2 :: v_dual_cndmask_b32 v3, v7, v31862; GFX11-NEXT: s_setpc_b64 s[30:31]1863 %cmp = icmp eq i32 %cond, 01864 %select = select i1 %cmp, <8 x half> %a, <8 x half> %b1865 ret <8 x half> %select1866}1867 1868define <8 x half> @v_vselect_v8f16(<8 x half> %a, <8 x half> %b, <8 x i32> %cond) {1869; SI-LABEL: v_vselect_v8f16:1870; SI: ; %bb.0:1871; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1872; SI-NEXT: v_cvt_f16_f32_e32 v0, v01873; SI-NEXT: v_cvt_f16_f32_e32 v8, v81874; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v161875; SI-NEXT: v_cvt_f16_f32_e32 v1, v11876; SI-NEXT: v_cvt_f32_f16_e32 v0, v01877; SI-NEXT: v_cvt_f32_f16_e32 v8, v81878; SI-NEXT: v_cvt_f16_f32_e32 v2, v21879; SI-NEXT: v_cvt_f16_f32_e32 v10, v101880; SI-NEXT: v_cvt_f32_f16_e32 v1, v11881; SI-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc1882; SI-NEXT: v_cvt_f16_f32_e32 v8, v91883; SI-NEXT: v_cvt_f16_f32_e32 v3, v31884; SI-NEXT: v_cvt_f16_f32_e32 v11, v111885; SI-NEXT: v_cvt_f16_f32_e32 v4, v41886; SI-NEXT: v_cvt_f32_f16_e32 v8, v81887; SI-NEXT: v_cvt_f16_f32_e32 v12, v121888; SI-NEXT: v_cvt_f16_f32_e32 v5, v51889; SI-NEXT: v_cvt_f16_f32_e32 v13, v131890; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v171891; SI-NEXT: v_cvt_f16_f32_e32 v6, v61892; SI-NEXT: v_cvt_f16_f32_e32 v9, v141893; SI-NEXT: v_cvt_f32_f16_e32 v2, v21894; SI-NEXT: v_cvt_f32_f16_e32 v10, v101895; SI-NEXT: v_cndmask_b32_e32 v1, v8, v1, vcc1896; SI-NEXT: v_cvt_f16_f32_e32 v7, v71897; SI-NEXT: v_cvt_f16_f32_e32 v8, v151898; SI-NEXT: v_cvt_f32_f16_e32 v3, v31899; SI-NEXT: v_cvt_f32_f16_e32 v11, v111900; SI-NEXT: v_cvt_f32_f16_e32 v4, v41901; SI-NEXT: v_cvt_f32_f16_e32 v12, v121902; SI-NEXT: v_cvt_f32_f16_e32 v5, v51903; SI-NEXT: v_cvt_f32_f16_e32 v13, v131904; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v181905; SI-NEXT: v_cvt_f32_f16_e32 v6, v61906; SI-NEXT: v_cvt_f32_f16_e32 v9, v91907; SI-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc1908; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v191909; SI-NEXT: v_cvt_f32_f16_e32 v7, v71910; SI-NEXT: v_cvt_f32_f16_e32 v8, v81911; SI-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc1912; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v201913; SI-NEXT: v_cndmask_b32_e32 v4, v12, v4, vcc1914; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v211915; SI-NEXT: v_cndmask_b32_e32 v5, v13, v5, vcc1916; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v221917; SI-NEXT: v_cndmask_b32_e32 v6, v9, v6, vcc1918; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v231919; SI-NEXT: v_cndmask_b32_e32 v7, v8, v7, vcc1920; SI-NEXT: s_setpc_b64 s[30:31]1921;1922; VI-LABEL: v_vselect_v8f16:1923; VI: ; %bb.0:1924; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1925; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v31926; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v71927; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v151928; VI-NEXT: v_cndmask_b32_e32 v15, v17, v16, vcc1929; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v21930; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v61931; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v131932; VI-NEXT: v_cndmask_b32_e32 v13, v17, v16, vcc1933; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v11934; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v51935; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v111936; VI-NEXT: v_cndmask_b32_e32 v11, v17, v16, vcc1937; VI-NEXT: v_lshrrev_b32_e32 v16, 16, v01938; VI-NEXT: v_lshrrev_b32_e32 v17, 16, v41939; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v91940; VI-NEXT: v_cndmask_b32_e32 v9, v17, v16, vcc1941; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v141942; VI-NEXT: v_cndmask_b32_e32 v3, v7, v3, vcc1943; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v121944; VI-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc1945; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v101946; VI-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc1947; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v81948; VI-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc1949; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v91950; VI-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1951; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v111952; VI-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1953; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v131954; VI-NEXT: v_or_b32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1955; VI-NEXT: v_lshlrev_b32_e32 v4, 16, v151956; VI-NEXT: v_or_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD1957; VI-NEXT: s_setpc_b64 s[30:31]1958;1959; GFX11-TRUE16-LABEL: v_vselect_v8f16:1960; GFX11-TRUE16: ; %bb.0:1961; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1962; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v81963; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v101964; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s1, 0, v121965; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v151966; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s3, 0, v131967; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s4, 0, v111968; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s5, 0, v91969; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s6, 0, v141970; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v7.h, v3.h, s21971; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v6.h, v2.h, s31972; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v5.h, v1.h, s41973; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v4.h, v0.h, s51974; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v4.l, v0.l, vcc_lo1975; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v5.l, v1.l, s01976; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v6.l, v2.l, s11977; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v7.l, v3.l, s61978; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]1979;1980; GFX11-FAKE16-LABEL: v_vselect_v8f16:1981; GFX11-FAKE16: ; %bb.0:1982; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)1983; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v31984; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v71985; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v151986; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 16, v11987; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 16, v51988; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 16, v01989; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v41990; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v17, v16, vcc_lo1991; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 16, v21992; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 16, v61993; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v131994; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)1995; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v17, v16, vcc_lo1996; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v111997; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v19, v18, vcc_lo1998; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v91999; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v21, v20, vcc_lo2000; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v122001; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v6, v2, vcc_lo2002; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v82003; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)2004; GFX11-FAKE16-NEXT: v_perm_b32 v2, v13, v2, 0x50401002005; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v4, v0, vcc_lo2006; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v102007; GFX11-FAKE16-NEXT: v_perm_b32 v0, v9, v0, 0x50401002008; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v5, v1, vcc_lo2009; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v142010; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)2011; GFX11-FAKE16-NEXT: v_perm_b32 v1, v11, v1, 0x50401002012; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v7, v3, vcc_lo2013; GFX11-FAKE16-NEXT: v_perm_b32 v3, v15, v3, 0x50401002014; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]2015 %cmp = icmp eq <8 x i32> %cond, zeroinitializer2016 %select = select <8 x i1> %cmp, <8 x half> %a, <8 x half> %b2017 ret <8 x half> %select2018}2019 2020define <16 x half> @v_select_v16f16(<16 x half> %a, <16 x half> %b, i32 %cond) {2021; SI-LABEL: v_select_v16f16:2022; SI: ; %bb.0:2023; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2024; SI-NEXT: v_cvt_f16_f32_e32 v13, v132025; SI-NEXT: v_cvt_f16_f32_e32 v15, v152026; SI-NEXT: v_cvt_f16_f32_e32 v12, v122027; SI-NEXT: v_cvt_f16_f32_e32 v14, v142028; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v132029; SI-NEXT: v_cvt_f16_f32_e32 v11, v112030; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v152031; SI-NEXT: v_or_b32_e32 v12, v12, v132032; SI-NEXT: v_cvt_f16_f32_e32 v13, v292033; SI-NEXT: v_cvt_f16_f32_e32 v10, v102034; SI-NEXT: v_or_b32_e32 v14, v14, v152035; SI-NEXT: v_cvt_f16_f32_e32 v15, v282036; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v112037; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v132038; SI-NEXT: v_or_b32_e32 v10, v10, v112039; SI-NEXT: buffer_load_dword v11, off, s[0:3], s322040; SI-NEXT: v_or_b32_e32 v13, v15, v132041; SI-NEXT: v_cvt_f16_f32_e32 v15, v272042; SI-NEXT: v_cvt_f16_f32_e32 v26, v262043; SI-NEXT: v_cvt_f16_f32_e32 v3, v32044; SI-NEXT: v_cvt_f16_f32_e32 v9, v92045; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v152046; SI-NEXT: v_or_b32_e32 v15, v26, v152047; SI-NEXT: buffer_load_dword v26, off, s[0:3], s32 offset:42048; SI-NEXT: v_cvt_f16_f32_e32 v7, v72049; SI-NEXT: v_cvt_f16_f32_e32 v5, v52050; SI-NEXT: v_cvt_f16_f32_e32 v2, v22051; SI-NEXT: v_cvt_f16_f32_e32 v8, v82052; SI-NEXT: v_cvt_f16_f32_e32 v6, v62053; SI-NEXT: v_cvt_f16_f32_e32 v4, v42054; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32055; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v92056; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v72057; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v52058; SI-NEXT: v_or_b32_e32 v2, v2, v32059; SI-NEXT: v_cvt_f16_f32_e32 v1, v12060; SI-NEXT: v_or_b32_e32 v8, v8, v92061; SI-NEXT: v_cvt_f16_f32_e32 v9, v252062; SI-NEXT: v_or_b32_e32 v6, v6, v72063; SI-NEXT: v_cvt_f16_f32_e32 v7, v232064; SI-NEXT: v_or_b32_e32 v4, v4, v52065; SI-NEXT: v_cvt_f16_f32_e32 v5, v212066; SI-NEXT: v_cvt_f16_f32_e32 v19, v192067; SI-NEXT: v_cvt_f16_f32_e32 v0, v02068; SI-NEXT: v_cvt_f16_f32_e32 v17, v172069; SI-NEXT: v_cvt_f16_f32_e32 v24, v242070; SI-NEXT: v_cvt_f16_f32_e32 v22, v222071; SI-NEXT: v_cvt_f16_f32_e32 v20, v202072; SI-NEXT: v_cvt_f16_f32_e32 v18, v182073; SI-NEXT: v_cvt_f16_f32_e32 v16, v162074; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v12075; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v92076; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v72077; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v52078; SI-NEXT: v_or_b32_e32 v0, v0, v12079; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v172080; SI-NEXT: v_or_b32_e32 v9, v24, v92081; SI-NEXT: v_or_b32_e32 v7, v22, v72082; SI-NEXT: v_or_b32_e32 v5, v20, v52083; SI-NEXT: v_or_b32_e32 v1, v16, v12084; SI-NEXT: s_waitcnt vmcnt(1)2085; SI-NEXT: v_cvt_f16_f32_e32 v3, v112086; SI-NEXT: v_cvt_f16_f32_e32 v11, v302087; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32088; SI-NEXT: v_or_b32_e32 v3, v11, v32089; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v192090; SI-NEXT: v_or_b32_e32 v11, v18, v112091; SI-NEXT: s_waitcnt vmcnt(0)2092; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v262093; SI-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc2094; SI-NEXT: v_cndmask_b32_e32 v11, v11, v2, vcc2095; SI-NEXT: v_cndmask_b32_e32 v5, v5, v4, vcc2096; SI-NEXT: v_cndmask_b32_e32 v7, v7, v6, vcc2097; SI-NEXT: v_cndmask_b32_e32 v9, v9, v8, vcc2098; SI-NEXT: v_cndmask_b32_e32 v15, v15, v10, vcc2099; SI-NEXT: v_cndmask_b32_e32 v13, v13, v12, vcc2100; SI-NEXT: v_cndmask_b32_e32 v16, v3, v14, vcc2101; SI-NEXT: v_cvt_f32_f16_e32 v0, v12102; SI-NEXT: v_cvt_f32_f16_e32 v2, v112103; SI-NEXT: v_cvt_f32_f16_e32 v4, v52104; SI-NEXT: v_cvt_f32_f16_e32 v6, v72105; SI-NEXT: v_cvt_f32_f16_e32 v8, v92106; SI-NEXT: v_cvt_f32_f16_e32 v10, v152107; SI-NEXT: v_cvt_f32_f16_e32 v12, v132108; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v12109; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v112110; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v52111; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v72112; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v92113; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v152114; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v132115; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v162116; SI-NEXT: v_cvt_f32_f16_e32 v14, v162117; SI-NEXT: v_cvt_f32_f16_e32 v1, v12118; SI-NEXT: v_cvt_f32_f16_e32 v3, v32119; SI-NEXT: v_cvt_f32_f16_e32 v5, v52120; SI-NEXT: v_cvt_f32_f16_e32 v7, v72121; SI-NEXT: v_cvt_f32_f16_e32 v9, v92122; SI-NEXT: v_cvt_f32_f16_e32 v11, v112123; SI-NEXT: v_cvt_f32_f16_e32 v13, v132124; SI-NEXT: v_cvt_f32_f16_e32 v15, v152125; SI-NEXT: s_setpc_b64 s[30:31]2126;2127; VI-LABEL: v_select_v16f16:2128; VI: ; %bb.0:2129; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2130; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v162131; VI-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc2132; VI-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc2133; VI-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc2134; VI-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc2135; VI-NEXT: v_cndmask_b32_e32 v4, v12, v4, vcc2136; VI-NEXT: v_cndmask_b32_e32 v5, v13, v5, vcc2137; VI-NEXT: v_cndmask_b32_e32 v6, v14, v6, vcc2138; VI-NEXT: v_cndmask_b32_e32 v7, v15, v7, vcc2139; VI-NEXT: s_setpc_b64 s[30:31]2140;2141; GFX11-LABEL: v_select_v16f16:2142; GFX11: ; %bb.0:2143; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2144; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v162145; GFX11-NEXT: v_dual_cndmask_b32 v0, v8, v0 :: v_dual_cndmask_b32 v1, v9, v12146; GFX11-NEXT: v_dual_cndmask_b32 v2, v10, v2 :: v_dual_cndmask_b32 v3, v11, v32147; GFX11-NEXT: v_dual_cndmask_b32 v4, v12, v4 :: v_dual_cndmask_b32 v5, v13, v52148; GFX11-NEXT: v_dual_cndmask_b32 v6, v14, v6 :: v_dual_cndmask_b32 v7, v15, v72149; GFX11-NEXT: s_setpc_b64 s[30:31]2150 %cmp = icmp eq i32 %cond, 02151 %select = select i1 %cmp, <16 x half> %a, <16 x half> %b2152 ret <16 x half> %select2153}2154 2155define <16 x half> @v_vselect_v16f16(<16 x half> %a, <16 x half> %b, <16 x i32> %cond) {2156; SI-LABEL: v_vselect_v16f16:2157; SI: ; %bb.0:2158; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2159; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:122160; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:162161; SI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:202162; SI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:242163; SI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:282164; SI-NEXT: v_cvt_f16_f32_e32 v4, v42165; SI-NEXT: v_cvt_f16_f32_e32 v20, v202166; SI-NEXT: v_cvt_f16_f32_e32 v0, v02167; SI-NEXT: v_cvt_f16_f32_e32 v16, v162168; SI-NEXT: v_cvt_f32_f16_e32 v4, v42169; SI-NEXT: v_cvt_f32_f16_e32 v20, v202170; SI-NEXT: v_cvt_f32_f16_e32 v0, v02171; SI-NEXT: v_cvt_f32_f16_e32 v16, v162172; SI-NEXT: v_cvt_f16_f32_e32 v1, v12173; SI-NEXT: v_cvt_f16_f32_e32 v2, v22174; SI-NEXT: v_cvt_f16_f32_e32 v18, v182175; SI-NEXT: v_cvt_f16_f32_e32 v3, v32176; SI-NEXT: v_cvt_f32_f16_e32 v1, v12177; SI-NEXT: v_cvt_f16_f32_e32 v19, v192178; SI-NEXT: v_cvt_f32_f16_e32 v2, v22179; SI-NEXT: v_cvt_f32_f16_e32 v18, v182180; SI-NEXT: v_cvt_f32_f16_e32 v3, v32181; SI-NEXT: v_cvt_f32_f16_e32 v19, v192182; SI-NEXT: v_cvt_f16_f32_e32 v5, v52183; SI-NEXT: v_cvt_f16_f32_e32 v6, v62184; SI-NEXT: v_cvt_f16_f32_e32 v7, v72185; SI-NEXT: v_cvt_f16_f32_e32 v8, v82186; SI-NEXT: v_cvt_f32_f16_e32 v5, v52187; SI-NEXT: v_cvt_f32_f16_e32 v6, v62188; SI-NEXT: v_cvt_f32_f16_e32 v7, v72189; SI-NEXT: v_cvt_f16_f32_e32 v24, v242190; SI-NEXT: v_cvt_f32_f16_e32 v8, v82191; SI-NEXT: v_cvt_f16_f32_e32 v9, v92192; SI-NEXT: v_cvt_f16_f32_e32 v25, v252193; SI-NEXT: v_cvt_f32_f16_e32 v24, v242194; SI-NEXT: v_cvt_f16_f32_e32 v10, v102195; SI-NEXT: v_cvt_f32_f16_e32 v9, v92196; SI-NEXT: v_cvt_f16_f32_e32 v11, v112197; SI-NEXT: v_cvt_f16_f32_e32 v12, v122198; SI-NEXT: v_cvt_f32_f16_e32 v10, v102199; SI-NEXT: v_cvt_f16_f32_e32 v13, v132200; SI-NEXT: v_cvt_f32_f16_e32 v11, v112201; SI-NEXT: v_cvt_f32_f16_e32 v12, v122202; SI-NEXT: v_cvt_f16_f32_e32 v14, v142203; SI-NEXT: v_cvt_f32_f16_e32 v13, v132204; SI-NEXT: v_cvt_f16_f32_e32 v15, v152205; SI-NEXT: v_cvt_f32_f16_e32 v14, v142206; SI-NEXT: v_cvt_f32_f16_e32 v15, v152207; SI-NEXT: s_waitcnt vmcnt(3)2208; SI-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v322209; SI-NEXT: s_waitcnt vmcnt(2)2210; SI-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v332211; SI-NEXT: v_cndmask_b32_e64 v4, v20, v4, s[6:7]2212; SI-NEXT: buffer_load_dword v20, off, s[0:3], s32 offset:442213; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312214; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:42215; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:82216; SI-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc2217; SI-NEXT: v_cndmask_b32_e64 v3, v19, v3, s[4:5]2218; SI-NEXT: v_cvt_f16_f32_e32 v19, v212219; SI-NEXT: v_cvt_f16_f32_e32 v21, v222220; SI-NEXT: s_waitcnt vmcnt(4)2221; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v342222; SI-NEXT: buffer_load_dword v18, off, s[0:3], s32 offset:402223; SI-NEXT: v_cvt_f32_f16_e32 v19, v192224; SI-NEXT: v_cndmask_b32_e32 v5, v19, v5, vcc2225; SI-NEXT: v_cvt_f32_f16_e32 v19, v212226; SI-NEXT: v_cvt_f16_f32_e32 v21, v232227; SI-NEXT: s_waitcnt vmcnt(4)2228; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v352229; SI-NEXT: v_cndmask_b32_e32 v6, v19, v6, vcc2230; SI-NEXT: v_cvt_f32_f16_e32 v19, v212231; SI-NEXT: s_waitcnt vmcnt(2)2232; SI-NEXT: v_cmp_eq_u32_e64 s[8:9], 0, v312233; SI-NEXT: v_cndmask_b32_e64 v0, v16, v0, s[8:9]2234; SI-NEXT: v_cvt_f16_f32_e32 v16, v172235; SI-NEXT: s_waitcnt vmcnt(1)2236; SI-NEXT: v_cmp_eq_u32_e64 s[8:9], 0, v322237; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:362238; SI-NEXT: buffer_load_dword v21, off, s[0:3], s32 offset:482239; SI-NEXT: buffer_load_dword v22, off, s[0:3], s32 offset:522240; SI-NEXT: buffer_load_dword v23, off, s[0:3], s322241; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:602242; SI-NEXT: v_cvt_f32_f16_e32 v16, v162243; SI-NEXT: v_cndmask_b32_e64 v1, v16, v1, s[8:9]2244; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:322245; SI-NEXT: s_waitcnt vmcnt(0)2246; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v162247; SI-NEXT: buffer_load_dword v16, off, s[0:3], s32 offset:562248; SI-NEXT: v_cndmask_b32_e32 v7, v19, v7, vcc2249; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:642250; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v172251; SI-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc2252; SI-NEXT: v_cvt_f32_f16_e32 v17, v252253; SI-NEXT: v_cvt_f16_f32_e32 v24, v262254; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v182255; SI-NEXT: v_cvt_f16_f32_e32 v18, v292256; SI-NEXT: v_cndmask_b32_e32 v9, v17, v9, vcc2257; SI-NEXT: v_cvt_f32_f16_e32 v17, v242258; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v202259; SI-NEXT: v_cvt_f16_f32_e32 v20, v282260; SI-NEXT: v_cndmask_b32_e32 v10, v17, v10, vcc2261; SI-NEXT: v_cvt_f32_f16_e32 v17, v182262; SI-NEXT: v_cvt_f16_f32_e32 v18, v272263; SI-NEXT: v_cvt_f32_f16_e32 v20, v202264; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v212265; SI-NEXT: v_cvt_f32_f16_e32 v18, v182266; SI-NEXT: v_cndmask_b32_e32 v11, v18, v11, vcc2267; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v222268; SI-NEXT: v_cndmask_b32_e32 v12, v20, v12, vcc2269; SI-NEXT: s_waitcnt vmcnt(1)2270; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v162271; SI-NEXT: v_cvt_f16_f32_e32 v16, v302272; SI-NEXT: v_cndmask_b32_e32 v13, v17, v13, vcc2273; SI-NEXT: v_cvt_f16_f32_e32 v17, v232274; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312275; SI-NEXT: v_cvt_f32_f16_e32 v16, v162276; SI-NEXT: v_cvt_f32_f16_e32 v17, v172277; SI-NEXT: v_cndmask_b32_e32 v14, v16, v14, vcc2278; SI-NEXT: s_waitcnt vmcnt(0)2279; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v192280; SI-NEXT: v_cndmask_b32_e32 v15, v17, v15, vcc2281; SI-NEXT: s_setpc_b64 s[30:31]2282;2283; VI-LABEL: v_vselect_v16f16:2284; VI: ; %bb.0:2285; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2286; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v162287; VI-NEXT: buffer_load_dword v16, off, s[0:3], s322288; VI-NEXT: v_cmp_eq_u32_e64 s[8:9], 0, v222289; VI-NEXT: v_cmp_eq_u32_e64 s[10:11], 0, v242290; VI-NEXT: v_lshrrev_b32_e32 v22, 16, v62291; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v142292; VI-NEXT: v_cmp_eq_u32_e64 s[20:21], 0, v292293; VI-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v262294; VI-NEXT: v_cmp_eq_u32_e64 s[14:15], 0, v282295; VI-NEXT: v_cmp_eq_u32_e64 s[18:19], 0, v272296; VI-NEXT: v_lshrrev_b32_e32 v26, 16, v42297; VI-NEXT: v_lshrrev_b32_e32 v27, 16, v122298; VI-NEXT: v_cndmask_b32_e64 v22, v24, v22, s[20:21]2299; VI-NEXT: v_lshrrev_b32_e32 v24, 16, v02300; VI-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc2301; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v252302; VI-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v182303; VI-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v202304; VI-NEXT: v_lshrrev_b32_e32 v18, 16, v52305; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v132306; VI-NEXT: v_cndmask_b32_e64 v6, v14, v6, s[14:15]2307; VI-NEXT: v_lshrrev_b32_e32 v14, 16, v32308; VI-NEXT: v_cndmask_b32_e64 v5, v13, v5, s[12:13]2309; VI-NEXT: v_lshrrev_b32_e32 v13, 16, v112310; VI-NEXT: v_cndmask_b32_e32 v25, v27, v26, vcc2311; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v232312; VI-NEXT: v_cndmask_b32_e64 v4, v12, v4, s[10:11]2313; VI-NEXT: v_lshrrev_b32_e32 v12, 16, v22314; VI-NEXT: v_cndmask_b32_e64 v3, v11, v3, s[8:9]2315; VI-NEXT: v_lshrrev_b32_e32 v11, 16, v102316; VI-NEXT: v_cndmask_b32_e32 v13, v13, v14, vcc2317; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v212318; VI-NEXT: v_cndmask_b32_e64 v2, v10, v2, s[6:7]2319; VI-NEXT: v_lshrrev_b32_e32 v10, 16, v12320; VI-NEXT: v_cndmask_b32_e64 v1, v9, v1, s[4:5]2321; VI-NEXT: v_lshrrev_b32_e32 v9, 16, v92322; VI-NEXT: v_cndmask_b32_e32 v11, v11, v12, vcc2323; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v192324; VI-NEXT: v_cndmask_b32_e32 v9, v9, v10, vcc2325; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v92326; VI-NEXT: v_lshrrev_b32_e32 v8, 16, v82327; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v172328; VI-NEXT: v_or_b32_sdwa v1, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2329; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v112330; VI-NEXT: v_cmp_eq_u32_e64 s[16:17], 0, v302331; VI-NEXT: v_cndmask_b32_e32 v8, v8, v24, vcc2332; VI-NEXT: v_or_b32_sdwa v2, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2333; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v132334; VI-NEXT: v_cndmask_b32_e64 v18, v20, v18, s[18:19]2335; VI-NEXT: v_lshrrev_b32_e32 v20, 16, v72336; VI-NEXT: v_cndmask_b32_e64 v7, v15, v7, s[16:17]2337; VI-NEXT: v_lshrrev_b32_e32 v15, 16, v152338; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v82339; VI-NEXT: v_or_b32_sdwa v3, v3, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2340; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v252341; VI-NEXT: v_or_b32_sdwa v0, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2342; VI-NEXT: v_or_b32_sdwa v4, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2343; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v182344; VI-NEXT: v_or_b32_sdwa v5, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2345; VI-NEXT: v_lshlrev_b32_e32 v9, 16, v222346; VI-NEXT: v_or_b32_sdwa v6, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2347; VI-NEXT: s_waitcnt vmcnt(0)2348; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v162349; VI-NEXT: v_cndmask_b32_e32 v8, v15, v20, vcc2350; VI-NEXT: v_lshlrev_b32_e32 v8, 16, v82351; VI-NEXT: v_or_b32_sdwa v7, v7, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD2352; VI-NEXT: s_setpc_b64 s[30:31]2353;2354; GFX11-TRUE16-LABEL: v_vselect_v16f16:2355; GFX11-TRUE16: ; %bb.0:2356; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2357; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s322358; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s3, 0, v242359; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v162360; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v182361; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s1, 0, v202362; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v222363; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s4, 0, v262364; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s5, 0, v282365; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s6, 0, v302366; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s7, 0, v172367; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s8, 0, v192368; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s9, 0, v292369; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s10, 0, v272370; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s11, 0, v252371; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s12, 0, v232372; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s13, 0, v212373; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v12.l, v4.l, s32374; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v14.h, v6.h, s92375; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v13.h, v5.h, s102376; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, v12.h, v4.h, s112377; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v11.h, v3.h, s122378; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v10.h, v2.h, s132379; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v9.h, v1.h, s82380; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v8.h, v0.h, s72381; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v15.l, v7.l, s62382; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v14.l, v6.l, s52383; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v13.l, v5.l, s42384; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v8.l, v0.l, vcc_lo2385; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v9.l, v1.l, s02386; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v10.l, v2.l, s12387; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v11.l, v3.l, s22388; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)2389; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s3, 0, v312390; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)2391; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v15.h, v7.h, s32392; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]2393;2394; GFX11-FAKE16-LABEL: v_vselect_v16f16:2395; GFX11-FAKE16: ; %bb.0:2396; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2397; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s322398; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v302399; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v72400; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v62401; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v52402; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v42403; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v15, v7, vcc_lo2404; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v282405; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v32406; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v22407; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v12408; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v142409; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v14, v6, vcc_lo2410; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v262411; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 16, v02412; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v132413; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 16, v82414; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v122415; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v13, v5, vcc_lo2416; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v242417; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v92418; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v102419; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v112420; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v152421; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v12, v4, vcc_lo2422; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v222423; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v11, v3, vcc_lo2424; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v202425; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v10, v2, vcc_lo2426; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v182427; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v9, v1, vcc_lo2428; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v162429; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v8, v0, vcc_lo2430; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v292431; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v35, v34, vcc_lo2432; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v272433; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v37, v36, vcc_lo2434; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v252435; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)2436; GFX11-FAKE16-NEXT: v_perm_b32 v6, v8, v6, 0x50401002437; GFX11-FAKE16-NEXT: v_perm_b32 v5, v9, v5, 0x50401002438; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v39, v38, vcc_lo2439; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v192440; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v53, v52, vcc_lo2441; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v172442; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)2443; GFX11-FAKE16-NEXT: v_perm_b32 v4, v10, v4, 0x50401002444; GFX11-FAKE16-NEXT: v_perm_b32 v1, v11, v1, 0x50401002445; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v55, v54, vcc_lo2446; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v212447; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v51, v50, vcc_lo2448; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v232449; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v49, v48, vcc_lo2450; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)2451; GFX11-FAKE16-NEXT: v_perm_b32 v2, v13, v2, 0x50401002452; GFX11-FAKE16-NEXT: v_perm_b32 v3, v14, v3, 0x50401002453; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)2454; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v312455; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v33, v32, vcc_lo2456; GFX11-FAKE16-NEXT: v_perm_b32 v0, v12, v0, 0x50401002457; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)2458; GFX11-FAKE16-NEXT: v_perm_b32 v7, v11, v7, 0x50401002459; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]2460 %cmp = icmp eq <16 x i32> %cond, zeroinitializer2461 %select = select <16 x i1> %cmp, <16 x half> %a, <16 x half> %b2462 ret <16 x half> %select2463}2464 2465define <32 x half> @v_select_v32f16(<32 x half> %a, <32 x half> %b, i32 %cond) {2466; SI-LABEL: v_select_v32f16:2467; SI: ; %bb.0:2468; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2469; SI-NEXT: v_cvt_f16_f32_e32 v21, v212470; SI-NEXT: v_cvt_f16_f32_e32 v20, v202471; SI-NEXT: v_cvt_f16_f32_e32 v13, v132472; SI-NEXT: v_cvt_f16_f32_e32 v11, v112473; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v212474; SI-NEXT: v_or_b32_e32 v20, v20, v212475; SI-NEXT: buffer_load_dword v21, off, s[0:3], s322476; SI-NEXT: v_cvt_f16_f32_e32 v9, v92477; SI-NEXT: v_cvt_f16_f32_e32 v7, v72478; SI-NEXT: v_cvt_f16_f32_e32 v5, v52479; SI-NEXT: v_cvt_f16_f32_e32 v3, v32480; SI-NEXT: v_cvt_f16_f32_e32 v1, v12481; SI-NEXT: v_cvt_f16_f32_e32 v23, v232482; SI-NEXT: v_cvt_f16_f32_e32 v12, v122483; SI-NEXT: v_cvt_f16_f32_e32 v10, v102484; SI-NEXT: v_cvt_f16_f32_e32 v8, v82485; SI-NEXT: v_cvt_f16_f32_e32 v6, v62486; SI-NEXT: v_cvt_f16_f32_e32 v4, v42487; SI-NEXT: v_cvt_f16_f32_e32 v2, v22488; SI-NEXT: v_cvt_f16_f32_e32 v0, v02489; SI-NEXT: v_cvt_f16_f32_e32 v22, v222490; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v132491; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v112492; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v92493; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v72494; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v52495; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32496; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v12497; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v232498; SI-NEXT: v_or_b32_e32 v12, v12, v132499; SI-NEXT: buffer_load_dword v13, off, s[0:3], s32 offset:562500; SI-NEXT: v_or_b32_e32 v10, v10, v112501; SI-NEXT: buffer_load_dword v11, off, s[0:3], s32 offset:482502; SI-NEXT: v_or_b32_e32 v8, v8, v92503; SI-NEXT: buffer_load_dword v9, off, s[0:3], s32 offset:402504; SI-NEXT: v_or_b32_e32 v6, v6, v72505; SI-NEXT: buffer_load_dword v7, off, s[0:3], s32 offset:322506; SI-NEXT: v_or_b32_e32 v4, v4, v52507; SI-NEXT: buffer_load_dword v5, off, s[0:3], s32 offset:242508; SI-NEXT: v_or_b32_e32 v2, v2, v32509; SI-NEXT: buffer_load_dword v3, off, s[0:3], s32 offset:162510; SI-NEXT: v_or_b32_e32 v0, v0, v12511; SI-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:82512; SI-NEXT: v_cvt_f16_f32_e32 v25, v252513; SI-NEXT: v_or_b32_e32 v22, v22, v232514; SI-NEXT: v_cvt_f16_f32_e32 v23, v302515; SI-NEXT: v_cvt_f16_f32_e32 v24, v242516; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v252517; SI-NEXT: v_cvt_f16_f32_e32 v27, v272518; SI-NEXT: v_cvt_f16_f32_e32 v26, v262519; SI-NEXT: v_or_b32_e32 v24, v24, v252520; SI-NEXT: v_cvt_f16_f32_e32 v29, v292521; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v272522; SI-NEXT: v_or_b32_e32 v26, v26, v272523; SI-NEXT: v_cvt_f16_f32_e32 v28, v282524; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v292525; SI-NEXT: v_cvt_f16_f32_e32 v19, v192526; SI-NEXT: v_cvt_f16_f32_e32 v18, v182527; SI-NEXT: v_or_b32_e32 v28, v28, v292528; SI-NEXT: v_cvt_f16_f32_e32 v17, v172529; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v192530; SI-NEXT: v_or_b32_e32 v18, v18, v192531; SI-NEXT: v_cvt_f16_f32_e32 v16, v162532; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v172533; SI-NEXT: v_cvt_f16_f32_e32 v15, v152534; SI-NEXT: v_cvt_f16_f32_e32 v14, v142535; SI-NEXT: v_or_b32_e32 v16, v16, v172536; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:1242537; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v152538; SI-NEXT: v_or_b32_e32 v14, v14, v152539; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1162540; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1082541; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:1002542; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:922543; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:842544; SI-NEXT: buffer_load_dword v19, off, s[0:3], s32 offset:802545; SI-NEXT: buffer_load_dword v17, off, s[0:3], s32 offset:722546; SI-NEXT: buffer_load_dword v15, off, s[0:3], s32 offset:642547; SI-NEXT: s_waitcnt vmcnt(14)2548; SI-NEXT: v_cvt_f16_f32_e32 v21, v212549; SI-NEXT: v_lshlrev_b32_e32 v21, 16, v212550; SI-NEXT: v_or_b32_e32 v21, v23, v212551; SI-NEXT: buffer_load_dword v23, off, s[0:3], s32 offset:1282552; SI-NEXT: v_cvt_f16_f32_e32 v13, v132553; SI-NEXT: v_cvt_f16_f32_e32 v11, v112554; SI-NEXT: v_lshlrev_b32_e32 v13, 16, v132555; SI-NEXT: s_waitcnt vmcnt(14)2556; SI-NEXT: v_cvt_f16_f32_e32 v9, v92557; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v112558; SI-NEXT: s_waitcnt vmcnt(13)2559; SI-NEXT: v_cvt_f16_f32_e32 v7, v72560; SI-NEXT: s_waitcnt vmcnt(12)2561; SI-NEXT: v_cvt_f16_f32_e32 v5, v52562; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v92563; SI-NEXT: s_waitcnt vmcnt(11)2564; SI-NEXT: v_cvt_f16_f32_e32 v3, v32565; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v72566; SI-NEXT: v_lshlrev_b32_e32 v5, 16, v52567; SI-NEXT: s_waitcnt vmcnt(10)2568; SI-NEXT: v_cvt_f16_f32_e32 v1, v12569; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v32570; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v12571; SI-NEXT: s_waitcnt vmcnt(9)2572; SI-NEXT: v_cvt_f16_f32_e32 v25, v252573; SI-NEXT: s_waitcnt vmcnt(8)2574; SI-NEXT: v_cvt_f16_f32_e32 v27, v272575; SI-NEXT: s_waitcnt vmcnt(7)2576; SI-NEXT: v_cvt_f16_f32_e32 v29, v292577; SI-NEXT: s_waitcnt vmcnt(6)2578; SI-NEXT: v_cvt_f16_f32_e32 v30, v302579; SI-NEXT: s_waitcnt vmcnt(5)2580; SI-NEXT: v_cvt_f16_f32_e32 v31, v312581; SI-NEXT: s_waitcnt vmcnt(4)2582; SI-NEXT: v_cvt_f16_f32_e32 v32, v322583; SI-NEXT: s_waitcnt vmcnt(0)2584; SI-NEXT: v_cvt_f16_f32_e32 v23, v232585; SI-NEXT: v_lshlrev_b32_e32 v23, 16, v232586; SI-NEXT: v_or_b32_e32 v23, v25, v232587; SI-NEXT: buffer_load_dword v25, off, s[0:3], s32 offset:1202588; SI-NEXT: s_waitcnt vmcnt(0)2589; SI-NEXT: v_cvt_f16_f32_e32 v25, v252590; SI-NEXT: v_lshlrev_b32_e32 v25, 16, v252591; SI-NEXT: v_or_b32_e32 v25, v27, v252592; SI-NEXT: buffer_load_dword v27, off, s[0:3], s32 offset:1122593; SI-NEXT: s_waitcnt vmcnt(0)2594; SI-NEXT: v_cvt_f16_f32_e32 v27, v272595; SI-NEXT: v_lshlrev_b32_e32 v27, 16, v272596; SI-NEXT: v_or_b32_e32 v27, v29, v272597; SI-NEXT: buffer_load_dword v29, off, s[0:3], s32 offset:1042598; SI-NEXT: s_waitcnt vmcnt(0)2599; SI-NEXT: v_cvt_f16_f32_e32 v29, v292600; SI-NEXT: v_lshlrev_b32_e32 v29, 16, v292601; SI-NEXT: v_or_b32_e32 v29, v30, v292602; SI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:962603; SI-NEXT: s_waitcnt vmcnt(0)2604; SI-NEXT: v_cvt_f16_f32_e32 v30, v302605; SI-NEXT: v_lshlrev_b32_e32 v30, 16, v302606; SI-NEXT: v_or_b32_e32 v30, v31, v302607; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:882608; SI-NEXT: s_waitcnt vmcnt(0)2609; SI-NEXT: v_cvt_f16_f32_e32 v31, v312610; SI-NEXT: v_lshlrev_b32_e32 v31, 16, v312611; SI-NEXT: v_or_b32_e32 v31, v32, v312612; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:762613; SI-NEXT: v_cvt_f16_f32_e32 v19, v192614; SI-NEXT: v_lshlrev_b32_e32 v19, 16, v192615; SI-NEXT: s_waitcnt vmcnt(0)2616; SI-NEXT: v_cvt_f16_f32_e32 v32, v322617; SI-NEXT: v_or_b32_e32 v19, v32, v192618; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:682619; SI-NEXT: v_cvt_f16_f32_e32 v17, v172620; SI-NEXT: v_lshlrev_b32_e32 v17, 16, v172621; SI-NEXT: s_waitcnt vmcnt(0)2622; SI-NEXT: v_cvt_f16_f32_e32 v32, v322623; SI-NEXT: v_or_b32_e32 v17, v32, v172624; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:602625; SI-NEXT: v_cvt_f16_f32_e32 v15, v152626; SI-NEXT: v_lshlrev_b32_e32 v15, 16, v152627; SI-NEXT: s_waitcnt vmcnt(0)2628; SI-NEXT: v_cvt_f16_f32_e32 v32, v322629; SI-NEXT: v_or_b32_e32 v15, v32, v152630; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:522631; SI-NEXT: s_waitcnt vmcnt(0)2632; SI-NEXT: v_cvt_f16_f32_e32 v32, v322633; SI-NEXT: v_or_b32_e32 v13, v32, v132634; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:442635; SI-NEXT: s_waitcnt vmcnt(0)2636; SI-NEXT: v_cvt_f16_f32_e32 v32, v322637; SI-NEXT: v_or_b32_e32 v11, v32, v112638; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:362639; SI-NEXT: s_waitcnt vmcnt(0)2640; SI-NEXT: v_cvt_f16_f32_e32 v32, v322641; SI-NEXT: v_or_b32_e32 v9, v32, v92642; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:282643; SI-NEXT: s_waitcnt vmcnt(0)2644; SI-NEXT: v_cvt_f16_f32_e32 v32, v322645; SI-NEXT: v_or_b32_e32 v7, v32, v72646; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:202647; SI-NEXT: s_waitcnt vmcnt(0)2648; SI-NEXT: v_cvt_f16_f32_e32 v32, v322649; SI-NEXT: v_or_b32_e32 v5, v32, v52650; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:122651; SI-NEXT: s_waitcnt vmcnt(0)2652; SI-NEXT: v_cvt_f16_f32_e32 v32, v322653; SI-NEXT: v_or_b32_e32 v3, v32, v32654; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:42655; SI-NEXT: s_waitcnt vmcnt(0)2656; SI-NEXT: v_cvt_f16_f32_e32 v32, v322657; SI-NEXT: v_or_b32_e32 v1, v32, v12658; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1322659; SI-NEXT: s_waitcnt vmcnt(0)2660; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v322661; SI-NEXT: v_cndmask_b32_e32 v1, v1, v0, vcc2662; SI-NEXT: v_cndmask_b32_e32 v3, v3, v2, vcc2663; SI-NEXT: v_cndmask_b32_e32 v5, v5, v4, vcc2664; SI-NEXT: v_cndmask_b32_e32 v7, v7, v6, vcc2665; SI-NEXT: v_cndmask_b32_e32 v9, v9, v8, vcc2666; SI-NEXT: v_cndmask_b32_e32 v11, v11, v10, vcc2667; SI-NEXT: v_cndmask_b32_e32 v13, v13, v12, vcc2668; SI-NEXT: v_cndmask_b32_e32 v15, v15, v14, vcc2669; SI-NEXT: v_cndmask_b32_e32 v17, v17, v16, vcc2670; SI-NEXT: v_cndmask_b32_e32 v19, v19, v18, vcc2671; SI-NEXT: v_cndmask_b32_e32 v31, v31, v20, vcc2672; SI-NEXT: v_cndmask_b32_e32 v30, v30, v22, vcc2673; SI-NEXT: v_cndmask_b32_e32 v29, v29, v24, vcc2674; SI-NEXT: v_cndmask_b32_e32 v27, v27, v26, vcc2675; SI-NEXT: v_cndmask_b32_e32 v32, v25, v28, vcc2676; SI-NEXT: v_cndmask_b32_e32 v33, v23, v21, vcc2677; SI-NEXT: v_cvt_f32_f16_e32 v0, v12678; SI-NEXT: v_cvt_f32_f16_e32 v2, v32679; SI-NEXT: v_cvt_f32_f16_e32 v4, v52680; SI-NEXT: v_cvt_f32_f16_e32 v6, v72681; SI-NEXT: v_cvt_f32_f16_e32 v8, v92682; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v12683; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v32684; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v52685; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v72686; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v92687; SI-NEXT: v_cvt_f32_f16_e32 v10, v112688; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v112689; SI-NEXT: v_cvt_f32_f16_e32 v12, v132690; SI-NEXT: v_lshrrev_b32_e32 v13, 16, v132691; SI-NEXT: v_cvt_f32_f16_e32 v14, v152692; SI-NEXT: v_lshrrev_b32_e32 v15, 16, v152693; SI-NEXT: v_cvt_f32_f16_e32 v16, v172694; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v172695; SI-NEXT: v_cvt_f32_f16_e32 v18, v192696; SI-NEXT: v_lshrrev_b32_e32 v19, 16, v192697; SI-NEXT: v_cvt_f32_f16_e32 v20, v312698; SI-NEXT: v_lshrrev_b32_e32 v21, 16, v312699; SI-NEXT: v_lshrrev_b32_e32 v23, 16, v302700; SI-NEXT: v_cvt_f32_f16_e32 v24, v292701; SI-NEXT: v_lshrrev_b32_e32 v25, 16, v292702; SI-NEXT: v_cvt_f32_f16_e32 v26, v272703; SI-NEXT: v_lshrrev_b32_e32 v27, 16, v272704; SI-NEXT: v_lshrrev_b32_e32 v29, 16, v322705; SI-NEXT: v_lshrrev_b32_e32 v31, 16, v332706; SI-NEXT: v_cvt_f32_f16_e32 v1, v12707; SI-NEXT: v_cvt_f32_f16_e32 v3, v32708; SI-NEXT: v_cvt_f32_f16_e32 v5, v52709; SI-NEXT: v_cvt_f32_f16_e32 v7, v72710; SI-NEXT: v_cvt_f32_f16_e32 v9, v92711; SI-NEXT: v_cvt_f32_f16_e32 v11, v112712; SI-NEXT: v_cvt_f32_f16_e32 v13, v132713; SI-NEXT: v_cvt_f32_f16_e32 v15, v152714; SI-NEXT: v_cvt_f32_f16_e32 v17, v172715; SI-NEXT: v_cvt_f32_f16_e32 v19, v192716; SI-NEXT: v_cvt_f32_f16_e32 v21, v212717; SI-NEXT: v_cvt_f32_f16_e32 v22, v302718; SI-NEXT: v_cvt_f32_f16_e32 v23, v232719; SI-NEXT: v_cvt_f32_f16_e32 v25, v252720; SI-NEXT: v_cvt_f32_f16_e32 v27, v272721; SI-NEXT: v_cvt_f32_f16_e32 v28, v322722; SI-NEXT: v_cvt_f32_f16_e32 v29, v292723; SI-NEXT: v_cvt_f32_f16_e32 v30, v332724; SI-NEXT: v_cvt_f32_f16_e32 v31, v312725; SI-NEXT: s_setpc_b64 s[30:31]2726;2727; VI-LABEL: v_select_v32f16:2728; VI: ; %bb.0:2729; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2730; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:42731; VI-NEXT: s_waitcnt vmcnt(0)2732; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312733; VI-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc2734; VI-NEXT: buffer_load_dword v16, off, s[0:3], s322735; VI-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc2736; VI-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc2737; VI-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc2738; VI-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc2739; VI-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc2740; VI-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc2741; VI-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc2742; VI-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc2743; VI-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc2744; VI-NEXT: v_cndmask_b32_e32 v10, v26, v10, vcc2745; VI-NEXT: v_cndmask_b32_e32 v11, v27, v11, vcc2746; VI-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc2747; VI-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc2748; VI-NEXT: v_cndmask_b32_e32 v14, v30, v14, vcc2749; VI-NEXT: s_waitcnt vmcnt(0)2750; VI-NEXT: v_cndmask_b32_e32 v15, v16, v15, vcc2751; VI-NEXT: s_setpc_b64 s[30:31]2752;2753; GFX11-LABEL: v_select_v32f16:2754; GFX11: ; %bb.0:2755; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2756; GFX11-NEXT: s_clause 0x12757; GFX11-NEXT: scratch_load_b32 v31, off, s32 offset:42758; GFX11-NEXT: scratch_load_b32 v32, off, s322759; GFX11-NEXT: s_waitcnt vmcnt(1)2760; GFX11-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v312761; GFX11-NEXT: v_dual_cndmask_b32 v0, v16, v0 :: v_dual_cndmask_b32 v1, v17, v12762; GFX11-NEXT: v_dual_cndmask_b32 v2, v18, v2 :: v_dual_cndmask_b32 v3, v19, v32763; GFX11-NEXT: v_dual_cndmask_b32 v4, v20, v4 :: v_dual_cndmask_b32 v5, v21, v52764; GFX11-NEXT: v_dual_cndmask_b32 v6, v22, v6 :: v_dual_cndmask_b32 v7, v23, v72765; GFX11-NEXT: v_dual_cndmask_b32 v8, v24, v8 :: v_dual_cndmask_b32 v9, v25, v92766; GFX11-NEXT: v_dual_cndmask_b32 v10, v26, v10 :: v_dual_cndmask_b32 v11, v27, v112767; GFX11-NEXT: v_dual_cndmask_b32 v12, v28, v12 :: v_dual_cndmask_b32 v13, v29, v132768; GFX11-NEXT: s_waitcnt vmcnt(0)2769; GFX11-NEXT: v_dual_cndmask_b32 v14, v30, v14 :: v_dual_cndmask_b32 v15, v32, v152770; GFX11-NEXT: s_setpc_b64 s[30:31]2771 %cmp = icmp eq i32 %cond, 02772 %select = select i1 %cmp, <32 x half> %a, <32 x half> %b2773 ret <32 x half> %select2774}2775 2776define <32 x half> @v_vselect_v32f16(<32 x half> %a, <32 x half> %b, <32 x i32> %cond) {2777; SI-LABEL: v_vselect_v32f16:2778; SI: ; %bb.0:2779; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)2780; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1322781; SI-NEXT: v_cvt_f16_f32_e32 v0, v02782; SI-NEXT: v_cvt_f16_f32_e32 v1, v12783; SI-NEXT: v_cvt_f16_f32_e32 v2, v22784; SI-NEXT: v_cvt_f16_f32_e32 v3, v32785; SI-NEXT: v_cvt_f32_f16_e32 v0, v02786; SI-NEXT: v_cvt_f32_f16_e32 v1, v12787; SI-NEXT: v_cvt_f32_f16_e32 v2, v22788; SI-NEXT: v_cvt_f32_f16_e32 v3, v32789; SI-NEXT: v_cvt_f16_f32_e32 v4, v42790; SI-NEXT: v_cvt_f16_f32_e32 v5, v52791; SI-NEXT: v_cvt_f16_f32_e32 v6, v62792; SI-NEXT: v_cvt_f16_f32_e32 v7, v72793; SI-NEXT: v_cvt_f32_f16_e32 v4, v42794; SI-NEXT: v_cvt_f32_f16_e32 v5, v52795; SI-NEXT: v_cvt_f32_f16_e32 v6, v62796; SI-NEXT: v_cvt_f32_f16_e32 v7, v72797; SI-NEXT: v_cvt_f16_f32_e32 v8, v82798; SI-NEXT: v_cvt_f16_f32_e32 v9, v92799; SI-NEXT: v_cvt_f16_f32_e32 v10, v102800; SI-NEXT: v_cvt_f16_f32_e32 v11, v112801; SI-NEXT: v_cvt_f32_f16_e32 v8, v82802; SI-NEXT: v_cvt_f32_f16_e32 v9, v92803; SI-NEXT: v_cvt_f32_f16_e32 v10, v102804; SI-NEXT: v_cvt_f32_f16_e32 v11, v112805; SI-NEXT: v_cvt_f16_f32_e32 v12, v122806; SI-NEXT: v_cvt_f16_f32_e32 v13, v132807; SI-NEXT: v_cvt_f16_f32_e32 v14, v142808; SI-NEXT: v_cvt_f16_f32_e32 v15, v152809; SI-NEXT: v_cvt_f32_f16_e32 v12, v122810; SI-NEXT: v_cvt_f32_f16_e32 v13, v132811; SI-NEXT: v_cvt_f32_f16_e32 v14, v142812; SI-NEXT: v_cvt_f32_f16_e32 v15, v152813; SI-NEXT: v_cvt_f16_f32_e32 v16, v162814; SI-NEXT: v_cvt_f16_f32_e32 v17, v172815; SI-NEXT: v_cvt_f16_f32_e32 v18, v182816; SI-NEXT: v_cvt_f16_f32_e32 v19, v192817; SI-NEXT: v_cvt_f32_f16_e32 v16, v162818; SI-NEXT: v_cvt_f32_f16_e32 v17, v172819; SI-NEXT: v_cvt_f32_f16_e32 v18, v182820; SI-NEXT: v_cvt_f32_f16_e32 v19, v192821; SI-NEXT: v_cvt_f16_f32_e32 v20, v202822; SI-NEXT: v_cvt_f16_f32_e32 v21, v212823; SI-NEXT: v_cvt_f16_f32_e32 v22, v222824; SI-NEXT: v_cvt_f16_f32_e32 v23, v232825; SI-NEXT: v_cvt_f32_f16_e32 v20, v202826; SI-NEXT: v_cvt_f32_f16_e32 v21, v212827; SI-NEXT: v_cvt_f32_f16_e32 v22, v222828; SI-NEXT: v_cvt_f32_f16_e32 v23, v232829; SI-NEXT: v_cvt_f16_f32_e32 v24, v242830; SI-NEXT: v_cvt_f16_f32_e32 v25, v252831; SI-NEXT: v_cvt_f16_f32_e32 v26, v262832; SI-NEXT: v_cvt_f16_f32_e32 v27, v272833; SI-NEXT: v_cvt_f32_f16_e32 v24, v242834; SI-NEXT: v_cvt_f32_f16_e32 v25, v252835; SI-NEXT: v_cvt_f32_f16_e32 v26, v262836; SI-NEXT: v_cvt_f32_f16_e32 v27, v272837; SI-NEXT: v_cvt_f16_f32_e32 v28, v282838; SI-NEXT: v_cvt_f16_f32_e32 v29, v292839; SI-NEXT: v_cvt_f16_f32_e32 v30, v302840; SI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:1282841; SI-NEXT: v_cvt_f32_f16_e32 v28, v282842; SI-NEXT: v_cvt_f32_f16_e32 v29, v292843; SI-NEXT: v_cvt_f32_f16_e32 v30, v302844; SI-NEXT: s_waitcnt vmcnt(1)2845; SI-NEXT: v_cmp_eq_u32_e64 s[16:17], 0, v312846; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1362847; SI-NEXT: s_waitcnt vmcnt(1)2848; SI-NEXT: v_cvt_f16_f32_e32 v32, v322849; SI-NEXT: v_cvt_f32_f16_e32 v32, v322850; SI-NEXT: s_waitcnt vmcnt(0)2851; SI-NEXT: v_cmp_eq_u32_e64 s[14:15], 0, v312852; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1402853; SI-NEXT: s_waitcnt vmcnt(0)2854; SI-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v312855; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1442856; SI-NEXT: s_waitcnt vmcnt(0)2857; SI-NEXT: v_cmp_eq_u32_e64 s[10:11], 0, v312858; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1482859; SI-NEXT: s_waitcnt vmcnt(0)2860; SI-NEXT: v_cmp_eq_u32_e64 s[8:9], 0, v312861; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1522862; SI-NEXT: s_waitcnt vmcnt(0)2863; SI-NEXT: v_cmp_eq_u32_e64 s[6:7], 0, v312864; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1562865; SI-NEXT: s_waitcnt vmcnt(0)2866; SI-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v312867; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1602868; SI-NEXT: s_waitcnt vmcnt(0)2869; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312870; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:42871; SI-NEXT: s_waitcnt vmcnt(0)2872; SI-NEXT: v_cvt_f16_f32_e32 v31, v312873; SI-NEXT: v_cvt_f32_f16_e32 v31, v312874; SI-NEXT: v_cndmask_b32_e64 v0, v31, v0, s[16:17]2875; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:82876; SI-NEXT: s_waitcnt vmcnt(0)2877; SI-NEXT: v_cvt_f16_f32_e32 v31, v312878; SI-NEXT: v_cvt_f32_f16_e32 v31, v312879; SI-NEXT: v_cndmask_b32_e64 v1, v31, v1, s[14:15]2880; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:122881; SI-NEXT: s_waitcnt vmcnt(0)2882; SI-NEXT: v_cvt_f16_f32_e32 v31, v312883; SI-NEXT: v_cvt_f32_f16_e32 v31, v312884; SI-NEXT: v_cndmask_b32_e64 v2, v31, v2, s[12:13]2885; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:162886; SI-NEXT: s_waitcnt vmcnt(0)2887; SI-NEXT: v_cvt_f16_f32_e32 v31, v312888; SI-NEXT: v_cvt_f32_f16_e32 v31, v312889; SI-NEXT: v_cndmask_b32_e64 v3, v31, v3, s[10:11]2890; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:202891; SI-NEXT: s_waitcnt vmcnt(0)2892; SI-NEXT: v_cvt_f16_f32_e32 v31, v312893; SI-NEXT: v_cvt_f32_f16_e32 v31, v312894; SI-NEXT: v_cndmask_b32_e64 v4, v31, v4, s[8:9]2895; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:242896; SI-NEXT: s_waitcnt vmcnt(0)2897; SI-NEXT: v_cvt_f16_f32_e32 v31, v312898; SI-NEXT: v_cvt_f32_f16_e32 v31, v312899; SI-NEXT: v_cndmask_b32_e64 v5, v31, v5, s[6:7]2900; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:282901; SI-NEXT: s_waitcnt vmcnt(0)2902; SI-NEXT: v_cvt_f16_f32_e32 v31, v312903; SI-NEXT: v_cvt_f32_f16_e32 v31, v312904; SI-NEXT: v_cndmask_b32_e64 v6, v31, v6, s[4:5]2905; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:322906; SI-NEXT: s_waitcnt vmcnt(0)2907; SI-NEXT: v_cvt_f16_f32_e32 v31, v312908; SI-NEXT: v_cvt_f32_f16_e32 v31, v312909; SI-NEXT: v_cndmask_b32_e32 v7, v31, v7, vcc2910; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1642911; SI-NEXT: s_waitcnt vmcnt(0)2912; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312913; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:362914; SI-NEXT: s_waitcnt vmcnt(0)2915; SI-NEXT: v_cvt_f16_f32_e32 v31, v312916; SI-NEXT: v_cvt_f32_f16_e32 v31, v312917; SI-NEXT: v_cndmask_b32_e32 v8, v31, v8, vcc2918; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1682919; SI-NEXT: s_waitcnt vmcnt(0)2920; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312921; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:402922; SI-NEXT: s_waitcnt vmcnt(0)2923; SI-NEXT: v_cvt_f16_f32_e32 v31, v312924; SI-NEXT: v_cvt_f32_f16_e32 v31, v312925; SI-NEXT: v_cndmask_b32_e32 v9, v31, v9, vcc2926; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1722927; SI-NEXT: s_waitcnt vmcnt(0)2928; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312929; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:442930; SI-NEXT: s_waitcnt vmcnt(0)2931; SI-NEXT: v_cvt_f16_f32_e32 v31, v312932; SI-NEXT: v_cvt_f32_f16_e32 v31, v312933; SI-NEXT: v_cndmask_b32_e32 v10, v31, v10, vcc2934; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1762935; SI-NEXT: s_waitcnt vmcnt(0)2936; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312937; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:482938; SI-NEXT: s_waitcnt vmcnt(0)2939; SI-NEXT: v_cvt_f16_f32_e32 v31, v312940; SI-NEXT: v_cvt_f32_f16_e32 v31, v312941; SI-NEXT: v_cndmask_b32_e32 v11, v31, v11, vcc2942; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1802943; SI-NEXT: s_waitcnt vmcnt(0)2944; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312945; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:522946; SI-NEXT: s_waitcnt vmcnt(0)2947; SI-NEXT: v_cvt_f16_f32_e32 v31, v312948; SI-NEXT: v_cvt_f32_f16_e32 v31, v312949; SI-NEXT: v_cndmask_b32_e32 v12, v31, v12, vcc2950; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1842951; SI-NEXT: s_waitcnt vmcnt(0)2952; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312953; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:562954; SI-NEXT: s_waitcnt vmcnt(0)2955; SI-NEXT: v_cvt_f16_f32_e32 v31, v312956; SI-NEXT: v_cvt_f32_f16_e32 v31, v312957; SI-NEXT: v_cndmask_b32_e32 v13, v31, v13, vcc2958; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1882959; SI-NEXT: s_waitcnt vmcnt(0)2960; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312961; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:602962; SI-NEXT: s_waitcnt vmcnt(0)2963; SI-NEXT: v_cvt_f16_f32_e32 v31, v312964; SI-NEXT: v_cvt_f32_f16_e32 v31, v312965; SI-NEXT: v_cndmask_b32_e32 v14, v31, v14, vcc2966; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1922967; SI-NEXT: s_waitcnt vmcnt(0)2968; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312969; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:642970; SI-NEXT: s_waitcnt vmcnt(0)2971; SI-NEXT: v_cvt_f16_f32_e32 v31, v312972; SI-NEXT: v_cvt_f32_f16_e32 v31, v312973; SI-NEXT: v_cndmask_b32_e32 v15, v31, v15, vcc2974; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1962975; SI-NEXT: s_waitcnt vmcnt(0)2976; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312977; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:682978; SI-NEXT: s_waitcnt vmcnt(0)2979; SI-NEXT: v_cvt_f16_f32_e32 v31, v312980; SI-NEXT: v_cvt_f32_f16_e32 v31, v312981; SI-NEXT: v_cndmask_b32_e32 v16, v31, v16, vcc2982; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2002983; SI-NEXT: s_waitcnt vmcnt(0)2984; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312985; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:722986; SI-NEXT: s_waitcnt vmcnt(0)2987; SI-NEXT: v_cvt_f16_f32_e32 v31, v312988; SI-NEXT: v_cvt_f32_f16_e32 v31, v312989; SI-NEXT: v_cndmask_b32_e32 v17, v31, v17, vcc2990; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2042991; SI-NEXT: s_waitcnt vmcnt(0)2992; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v312993; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:762994; SI-NEXT: s_waitcnt vmcnt(0)2995; SI-NEXT: v_cvt_f16_f32_e32 v31, v312996; SI-NEXT: v_cvt_f32_f16_e32 v31, v312997; SI-NEXT: v_cndmask_b32_e32 v18, v31, v18, vcc2998; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2082999; SI-NEXT: s_waitcnt vmcnt(0)3000; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313001; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:803002; SI-NEXT: s_waitcnt vmcnt(0)3003; SI-NEXT: v_cvt_f16_f32_e32 v31, v313004; SI-NEXT: v_cvt_f32_f16_e32 v31, v313005; SI-NEXT: v_cndmask_b32_e32 v19, v31, v19, vcc3006; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2123007; SI-NEXT: s_waitcnt vmcnt(0)3008; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313009; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:843010; SI-NEXT: s_waitcnt vmcnt(0)3011; SI-NEXT: v_cvt_f16_f32_e32 v31, v313012; SI-NEXT: v_cvt_f32_f16_e32 v31, v313013; SI-NEXT: v_cndmask_b32_e32 v20, v31, v20, vcc3014; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2163015; SI-NEXT: s_waitcnt vmcnt(0)3016; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313017; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:883018; SI-NEXT: s_waitcnt vmcnt(0)3019; SI-NEXT: v_cvt_f16_f32_e32 v31, v313020; SI-NEXT: v_cvt_f32_f16_e32 v31, v313021; SI-NEXT: v_cndmask_b32_e32 v21, v31, v21, vcc3022; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2203023; SI-NEXT: s_waitcnt vmcnt(0)3024; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313025; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:923026; SI-NEXT: s_waitcnt vmcnt(0)3027; SI-NEXT: v_cvt_f16_f32_e32 v31, v313028; SI-NEXT: v_cvt_f32_f16_e32 v31, v313029; SI-NEXT: v_cndmask_b32_e32 v22, v31, v22, vcc3030; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2243031; SI-NEXT: s_waitcnt vmcnt(0)3032; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313033; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:963034; SI-NEXT: s_waitcnt vmcnt(0)3035; SI-NEXT: v_cvt_f16_f32_e32 v31, v313036; SI-NEXT: v_cvt_f32_f16_e32 v31, v313037; SI-NEXT: v_cndmask_b32_e32 v23, v31, v23, vcc3038; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2283039; SI-NEXT: s_waitcnt vmcnt(0)3040; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313041; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1003042; SI-NEXT: s_waitcnt vmcnt(0)3043; SI-NEXT: v_cvt_f16_f32_e32 v31, v313044; SI-NEXT: v_cvt_f32_f16_e32 v31, v313045; SI-NEXT: v_cndmask_b32_e32 v24, v31, v24, vcc3046; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2323047; SI-NEXT: s_waitcnt vmcnt(0)3048; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313049; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1043050; SI-NEXT: s_waitcnt vmcnt(0)3051; SI-NEXT: v_cvt_f16_f32_e32 v31, v313052; SI-NEXT: v_cvt_f32_f16_e32 v31, v313053; SI-NEXT: v_cndmask_b32_e32 v25, v31, v25, vcc3054; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2363055; SI-NEXT: s_waitcnt vmcnt(0)3056; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313057; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1083058; SI-NEXT: s_waitcnt vmcnt(0)3059; SI-NEXT: v_cvt_f16_f32_e32 v31, v313060; SI-NEXT: v_cvt_f32_f16_e32 v31, v313061; SI-NEXT: v_cndmask_b32_e32 v26, v31, v26, vcc3062; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2403063; SI-NEXT: s_waitcnt vmcnt(0)3064; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313065; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1123066; SI-NEXT: s_waitcnt vmcnt(0)3067; SI-NEXT: v_cvt_f16_f32_e32 v31, v313068; SI-NEXT: v_cvt_f32_f16_e32 v31, v313069; SI-NEXT: v_cndmask_b32_e32 v27, v31, v27, vcc3070; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2443071; SI-NEXT: s_waitcnt vmcnt(0)3072; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313073; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1163074; SI-NEXT: s_waitcnt vmcnt(0)3075; SI-NEXT: v_cvt_f16_f32_e32 v31, v313076; SI-NEXT: v_cvt_f32_f16_e32 v31, v313077; SI-NEXT: v_cndmask_b32_e32 v28, v31, v28, vcc3078; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2483079; SI-NEXT: s_waitcnt vmcnt(0)3080; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313081; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1203082; SI-NEXT: s_waitcnt vmcnt(0)3083; SI-NEXT: v_cvt_f16_f32_e32 v31, v313084; SI-NEXT: v_cvt_f32_f16_e32 v31, v313085; SI-NEXT: v_cndmask_b32_e32 v29, v31, v29, vcc3086; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2523087; SI-NEXT: s_waitcnt vmcnt(0)3088; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313089; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:1243090; SI-NEXT: s_waitcnt vmcnt(0)3091; SI-NEXT: v_cvt_f16_f32_e32 v31, v313092; SI-NEXT: v_cvt_f32_f16_e32 v31, v313093; SI-NEXT: v_cndmask_b32_e32 v30, v31, v30, vcc3094; SI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:2563095; SI-NEXT: s_waitcnt vmcnt(0)3096; SI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313097; SI-NEXT: buffer_load_dword v31, off, s[0:3], s323098; SI-NEXT: s_waitcnt vmcnt(0)3099; SI-NEXT: v_cvt_f16_f32_e32 v31, v313100; SI-NEXT: v_cvt_f32_f16_e32 v31, v313101; SI-NEXT: v_cndmask_b32_e32 v31, v32, v31, vcc3102; SI-NEXT: s_setpc_b64 s[30:31]3103;3104; VI-LABEL: v_vselect_v32f16:3105; VI: ; %bb.0:3106; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3107; VI-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:180 ; 4-byte Folded Spill3108; VI-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Spill3109; VI-NEXT: buffer_store_dword v42, off, s[0:3], s32 offset:172 ; 4-byte Folded Spill3110; VI-NEXT: buffer_store_dword v43, off, s[0:3], s32 offset:168 ; 4-byte Folded Spill3111; VI-NEXT: buffer_store_dword v44, off, s[0:3], s32 offset:164 ; 4-byte Folded Spill3112; VI-NEXT: buffer_store_dword v45, off, s[0:3], s32 offset:160 ; 4-byte Folded Spill3113; VI-NEXT: buffer_store_dword v46, off, s[0:3], s32 offset:156 ; 4-byte Folded Spill3114; VI-NEXT: buffer_store_dword v47, off, s[0:3], s32 offset:152 ; 4-byte Folded Spill3115; VI-NEXT: buffer_store_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Spill3116; VI-NEXT: buffer_store_dword v57, off, s[0:3], s32 offset:144 ; 4-byte Folded Spill3117; VI-NEXT: buffer_store_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Spill3118; VI-NEXT: buffer_store_dword v59, off, s[0:3], s32 offset:136 ; 4-byte Folded Spill3119; VI-NEXT: buffer_store_dword v60, off, s[0:3], s32 offset:132 ; 4-byte Folded Spill3120; VI-NEXT: buffer_load_dword v36, off, s[0:3], s32 offset:1203121; VI-NEXT: buffer_load_dword v35, off, s[0:3], s32 offset:1123122; VI-NEXT: buffer_load_dword v34, off, s[0:3], s32 offset:1043123; VI-NEXT: buffer_load_dword v33, off, s[0:3], s32 offset:963124; VI-NEXT: buffer_load_dword v32, off, s[0:3], s32 offset:883125; VI-NEXT: buffer_load_dword v31, off, s[0:3], s32 offset:803126; VI-NEXT: buffer_load_dword v39, off, s[0:3], s32 offset:723127; VI-NEXT: buffer_load_dword v37, off, s[0:3], s323128; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:1283129; VI-NEXT: buffer_load_dword v50, off, s[0:3], s32 offset:643130; VI-NEXT: buffer_load_dword v53, off, s[0:3], s32 offset:563131; VI-NEXT: buffer_load_dword v54, off, s[0:3], s32 offset:483132; VI-NEXT: buffer_load_dword v52, off, s[0:3], s32 offset:403133; VI-NEXT: buffer_load_dword v51, off, s[0:3], s32 offset:323134; VI-NEXT: buffer_load_dword v49, off, s[0:3], s32 offset:243135; VI-NEXT: buffer_load_dword v48, off, s[0:3], s32 offset:163136; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:83137; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:1243138; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:1163139; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v143140; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v303141; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v133142; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v293143; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v123144; VI-NEXT: v_lshrrev_b32_e32 v47, 16, v283145; VI-NEXT: v_lshrrev_b32_e32 v56, 16, v113146; VI-NEXT: v_lshrrev_b32_e32 v57, 16, v273147; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v103148; VI-NEXT: v_lshrrev_b32_e32 v59, 16, v263149; VI-NEXT: v_lshrrev_b32_e32 v60, 16, v93150; VI-NEXT: s_waitcnt vmcnt(14)3151; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v363152; VI-NEXT: v_cndmask_b32_e32 v36, v43, v38, vcc3153; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v353154; VI-NEXT: v_cndmask_b32_e32 v35, v45, v44, vcc3155; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v343156; VI-NEXT: v_cndmask_b32_e32 v34, v47, v46, vcc3157; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v333158; VI-NEXT: v_cndmask_b32_e32 v33, v57, v56, vcc3159; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v323160; VI-NEXT: v_lshrrev_b32_e32 v38, 16, v253161; VI-NEXT: v_cndmask_b32_e32 v32, v59, v58, vcc3162; VI-NEXT: s_waitcnt vmcnt(13)3163; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v313164; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v83165; VI-NEXT: v_lshrrev_b32_e32 v44, 16, v243166; VI-NEXT: v_cndmask_b32_e32 v38, v38, v60, vcc3167; VI-NEXT: s_waitcnt vmcnt(12)3168; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v393169; VI-NEXT: v_lshrrev_b32_e32 v45, 16, v153170; VI-NEXT: v_cndmask_b32_e32 v39, v44, v43, vcc3171; VI-NEXT: s_waitcnt vmcnt(11)3172; VI-NEXT: v_lshrrev_b32_e32 v31, 16, v373173; VI-NEXT: s_waitcnt vmcnt(10)3174; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v553175; VI-NEXT: v_cndmask_b32_e32 v31, v31, v45, vcc3176; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v73177; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v233178; VI-NEXT: s_waitcnt vmcnt(9)3179; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v503180; VI-NEXT: v_cndmask_b32_e32 v50, v43, v55, vcc3181; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v63182; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v223183; VI-NEXT: s_waitcnt vmcnt(8)3184; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v533185; VI-NEXT: v_cndmask_b32_e32 v53, v43, v55, vcc3186; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v53187; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v213188; VI-NEXT: s_waitcnt vmcnt(7)3189; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v543190; VI-NEXT: v_cndmask_b32_e32 v54, v43, v55, vcc3191; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v43192; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v203193; VI-NEXT: s_waitcnt vmcnt(6)3194; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v523195; VI-NEXT: v_cndmask_b32_e32 v52, v43, v55, vcc3196; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v33197; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v193198; VI-NEXT: s_waitcnt vmcnt(5)3199; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v513200; VI-NEXT: v_cndmask_b32_e32 v51, v43, v55, vcc3201; VI-NEXT: v_lshrrev_b32_e32 v55, 16, v23202; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v183203; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:1083204; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:923205; VI-NEXT: s_waitcnt vmcnt(6)3206; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v493207; VI-NEXT: v_cndmask_b32_e32 v49, v43, v55, vcc3208; VI-NEXT: buffer_load_dword v55, off, s[0:3], s32 offset:1003209; VI-NEXT: v_lshrrev_b32_e32 v43, 16, v13210; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v173211; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:843212; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:763213; VI-NEXT: s_waitcnt vmcnt(8)3214; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v483215; VI-NEXT: v_cndmask_b32_e32 v48, v46, v43, vcc3216; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:683217; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:603218; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:523219; VI-NEXT: v_lshrrev_b32_e32 v46, 16, v03220; VI-NEXT: v_lshrrev_b32_e32 v58, 16, v163221; VI-NEXT: s_waitcnt vmcnt(10)3222; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v403223; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:443224; VI-NEXT: v_cndmask_b32_e32 v46, v58, v46, vcc3225; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:363226; VI-NEXT: s_waitcnt vmcnt(11)3227; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v413228; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:283229; VI-NEXT: v_cndmask_b32_e32 v15, v37, v15, vcc3230; VI-NEXT: buffer_load_dword v37, off, s[0:3], s32 offset:203231; VI-NEXT: s_waitcnt vmcnt(12)3232; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v423233; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:123234; VI-NEXT: v_cndmask_b32_e32 v14, v30, v14, vcc3235; VI-NEXT: buffer_load_dword v30, off, s[0:3], s32 offset:43236; VI-NEXT: s_waitcnt vmcnt(13)3237; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v443238; VI-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc3239; VI-NEXT: s_waitcnt vmcnt(11)3240; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v553241; VI-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc3242; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v453243; VI-NEXT: v_cndmask_b32_e32 v11, v27, v11, vcc3244; VI-NEXT: s_waitcnt vmcnt(10)3245; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v473246; VI-NEXT: v_cndmask_b32_e32 v10, v26, v10, vcc3247; VI-NEXT: s_waitcnt vmcnt(9)3248; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v563249; VI-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc3250; VI-NEXT: s_waitcnt vmcnt(8)3251; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v433252; VI-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc3253; VI-NEXT: s_waitcnt vmcnt(7)3254; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v573255; VI-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc3256; VI-NEXT: s_waitcnt vmcnt(6)3257; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v593258; VI-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc3259; VI-NEXT: s_waitcnt vmcnt(5)3260; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v403261; VI-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc3262; VI-NEXT: s_waitcnt vmcnt(4)3263; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v583264; VI-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc3265; VI-NEXT: s_waitcnt vmcnt(3)3266; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v413267; VI-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc3268; VI-NEXT: s_waitcnt vmcnt(2)3269; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v373270; VI-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc3271; VI-NEXT: s_waitcnt vmcnt(1)3272; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v423273; VI-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc3274; VI-NEXT: s_waitcnt vmcnt(0)3275; VI-NEXT: v_cmp_eq_u32_e32 vcc, 0, v303276; VI-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc3277; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v463278; VI-NEXT: buffer_load_dword v60, off, s[0:3], s32 offset:132 ; 4-byte Folded Reload3279; VI-NEXT: buffer_load_dword v59, off, s[0:3], s32 offset:136 ; 4-byte Folded Reload3280; VI-NEXT: buffer_load_dword v58, off, s[0:3], s32 offset:140 ; 4-byte Folded Reload3281; VI-NEXT: buffer_load_dword v57, off, s[0:3], s32 offset:144 ; 4-byte Folded Reload3282; VI-NEXT: buffer_load_dword v56, off, s[0:3], s32 offset:148 ; 4-byte Folded Reload3283; VI-NEXT: buffer_load_dword v47, off, s[0:3], s32 offset:152 ; 4-byte Folded Reload3284; VI-NEXT: buffer_load_dword v46, off, s[0:3], s32 offset:156 ; 4-byte Folded Reload3285; VI-NEXT: buffer_load_dword v45, off, s[0:3], s32 offset:160 ; 4-byte Folded Reload3286; VI-NEXT: buffer_load_dword v44, off, s[0:3], s32 offset:164 ; 4-byte Folded Reload3287; VI-NEXT: buffer_load_dword v43, off, s[0:3], s32 offset:168 ; 4-byte Folded Reload3288; VI-NEXT: buffer_load_dword v42, off, s[0:3], s32 offset:172 ; 4-byte Folded Reload3289; VI-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:176 ; 4-byte Folded Reload3290; VI-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:180 ; 4-byte Folded Reload3291; VI-NEXT: v_or_b32_sdwa v0, v0, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3292; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v483293; VI-NEXT: v_or_b32_sdwa v1, v1, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3294; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v493295; VI-NEXT: v_or_b32_sdwa v2, v2, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3296; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v513297; VI-NEXT: v_or_b32_sdwa v3, v3, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3298; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v523299; VI-NEXT: v_or_b32_sdwa v4, v4, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3300; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v543301; VI-NEXT: v_or_b32_sdwa v5, v5, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3302; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v533303; VI-NEXT: v_or_b32_sdwa v6, v6, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3304; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v503305; VI-NEXT: v_or_b32_sdwa v7, v7, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3306; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v393307; VI-NEXT: v_or_b32_sdwa v8, v8, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3308; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v383309; VI-NEXT: v_or_b32_sdwa v9, v9, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3310; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v323311; VI-NEXT: v_or_b32_sdwa v10, v10, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3312; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v333313; VI-NEXT: v_or_b32_sdwa v11, v11, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3314; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v343315; VI-NEXT: v_or_b32_sdwa v12, v12, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3316; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v353317; VI-NEXT: v_or_b32_sdwa v13, v13, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3318; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v363319; VI-NEXT: v_or_b32_sdwa v14, v14, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3320; VI-NEXT: v_lshlrev_b32_e32 v16, 16, v313321; VI-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD3322; VI-NEXT: s_waitcnt vmcnt(0)3323; VI-NEXT: s_setpc_b64 s[30:31]3324;3325; GFX11-TRUE16-LABEL: v_vselect_v32f16:3326; GFX11-TRUE16: ; %bb.0:3327; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3328; GFX11-TRUE16-NEXT: s_clause 0x1f3329; GFX11-TRUE16-NEXT: scratch_load_b32 v31, off, s32 offset:43330; GFX11-TRUE16-NEXT: scratch_load_b32 v32, off, s32 offset:123331; GFX11-TRUE16-NEXT: scratch_load_b32 v33, off, s32 offset:203332; GFX11-TRUE16-NEXT: scratch_load_b32 v34, off, s32 offset:283333; GFX11-TRUE16-NEXT: scratch_load_b32 v35, off, s32 offset:363334; GFX11-TRUE16-NEXT: scratch_load_b32 v36, off, s32 offset:443335; GFX11-TRUE16-NEXT: scratch_load_b32 v37, off, s32 offset:523336; GFX11-TRUE16-NEXT: scratch_load_b32 v38, off, s32 offset:603337; GFX11-TRUE16-NEXT: scratch_load_b32 v39, off, s32 offset:683338; GFX11-TRUE16-NEXT: scratch_load_b32 v48, off, s32 offset:763339; GFX11-TRUE16-NEXT: scratch_load_b32 v49, off, s32 offset:843340; GFX11-TRUE16-NEXT: scratch_load_b32 v50, off, s32 offset:923341; GFX11-TRUE16-NEXT: scratch_load_b32 v51, off, s32 offset:1003342; GFX11-TRUE16-NEXT: scratch_load_b32 v52, off, s32 offset:1083343; GFX11-TRUE16-NEXT: scratch_load_b32 v53, off, s32 offset:1163344; GFX11-TRUE16-NEXT: scratch_load_b32 v54, off, s32 offset:1243345; GFX11-TRUE16-NEXT: scratch_load_b32 v55, off, s32 offset:83346; GFX11-TRUE16-NEXT: scratch_load_b32 v64, off, s32 offset:163347; GFX11-TRUE16-NEXT: scratch_load_b32 v65, off, s32 offset:243348; GFX11-TRUE16-NEXT: scratch_load_b32 v66, off, s32 offset:323349; GFX11-TRUE16-NEXT: scratch_load_b32 v67, off, s32 offset:403350; GFX11-TRUE16-NEXT: scratch_load_b32 v68, off, s32 offset:483351; GFX11-TRUE16-NEXT: scratch_load_b32 v69, off, s32 offset:563352; GFX11-TRUE16-NEXT: scratch_load_b32 v70, off, s32 offset:643353; GFX11-TRUE16-NEXT: scratch_load_b32 v71, off, s32 offset:723354; GFX11-TRUE16-NEXT: scratch_load_b32 v80, off, s32 offset:803355; GFX11-TRUE16-NEXT: scratch_load_b32 v81, off, s32 offset:883356; GFX11-TRUE16-NEXT: scratch_load_b32 v82, off, s32 offset:1283357; GFX11-TRUE16-NEXT: scratch_load_b32 v83, off, s32 offset:1203358; GFX11-TRUE16-NEXT: scratch_load_b32 v84, off, s32 offset:1123359; GFX11-TRUE16-NEXT: scratch_load_b32 v85, off, s32 offset:1043360; GFX11-TRUE16-NEXT: scratch_load_b32 v86, off, s32 offset:963361; GFX11-TRUE16-NEXT: scratch_load_b32 v87, off, s323362; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(32)3363; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v313364; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(31)3365; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v323366; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(30)3367; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s1, 0, v333368; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(29)3369; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s2, 0, v343370; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(28)3371; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s3, 0, v353372; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(27)3373; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s4, 0, v363374; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(26)3375; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s5, 0, v373376; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(25)3377; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s6, 0, v383378; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(24)3379; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s7, 0, v393380; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(23)3381; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s8, 0, v483382; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(22)3383; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s9, 0, v493384; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(21)3385; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s10, 0, v503386; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(20)3387; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s11, 0, v513388; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(19)3389; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s12, 0, v523390; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(18)3391; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s13, 0, v533392; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(17)3393; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s14, 0, v543394; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(16)3395; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s15, 0, v553396; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(15)3397; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s16, 0, v643398; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(14)3399; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s17, 0, v653400; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(13)3401; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s18, 0, v663402; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(12)3403; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s19, 0, v673404; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(11)3405; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s20, 0, v683406; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(10)3407; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s21, 0, v693408; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(9)3409; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s22, 0, v703410; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(8)3411; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s23, 0, v713412; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(7)3413; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s24, 0, v803414; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(6)3415; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s25, 0, v813416; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(5)3417; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s26, 0, v823418; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(4)3419; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s27, 0, v833420; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(3)3421; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s28, 0, v843422; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(2)3423; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s29, 0, v853424; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)3425; GFX11-TRUE16-NEXT: v_cmp_eq_u32_e64 s40, 0, v863426; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)3427; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.h, v87.h, v15.h, s263428; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.h, v30.h, v14.h, s273429; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.h, v29.h, v13.h, s283430; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.h, v28.h, v12.h, s293431; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.h, v27.h, v11.h, s403432; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.h, v26.h, v10.h, s253433; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.h, v25.h, v9.h, s243434; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.h, v24.h, v8.h, s233435; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.h, v23.h, v7.h, s223436; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.h, v22.h, v6.h, s213437; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.h, v21.h, v5.h, s203438; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.h, v20.h, v4.h, s193439; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.h, v19.h, v3.h, s183440; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.h, v18.h, v2.h, s173441; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.h, v17.h, v1.h, s163442; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.h, v16.h, v0.h, s153443; GFX11-TRUE16-NEXT: v_cndmask_b16 v15.l, v87.l, v15.l, s143444; GFX11-TRUE16-NEXT: v_cndmask_b16 v14.l, v30.l, v14.l, s133445; GFX11-TRUE16-NEXT: v_cndmask_b16 v13.l, v29.l, v13.l, s123446; GFX11-TRUE16-NEXT: v_cndmask_b16 v12.l, v28.l, v12.l, s113447; GFX11-TRUE16-NEXT: v_cndmask_b16 v11.l, v27.l, v11.l, s103448; GFX11-TRUE16-NEXT: v_cndmask_b16 v10.l, v26.l, v10.l, s93449; GFX11-TRUE16-NEXT: v_cndmask_b16 v9.l, v25.l, v9.l, s83450; GFX11-TRUE16-NEXT: v_cndmask_b16 v8.l, v24.l, v8.l, s73451; GFX11-TRUE16-NEXT: v_cndmask_b16 v7.l, v23.l, v7.l, s63452; GFX11-TRUE16-NEXT: v_cndmask_b16 v6.l, v22.l, v6.l, s53453; GFX11-TRUE16-NEXT: v_cndmask_b16 v5.l, v21.l, v5.l, s43454; GFX11-TRUE16-NEXT: v_cndmask_b16 v0.l, v16.l, v0.l, vcc_lo3455; GFX11-TRUE16-NEXT: v_cndmask_b16 v1.l, v17.l, v1.l, s03456; GFX11-TRUE16-NEXT: v_cndmask_b16 v2.l, v18.l, v2.l, s13457; GFX11-TRUE16-NEXT: v_cndmask_b16 v3.l, v19.l, v3.l, s23458; GFX11-TRUE16-NEXT: v_cndmask_b16 v4.l, v20.l, v4.l, s33459; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]3460;3461; GFX11-FAKE16-LABEL: v_vselect_v32f16:3462; GFX11-FAKE16: ; %bb.0:3463; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)3464; GFX11-FAKE16-NEXT: s_clause 0x1f3465; GFX11-FAKE16-NEXT: scratch_load_b32 v31, off, s32 offset:1123466; GFX11-FAKE16-NEXT: scratch_load_b32 v32, off, s32 offset:1203467; GFX11-FAKE16-NEXT: scratch_load_b32 v33, off, s323468; GFX11-FAKE16-NEXT: scratch_load_b32 v34, off, s32 offset:1043469; GFX11-FAKE16-NEXT: scratch_load_b32 v35, off, s32 offset:963470; GFX11-FAKE16-NEXT: scratch_load_b32 v36, off, s32 offset:883471; GFX11-FAKE16-NEXT: scratch_load_b32 v37, off, s32 offset:803472; GFX11-FAKE16-NEXT: scratch_load_b32 v38, off, s32 offset:723473; GFX11-FAKE16-NEXT: scratch_load_b32 v39, off, s32 offset:643474; GFX11-FAKE16-NEXT: scratch_load_b32 v48, off, s32 offset:563475; GFX11-FAKE16-NEXT: scratch_load_b32 v49, off, s32 offset:483476; GFX11-FAKE16-NEXT: scratch_load_b32 v50, off, s32 offset:403477; GFX11-FAKE16-NEXT: scratch_load_b32 v51, off, s32 offset:323478; GFX11-FAKE16-NEXT: scratch_load_b32 v52, off, s32 offset:243479; GFX11-FAKE16-NEXT: scratch_load_b32 v53, off, s32 offset:163480; GFX11-FAKE16-NEXT: scratch_load_b32 v54, off, s32 offset:83481; GFX11-FAKE16-NEXT: scratch_load_b32 v55, off, s32 offset:1243482; GFX11-FAKE16-NEXT: scratch_load_b32 v64, off, s32 offset:1163483; GFX11-FAKE16-NEXT: scratch_load_b32 v65, off, s32 offset:1083484; GFX11-FAKE16-NEXT: scratch_load_b32 v66, off, s32 offset:1003485; GFX11-FAKE16-NEXT: scratch_load_b32 v67, off, s32 offset:923486; GFX11-FAKE16-NEXT: scratch_load_b32 v68, off, s32 offset:843487; GFX11-FAKE16-NEXT: scratch_load_b32 v69, off, s32 offset:763488; GFX11-FAKE16-NEXT: scratch_load_b32 v70, off, s32 offset:683489; GFX11-FAKE16-NEXT: scratch_load_b32 v71, off, s32 offset:603490; GFX11-FAKE16-NEXT: scratch_load_b32 v80, off, s32 offset:523491; GFX11-FAKE16-NEXT: scratch_load_b32 v81, off, s32 offset:443492; GFX11-FAKE16-NEXT: scratch_load_b32 v82, off, s32 offset:363493; GFX11-FAKE16-NEXT: scratch_load_b32 v83, off, s32 offset:283494; GFX11-FAKE16-NEXT: scratch_load_b32 v84, off, s32 offset:123495; GFX11-FAKE16-NEXT: scratch_load_b32 v85, off, s32 offset:43496; GFX11-FAKE16-NEXT: scratch_load_b32 v86, off, s32 offset:203497; GFX11-FAKE16-NEXT: scratch_load_b32 v87, off, s32 offset:1283498; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v99, 16, v133499; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v293500; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v101, 16, v123501; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v102, 16, v283502; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v103, 16, v113503; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v112, 16, v273504; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v113, 16, v103505; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v114, 16, v263506; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v115, 16, v93507; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v116, 16, v253508; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v117, 16, v83509; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v118, 16, v243510; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v119, 16, v73511; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v128, 16, v233512; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v129, 16, v63513; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v130, 16, v223514; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v131, 16, v53515; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v132, 16, v213516; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v133, 16, v43517; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v134, 16, v203518; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v135, 16, v33519; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v144, 16, v193520; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v145, 16, v23521; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v146, 16, v183522; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v97, 16, v143523; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v303524; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v147, 16, v13525; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v153526; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(32)3527; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v313528; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v173529; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(31)3530; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e64 s0, 0, v323531; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v03532; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v99, v100, v99, vcc_lo3533; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(29)3534; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v343535; GFX11-FAKE16-NEXT: v_cndmask_b32_e64 v97, v98, v97, s03536; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v98, 16, v163537; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v100, 16, v333538; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v34, v102, v101, vcc_lo3539; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(28)3540; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v353541; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v35, v112, v103, vcc_lo3542; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(27)3543; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v363544; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v36, v114, v113, vcc_lo3545; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(26)3546; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v373547; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v37, v116, v115, vcc_lo3548; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(25)3549; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v383550; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v38, v118, v117, vcc_lo3551; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(24)3552; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v393553; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v39, v128, v119, vcc_lo3554; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(23)3555; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v483556; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v48, v130, v129, vcc_lo3557; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(22)3558; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v493559; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v49, v132, v131, vcc_lo3560; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(21)3561; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v503562; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v50, v134, v133, vcc_lo3563; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(20)3564; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v513565; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v51, v144, v135, vcc_lo3566; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(19)3567; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v523568; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v52, v146, v145, vcc_lo3569; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(18)3570; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v533571; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v31, v31, v147, vcc_lo3572; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(17)3573; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v543574; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v32, v98, v32, vcc_lo3575; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(16)3576; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v553577; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v15, v33, v15, vcc_lo3578; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(15)3579; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v643580; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v14, v30, v14, vcc_lo3581; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(14)3582; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v653583; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)3584; GFX11-FAKE16-NEXT: v_perm_b32 v14, v97, v14, 0x50401003585; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v13, v29, v13, vcc_lo3586; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(13)3587; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v663588; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v12, v28, v12, vcc_lo3589; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(12)3590; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v673591; GFX11-FAKE16-NEXT: v_perm_b32 v13, v99, v13, 0x50401003592; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)3593; GFX11-FAKE16-NEXT: v_perm_b32 v12, v34, v12, 0x50401003594; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v11, v27, v11, vcc_lo3595; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(11)3596; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v683597; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v10, v26, v10, vcc_lo3598; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(10)3599; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v693600; GFX11-FAKE16-NEXT: v_perm_b32 v11, v35, v11, 0x50401003601; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)3602; GFX11-FAKE16-NEXT: v_perm_b32 v10, v36, v10, 0x50401003603; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v9, v25, v9, vcc_lo3604; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(9)3605; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v703606; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v8, v24, v8, vcc_lo3607; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(8)3608; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v713609; GFX11-FAKE16-NEXT: v_perm_b32 v9, v37, v9, 0x50401003610; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)3611; GFX11-FAKE16-NEXT: v_perm_b32 v8, v38, v8, 0x50401003612; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v7, v23, v7, vcc_lo3613; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(7)3614; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v803615; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v6, v22, v6, vcc_lo3616; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(6)3617; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v813618; GFX11-FAKE16-NEXT: v_perm_b32 v7, v39, v7, 0x50401003619; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)3620; GFX11-FAKE16-NEXT: v_perm_b32 v6, v48, v6, 0x50401003621; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v5, v21, v5, vcc_lo3622; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(5)3623; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v823624; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v4, v20, v4, vcc_lo3625; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(4)3626; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v833627; GFX11-FAKE16-NEXT: v_perm_b32 v5, v49, v5, 0x50401003628; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3)3629; GFX11-FAKE16-NEXT: v_perm_b32 v4, v50, v4, 0x50401003630; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v19, v3, vcc_lo3631; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(3)3632; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v843633; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v17, v1, vcc_lo3634; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(2)3635; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v853636; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v0, v16, v0, vcc_lo3637; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)3638; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v863639; GFX11-FAKE16-NEXT: v_perm_b32 v3, v51, v3, 0x50401003640; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)3641; GFX11-FAKE16-NEXT: v_perm_b32 v0, v32, v0, 0x50401003642; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v18, v2, vcc_lo3643; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)3644; GFX11-FAKE16-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v873645; GFX11-FAKE16-NEXT: v_perm_b32 v1, v31, v1, 0x50401003646; GFX11-FAKE16-NEXT: v_perm_b32 v2, v52, v2, 0x50401003647; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v16, v100, v96, vcc_lo3648; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)3649; GFX11-FAKE16-NEXT: v_perm_b32 v15, v16, v15, 0x50401003650; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]3651 %cmp = icmp eq <32 x i32> %cond, zeroinitializer3652 %select = select <32 x i1> %cmp, <32 x half> %a, <32 x half> %b3653 ret <32 x half> %select3654}3655