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1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=GCN -check-prefix=FUNC %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=VI -check-prefix=GCN -check-prefix=FUNC %s3; RUN: llc -mtriple=r600 -mcpu=cypress < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s4 5; FUNC-LABEL: {{^}}sext_bool_icmp_eq_0:6; GCN-NOT: v_cmp7; GCN: s_cmp_lg_u328; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 09; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]10; GCN-NEXT:buffer_store_byte [[RESULT]]11; GCN-NEXT: s_endpgm12 13; EG: SETNE_INT * [[CMP:T[0-9]+]].[[CMPCHAN:[XYZW]]], KC0[2].Z, KC0[2].W14; EG: AND_INT T{{[0-9]+.[XYZW]}}, PS, 115define amdgpu_kernel void @sext_bool_icmp_eq_0(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {16 %icmp0 = icmp eq i32 %a, %b17 %ext = sext i1 %icmp0 to i3218 %icmp1 = icmp eq i32 %ext, 019 store i1 %icmp1, ptr addrspace(1) %out20 ret void21}22 23; FUNC-LABEL: {{^}}sext_bool_icmp_ne_0:24; GCN-NOT: v_cmp25; GCN: s_cmp_lg_u3226; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 027; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]28; GCN-NEXT: buffer_store_byte [[RESULT]]29; GCN-NEXT: s_endpgm30 31; EG: SETNE_INT * [[CMP:T[0-9]+]].[[CMPCHAN:[XYZW]]], KC0[2].Z, KC0[2].W32; EG: AND_INT T{{[0-9]+.[XYZW]}}, PS, 133define amdgpu_kernel void @sext_bool_icmp_ne_0(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {34 %icmp0 = icmp ne i32 %a, %b35 %ext = sext i1 %icmp0 to i3236 %icmp1 = icmp ne i32 %ext, 037 store i1 %icmp1, ptr addrspace(1) %out38 ret void39}40 41; FUNC-LABEL: {{^}}sext_bool_icmp_eq_neg1:42; GCN-NOT: v_cmp43; GCN: s_cmp_eq_u3244; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 045; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]46; GCN-NEXT: buffer_store_byte [[RESULT]]47; GCN-NEXT: s_endpgm48define amdgpu_kernel void @sext_bool_icmp_eq_neg1(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {49 %icmp0 = icmp eq i32 %a, %b50 %ext = sext i1 %icmp0 to i3251 %icmp1 = icmp eq i32 %ext, -152 store i1 %icmp1, ptr addrspace(1) %out53 ret void54}55 56; FUNC-LABEL: {{^}}sext_bool_icmp_ne_neg1:57; GCN-NOT: v_cmp58; GCN: s_cmp_eq_u3259; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 060; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]61; GCN-NEXT: buffer_store_byte [[RESULT]]62; GCN-NEXT: s_endpgm63define amdgpu_kernel void @sext_bool_icmp_ne_neg1(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {64 %icmp0 = icmp ne i32 %a, %b65 %ext = sext i1 %icmp0 to i3266 %icmp1 = icmp ne i32 %ext, -167 store i1 %icmp1, ptr addrspace(1) %out68 ret void69}70 71; FUNC-LABEL: {{^}}zext_bool_icmp_eq_0:72; GCN-NOT: v_cmp73; GCN: s_cmp_lg_u3274; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 075; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]76; GCN-NEXT: buffer_store_byte [[RESULT]]77; GCN-NEXT: s_endpgm78define amdgpu_kernel void @zext_bool_icmp_eq_0(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {79 %icmp0 = icmp eq i32 %a, %b80 %ext = zext i1 %icmp0 to i3281 %icmp1 = icmp eq i32 %ext, 082 store i1 %icmp1, ptr addrspace(1) %out83 ret void84}85 86; FUNC-LABEL: {{^}}zext_bool_icmp_ne_0:87; GCN-NOT: v_cmp88; GCN: s_cmp_lg_u3289; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 090; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]91; GCN-NEXT: buffer_store_byte [[RESULT]]92; GCN-NEXT: s_endpgm93define amdgpu_kernel void @zext_bool_icmp_ne_0(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {94 %icmp0 = icmp ne i32 %a, %b95 %ext = zext i1 %icmp0 to i3296 %icmp1 = icmp ne i32 %ext, 097 store i1 %icmp1, ptr addrspace(1) %out98 ret void99}100 101; FUNC-LABEL: {{^}}zext_bool_icmp_eq_1:102; GCN-NOT: v_cmp103; GCN: s_cmp_eq_u32104; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 0105; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]106; GCN-NEXT: buffer_store_byte [[RESULT]]107; GCN-NEXT: s_endpgm108define amdgpu_kernel void @zext_bool_icmp_eq_1(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {109 %icmp0 = icmp eq i32 %a, %b110 %ext = zext i1 %icmp0 to i32111 %icmp1 = icmp eq i32 %ext, 1112 store i1 %icmp1, ptr addrspace(1) %out113 ret void114}115 116; FUNC-LABEL: {{^}}zext_bool_icmp_ne_1:117; GCN-NOT: v_cmp118; GCN: s_cmp_eq_u32119; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 0120; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]121; GCN-NEXT: buffer_store_byte [[RESULT]]122define amdgpu_kernel void @zext_bool_icmp_ne_1(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {123 %icmp0 = icmp ne i32 %a, %b124 %ext = zext i1 %icmp0 to i32125 %icmp1 = icmp ne i32 %ext, 1126 store i1 %icmp1, ptr addrspace(1) %out127 ret void128}129 130; Reduces to false:131; FUNC-LABEL: {{^}}zext_bool_icmp_eq_neg1:132; GCN: v_mov_b32_e32 [[TMP:v[0-9]+]], 0{{$}}133; GCN: buffer_store_byte [[TMP]]134; GCN-NEXT: s_endpgm135define amdgpu_kernel void @zext_bool_icmp_eq_neg1(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {136 %icmp0 = icmp eq i32 %a, %b137 %ext = zext i1 %icmp0 to i32138 %icmp1 = icmp eq i32 %ext, -1139 store i1 %icmp1, ptr addrspace(1) %out140 ret void141}142 143; Reduces to true:144; FUNC-LABEL: {{^}}zext_bool_icmp_ne_neg1:145; GCN: v_mov_b32_e32 [[TMP:v[0-9]+]], 1{{$}}146; GCN: buffer_store_byte [[TMP]]147; GCN-NEXT: s_endpgm148define amdgpu_kernel void @zext_bool_icmp_ne_neg1(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {149 %icmp0 = icmp ne i32 %a, %b150 %ext = zext i1 %icmp0 to i32151 %icmp1 = icmp ne i32 %ext, -1152 store i1 %icmp1, ptr addrspace(1) %out153 ret void154}155 156; FUNC-LABEL: {{^}}cmp_zext_k_i8max:157; GCN: s_load_dword [[VALUE:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}158; GCN-DAG: s_and_b32 [[B:s[0-9]+]], [[VALUE]], 0xff159; GCN: s_cmpk_lg_i32 [[B]], 0xff160; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 0161 162; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]163; GCN: buffer_store_byte [[RESULT]]164; GCN: s_endpgm165define amdgpu_kernel void @cmp_zext_k_i8max(ptr addrspace(1) %out, i8 %b) nounwind {166 %b.ext = zext i8 %b to i32167 %icmp0 = icmp ne i32 %b.ext, 255168 store i1 %icmp0, ptr addrspace(1) %out169 ret void170}171 172; FUNC-LABEL: {{^}}cmp_sext_k_neg1:173; GCN: buffer_load_sbyte [[B:v[0-9]+]]174; GCN: v_cmp_ne_u32_e32 vcc, -1, [[B]]{{$}}175; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc176; GCN: buffer_store_byte [[RESULT]]177; GCN: s_endpgm178define amdgpu_kernel void @cmp_sext_k_neg1(ptr addrspace(1) %out, ptr addrspace(1) %b.ptr) nounwind {179 %b = load i8, ptr addrspace(1) %b.ptr180 %b.ext = sext i8 %b to i32181 %icmp0 = icmp ne i32 %b.ext, -1182 store i1 %icmp0, ptr addrspace(1) %out183 ret void184}185 186; FUNC-LABEL: {{^}}v_cmp_sext_k_neg1_i8_sext_arg:187; GCN: v_cmp_ne_u32_e32 vcc, -1, v0188; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 0, 1, vcc189; GCN: buffer_store_byte [[SELECT]]190define void @v_cmp_sext_k_neg1_i8_sext_arg(i8 signext %b) nounwind {191 %b.ext = sext i8 %b to i32192 %icmp0 = icmp ne i32 %b.ext, -1193 store i1 %icmp0, ptr addrspace(1) poison194 ret void195}196 197; FIXME: This ends up doing a buffer_load_ubyte, and and compare to198; 255. Seems to be because of ordering problems when not allowing load widths to be reduced.199; Should do a buffer_load_sbyte and compare with -1200 201; FUNC-LABEL: {{^}}cmp_sext_k_neg1_i8_arg:202; SI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb203; VI: s_load_dword [[VAL:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c204; GCN-DAG: s_and_b32 [[B:s[0-9]+]], [[VAL]], 0xff205; GCN: s_cmpk_lg_i32 [[B]], 0xff{{$}}206; GCN: s_cselect_b64 [[CC:[^,]+]], -1, 0207; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, [[CC]]208; GCN: buffer_store_byte [[RESULT]]209; GCN: s_endpgm210define amdgpu_kernel void @cmp_sext_k_neg1_i8_arg(ptr addrspace(1) %out, i8 %b) nounwind {211 %b.ext = sext i8 %b to i32212 %icmp0 = icmp ne i32 %b.ext, -1213 store i1 %icmp0, ptr addrspace(1) %out214 ret void215}216 217; FUNC-LABEL: {{^}}cmp_zext_k_neg1:218; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}219; GCN: buffer_store_byte [[RESULT]]220; GCN: s_endpgm221define amdgpu_kernel void @cmp_zext_k_neg1(ptr addrspace(1) %out, i8 %b) nounwind {222 %b.ext = zext i8 %b to i32223 %icmp0 = icmp ne i32 %b.ext, -1224 store i1 %icmp0, ptr addrspace(1) %out225 ret void226}227 228; FUNC-LABEL: {{^}}zext_bool_icmp_ne_k:229; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 1{{$}}230; GCN: buffer_store_byte [[RESULT]]231; GCN-NEXT: s_endpgm232define amdgpu_kernel void @zext_bool_icmp_ne_k(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {233 %icmp0 = icmp ne i32 %a, %b234 %ext = zext i1 %icmp0 to i32235 %icmp1 = icmp ne i32 %ext, 2236 store i1 %icmp1, ptr addrspace(1) %out237 ret void238}239 240; FUNC-LABEL: {{^}}zext_bool_icmp_eq_k:241; GCN: v_mov_b32_e32 [[RESULT:v[0-9]+]], 0{{$}}242; GCN: buffer_store_byte [[RESULT]]243; GCN-NEXT: s_endpgm244define amdgpu_kernel void @zext_bool_icmp_eq_k(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {245 %icmp0 = icmp ne i32 %a, %b246 %ext = zext i1 %icmp0 to i32247 %icmp1 = icmp eq i32 %ext, 2248 store i1 %icmp1, ptr addrspace(1) %out249 ret void250}251 252; FIXME: These cases should really be able fold to true/false in253; DAGCombiner254 255; This really folds away to false256; FUNC-LABEL: {{^}}sext_bool_icmp_eq_1:257; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 0{{$}}258; GCN: buffer_store_byte [[K]]259define amdgpu_kernel void @sext_bool_icmp_eq_1(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {260 %icmp0 = icmp eq i32 %a, %b261 %ext = sext i1 %icmp0 to i32262 %icmp1 = icmp eq i32 %ext, 1263 store i1 %icmp1, ptr addrspace(1) %out264 ret void265}266 267; FUNC-LABEL: {{^}}sext_bool_icmp_ne_1:268; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 1{{$}}269; GCN: buffer_store_byte [[K]]270define amdgpu_kernel void @sext_bool_icmp_ne_1(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {271 %icmp0 = icmp ne i32 %a, %b272 %ext = sext i1 %icmp0 to i32273 %icmp1 = icmp ne i32 %ext, 1274 store i1 %icmp1, ptr addrspace(1) %out275 ret void276}277 278; FUNC-LABEL: {{^}}sext_bool_icmp_ne_k:279; GCN: v_mov_b32_e32 [[K:v[0-9]+]], 1{{$}}280; GCN: buffer_store_byte [[K]]281define amdgpu_kernel void @sext_bool_icmp_ne_k(ptr addrspace(1) %out, i32 %a, i32 %b) nounwind {282 %icmp0 = icmp ne i32 %a, %b283 %ext = sext i1 %icmp0 to i32284 %icmp1 = icmp ne i32 %ext, 2285 store i1 %icmp1, ptr addrspace(1) %out286 ret void287}288