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1; RUN: llc -mtriple=amdgcn-- < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=GCN -check-prefix=FUNC %s2; RUN: llc -mtriple=r600-- -mcpu=redwood < %s | FileCheck -allow-deprecated-dag-overlap -check-prefix=R600 -check-prefix=FUNC %s3 4declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone5 6; FUNC-LABEL: {{^}}setcc_v2i32:7; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[3].X, KC0[3].Z8; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW]}}, KC0[2].W, KC0[3].Y9 10; GCN: s_cmp_eq_u3211; GCN: s_cmp_eq_u3212define amdgpu_kernel void @setcc_v2i32(ptr addrspace(1) %out, <2 x i32> %a, <2 x i32> %b) #0 {13 %result = icmp eq <2 x i32> %a, %b14 %sext = sext <2 x i1> %result to <2 x i32>15 store <2 x i32> %sext, ptr addrspace(1) %out16 ret void17}18 19; FUNC-LABEL: {{^}}setcc_v4i32:20; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}21; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}22; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}23; R600-DAG: SETE_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}24 25; GCN: s_cmp_eq_u3226; GCN: s_cmp_eq_u3227; GCN: s_cmp_eq_u3228; GCN: s_cmp_eq_u3229define amdgpu_kernel void @setcc_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {30 %b_ptr = getelementptr <4 x i32>, ptr addrspace(1) %in, i32 131 %a = load <4 x i32>, ptr addrspace(1) %in32 %b = load <4 x i32>, ptr addrspace(1) %b_ptr33 %result = icmp eq <4 x i32> %a, %b34 %sext = sext <4 x i1> %result to <4 x i32>35 store <4 x i32> %sext, ptr addrspace(1) %out36 ret void37}38 39;;;==========================================================================;;;40;; Float comparisons41;;;==========================================================================;;;42 43; FUNC-LABEL: {{^}}f32_oeq:44; R600: SETE_DX1045; GCN: v_cmp_eq_f3246define amdgpu_kernel void @f32_oeq(ptr addrspace(1) %out, float %a, float %b) #0 {47entry:48 %0 = fcmp oeq float %a, %b49 %1 = sext i1 %0 to i3250 store i32 %1, ptr addrspace(1) %out51 ret void52}53 54; FUNC-LABEL: {{^}}f32_ogt:55; R600: SETGT_DX1056; GCN: v_cmp_gt_f3257define amdgpu_kernel void @f32_ogt(ptr addrspace(1) %out, float %a, float %b) #0 {58entry:59 %0 = fcmp ogt float %a, %b60 %1 = sext i1 %0 to i3261 store i32 %1, ptr addrspace(1) %out62 ret void63}64 65; FUNC-LABEL: {{^}}f32_oge:66; R600: SETGE_DX1067; GCN: v_cmp_ge_f3268define amdgpu_kernel void @f32_oge(ptr addrspace(1) %out, float %a, float %b) #0 {69entry:70 %0 = fcmp oge float %a, %b71 %1 = sext i1 %0 to i3272 store i32 %1, ptr addrspace(1) %out73 ret void74}75 76; FUNC-LABEL: {{^}}f32_olt:77; R600: SETGT_DX1078; GCN: v_cmp_lt_f3279define amdgpu_kernel void @f32_olt(ptr addrspace(1) %out, float %a, float %b) #0 {80entry:81 %0 = fcmp olt float %a, %b82 %1 = sext i1 %0 to i3283 store i32 %1, ptr addrspace(1) %out84 ret void85}86 87; FUNC-LABEL: {{^}}f32_ole:88; R600: SETGE_DX1089; GCN: v_cmp_le_f3290define amdgpu_kernel void @f32_ole(ptr addrspace(1) %out, float %a, float %b) #0 {91entry:92 %0 = fcmp ole float %a, %b93 %1 = sext i1 %0 to i3294 store i32 %1, ptr addrspace(1) %out95 ret void96}97 98; FUNC-LABEL: {{^}}f32_one:99; R600-DAG: SETGT_DX10100; R600-DAG: SETGT_DX10101; R600-DAG: OR_INT102; R600-DAG: SETNE_INT103 104; GCN: v_cmp_lg_f32_e32 vcc105; GCN-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc106define amdgpu_kernel void @f32_one(ptr addrspace(1) %out, float %a, float %b) #0 {107entry:108 %0 = fcmp one float %a, %b109 %1 = sext i1 %0 to i32110 store i32 %1, ptr addrspace(1) %out111 ret void112}113 114; FUNC-LABEL: {{^}}f32_ord:115; R600-DAG: SETE_DX10116; R600-DAG: SETE_DX10117; R600-DAG: AND_INT118; R600-DAG: SETNE_INT119; GCN: v_cmp_o_f32120define amdgpu_kernel void @f32_ord(ptr addrspace(1) %out, float %a, float %b) #0 {121entry:122 %0 = fcmp ord float %a, %b123 %1 = sext i1 %0 to i32124 store i32 %1, ptr addrspace(1) %out125 ret void126}127 128; FUNC-LABEL: {{^}}f32_ueq:129; R600-DAG: SETGT_DX10130; R600-DAG: SETGT_DX10131; R600-DAG: OR_INT132; R600-DAG: SETE_INT133 134; GCN: v_cmp_nlg_f32_e32 vcc135; GCN-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc136define amdgpu_kernel void @f32_ueq(ptr addrspace(1) %out, float %a, float %b) #0 {137entry:138 %0 = fcmp ueq float %a, %b139 %1 = sext i1 %0 to i32140 store i32 %1, ptr addrspace(1) %out141 ret void142}143 144; FUNC-LABEL: {{^}}f32_ugt:145; R600: SETGE146; R600: SETE_DX10147; GCN: v_cmp_nle_f32_e32 vcc148; GCN-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc149define amdgpu_kernel void @f32_ugt(ptr addrspace(1) %out, float %a, float %b) #0 {150entry:151 %0 = fcmp ugt float %a, %b152 %1 = sext i1 %0 to i32153 store i32 %1, ptr addrspace(1) %out154 ret void155}156 157; FUNC-LABEL: {{^}}f32_uge:158; R600: SETGT159; R600: SETE_DX10160 161; GCN: v_cmp_nlt_f32_e32 vcc162; GCN-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc163define amdgpu_kernel void @f32_uge(ptr addrspace(1) %out, float %a, float %b) #0 {164entry:165 %0 = fcmp uge float %a, %b166 %1 = sext i1 %0 to i32167 store i32 %1, ptr addrspace(1) %out168 ret void169}170 171; FUNC-LABEL: {{^}}f32_ult:172; R600: SETGE173; R600: SETE_DX10174 175; GCN: v_cmp_nge_f32_e32 vcc176; GCN-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc177define amdgpu_kernel void @f32_ult(ptr addrspace(1) %out, float %a, float %b) #0 {178entry:179 %0 = fcmp ult float %a, %b180 %1 = sext i1 %0 to i32181 store i32 %1, ptr addrspace(1) %out182 ret void183}184 185; FUNC-LABEL: {{^}}f32_ule:186; R600: SETGT187; R600: SETE_DX10188 189; GCN: v_cmp_ngt_f32_e32 vcc190; GCN-NEXT: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1, vcc191define amdgpu_kernel void @f32_ule(ptr addrspace(1) %out, float %a, float %b) #0 {192entry:193 %0 = fcmp ule float %a, %b194 %1 = sext i1 %0 to i32195 store i32 %1, ptr addrspace(1) %out196 ret void197}198 199; FUNC-LABEL: {{^}}f32_une:200; R600: SETNE_DX10201; GCN: v_cmp_neq_f32202define amdgpu_kernel void @f32_une(ptr addrspace(1) %out, float %a, float %b) #0 {203entry:204 %0 = fcmp une float %a, %b205 %1 = sext i1 %0 to i32206 store i32 %1, ptr addrspace(1) %out207 ret void208}209 210; FUNC-LABEL: {{^}}f32_uno:211; R600: SETNE_DX10212; R600: SETNE_DX10213; R600: OR_INT214; R600: SETNE_INT215; GCN: v_cmp_u_f32216define amdgpu_kernel void @f32_uno(ptr addrspace(1) %out, float %a, float %b) #0 {217entry:218 %0 = fcmp uno float %a, %b219 %1 = sext i1 %0 to i32220 store i32 %1, ptr addrspace(1) %out221 ret void222}223 224;;;==========================================================================;;;225;; 32-bit integer comparisons226;;;==========================================================================;;;227 228; FUNC-LABEL: {{^}}i32_eq:229; R600: SETE_INT230; GCN: s_cmp_eq_u32231define amdgpu_kernel void @i32_eq(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {232entry:233 %0 = icmp eq i32 %a, %b234 %1 = sext i1 %0 to i32235 store i32 %1, ptr addrspace(1) %out236 ret void237}238 239; FUNC-LABEL: {{^}}i32_ne:240; R600: SETNE_INT241; GCN: s_cmp_lg_u32242define amdgpu_kernel void @i32_ne(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {243entry:244 %0 = icmp ne i32 %a, %b245 %1 = sext i1 %0 to i32246 store i32 %1, ptr addrspace(1) %out247 ret void248}249 250; FUNC-LABEL: {{^}}i32_ugt:251; R600: SETGT_UINT252; GCN: s_cmp_gt_u32253define amdgpu_kernel void @i32_ugt(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {254entry:255 %0 = icmp ugt i32 %a, %b256 %1 = sext i1 %0 to i32257 store i32 %1, ptr addrspace(1) %out258 ret void259}260 261; FUNC-LABEL: {{^}}i32_uge:262; R600: SETGE_UINT263; GCN: s_cmp_ge_u32264define amdgpu_kernel void @i32_uge(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {265entry:266 %0 = icmp uge i32 %a, %b267 %1 = sext i1 %0 to i32268 store i32 %1, ptr addrspace(1) %out269 ret void270}271 272; FUNC-LABEL: {{^}}i32_ult:273; R600: SETGT_UINT274; GCN: s_cmp_lt_u32275define amdgpu_kernel void @i32_ult(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {276entry:277 %0 = icmp ult i32 %a, %b278 %1 = sext i1 %0 to i32279 store i32 %1, ptr addrspace(1) %out280 ret void281}282 283; FUNC-LABEL: {{^}}i32_ule:284; R600: SETGE_UINT285; GCN: s_cmp_le_u32286define amdgpu_kernel void @i32_ule(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {287entry:288 %0 = icmp ule i32 %a, %b289 %1 = sext i1 %0 to i32290 store i32 %1, ptr addrspace(1) %out291 ret void292}293 294; FUNC-LABEL: {{^}}i32_sgt:295; R600: SETGT_INT296; GCN: s_cmp_gt_i32297define amdgpu_kernel void @i32_sgt(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {298entry:299 %0 = icmp sgt i32 %a, %b300 %1 = sext i1 %0 to i32301 store i32 %1, ptr addrspace(1) %out302 ret void303}304 305; FUNC-LABEL: {{^}}i32_sge:306; R600: SETGE_INT307; GCN: s_cmp_ge_i32308define amdgpu_kernel void @i32_sge(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {309entry:310 %0 = icmp sge i32 %a, %b311 %1 = sext i1 %0 to i32312 store i32 %1, ptr addrspace(1) %out313 ret void314}315 316; FUNC-LABEL: {{^}}i32_slt:317; R600: SETGT_INT318; GCN: s_cmp_lt_i32319define amdgpu_kernel void @i32_slt(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {320entry:321 %0 = icmp slt i32 %a, %b322 %1 = sext i1 %0 to i32323 store i32 %1, ptr addrspace(1) %out324 ret void325}326 327; FUNC-LABEL: {{^}}i32_sle:328; R600: SETGE_INT329; GCN: s_cmp_le_i32330define amdgpu_kernel void @i32_sle(ptr addrspace(1) %out, i32 %a, i32 %b) #0 {331entry:332 %0 = icmp sle i32 %a, %b333 %1 = sext i1 %0 to i32334 store i32 %1, ptr addrspace(1) %out335 ret void336}337 338; FIXME: This does 4 compares339; FUNC-LABEL: {{^}}v3i32_eq:340; GCN-DAG: v_cmp_eq_u32341; GCN-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,342; GCN-DAG: v_cmp_eq_u32343; GCN-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,344; GCN-DAG: v_cmp_eq_u32345; GCN-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,346; GCN: s_endpgm347define amdgpu_kernel void @v3i32_eq(ptr addrspace(1) %out, ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) #0 {348 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone349 %gep.a = getelementptr <3 x i32>, ptr addrspace(1) %ptra, i32 %tid350 %gep.b = getelementptr <3 x i32>, ptr addrspace(1) %ptrb, i32 %tid351 %gep.out = getelementptr <3 x i32>, ptr addrspace(1) %out, i32 %tid352 %a = load <3 x i32>, ptr addrspace(1) %gep.a353 %b = load <3 x i32>, ptr addrspace(1) %gep.b354 %cmp = icmp eq <3 x i32> %a, %b355 %ext = sext <3 x i1> %cmp to <3 x i32>356 store <3 x i32> %ext, ptr addrspace(1) %gep.out357 ret void358}359 360; FUNC-LABEL: {{^}}v3i8_eq:361; GCN-DAG: v_cmp_eq_u32362; GCN-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,363; GCN-DAG: v_cmp_eq_u32364; GCN-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,365; GCN-DAG: v_cmp_eq_u32366; GCN-DAG: v_cndmask_b32_e64 {{v[0-9]+}}, 0, -1,367; GCN: s_endpgm368define amdgpu_kernel void @v3i8_eq(ptr addrspace(1) %out, ptr addrspace(1) %ptra, ptr addrspace(1) %ptrb) #0 {369 %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone370 %gep.a = getelementptr <3 x i8>, ptr addrspace(1) %ptra, i32 %tid371 %gep.b = getelementptr <3 x i8>, ptr addrspace(1) %ptrb, i32 %tid372 %gep.out = getelementptr <3 x i8>, ptr addrspace(1) %out, i32 %tid373 %a = load <3 x i8>, ptr addrspace(1) %gep.a374 %b = load <3 x i8>, ptr addrspace(1) %gep.b375 %cmp = icmp eq <3 x i8> %a, %b376 %ext = sext <3 x i1> %cmp to <3 x i8>377 store <3 x i8> %ext, ptr addrspace(1) %gep.out378 ret void379}380 381; Make sure we don't try to emit i1 setcc ops382; FUNC-LABEL: setcc-i1383; GCN: s_bitcmp0_b32 s{{[0-9]+}}, 0384define amdgpu_kernel void @setcc-i1(i32 %in) #0 {385 %and = and i32 %in, 1386 %cmp = icmp eq i32 %and, 0387 br i1 %cmp, label %endif, label %if388if:389 unreachable390endif:391 ret void392}393 394; FUNC-LABEL: setcc-i1-and-xor395; GCN-DAG: v_cmp_nge_f32_e64 [[A:s\[[0-9]+:[0-9]+\]]], s{{[0-9]+}}, 0{{$}}396; GCN-DAG: v_cmp_nle_f32_e64 [[B:s\[[0-9]+:[0-9]+\]]], s{{[0-9]+}}, 1.0397; GCN: s_or_b64 s[2:3], [[A]], [[B]]398define amdgpu_kernel void @setcc-i1-and-xor(ptr addrspace(1) %out, float %cond) #0 {399bb0:400 %tmp5 = fcmp oge float %cond, 0.000000e+00401 %tmp7 = fcmp ole float %cond, 1.000000e+00402 %tmp9 = and i1 %tmp5, %tmp7403 %tmp11 = xor i1 %tmp9, 1404 br i1 %tmp11, label %bb2, label %bb1405 406bb1:407 store i32 0, ptr addrspace(1) %out408 br label %bb2409 410bb2:411 ret void412}413 414; FUNC-LABEL: setcc_v2i32_expand415; GCN: s_cmp_gt_i32416; GCN: s_cmp_gt_i32417define amdgpu_kernel void @setcc_v2i32_expand(418 ptr addrspace(1) %a,419 ptr addrspace(1) %b,420 ptr addrspace(1) %c,421 ptr addrspace(1) %r) {422entry:423 %a.val = load <2 x i32>, ptr addrspace(1) %a424 %b.val = load <2 x i32>, ptr addrspace(1) %b425 %c.val = load <2 x i32>, ptr addrspace(1) %c426 427 %icmp.val.1 = icmp sgt <2 x i32> %a.val, <i32 1, i32 1>428 %zext.val.1 = zext <2 x i1> %icmp.val.1 to <2 x i32>429 %shl.val.1 = shl nuw <2 x i32> %zext.val.1, <i32 31, i32 31>430 %xor.val.1 = xor <2 x i32> %shl.val.1, %b.val431 %bitcast.val.1 = bitcast <2 x i32> %xor.val.1 to <2 x float>432 %icmp.val.2 = icmp sgt <2 x i32> %c.val, <i32 1199570944, i32 1199570944>433 %select.val.1 = select <2 x i1> %icmp.val.2, <2 x float> <float 1.000000e+00, float 1.000000e+00>, <2 x float> %bitcast.val.1434 435 store <2 x float> %select.val.1, ptr addrspace(1) %r436 ret void437}438 439; FUNC-LABEL: setcc_v4i32_expand440; GCN: s_cmp_gt_i32441; GCN: s_cmp_gt_i32442; GCN: s_cmp_gt_i32443; GCN: s_cmp_gt_i32444define amdgpu_kernel void @setcc_v4i32_expand(445 ptr addrspace(1) %a,446 ptr addrspace(1) %b,447 ptr addrspace(1) %c,448 ptr addrspace(1) %r) {449entry:450 %a.val = load <4 x i32>, ptr addrspace(1) %a451 %b.val = load <4 x i32>, ptr addrspace(1) %b452 %c.val = load <4 x i32>, ptr addrspace(1) %c453 454 %icmp.val.1 = icmp sgt <4 x i32> %a.val, <i32 1, i32 1, i32 1, i32 1>455 %zext.val.1 = zext <4 x i1> %icmp.val.1 to <4 x i32>456 %shl.val.1 = shl nuw <4 x i32> %zext.val.1, <i32 31, i32 31, i32 31, i32 31>457 %xor.val.1 = xor <4 x i32> %shl.val.1, %b.val458 %bitcast.val.1 = bitcast <4 x i32> %xor.val.1 to <4 x float>459 %icmp.val.2 = icmp sgt <4 x i32> %c.val, <i32 1199570944, i32 1199570944, i32 1199570944, i32 1199570944>460 %select.val.1 = select <4 x i1> %icmp.val.2, <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float> %bitcast.val.1461 462 store <4 x float> %select.val.1, ptr addrspace(1) %r463 ret void464}465 466attributes #0 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }467