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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn -mcpu=verde < %s | FileCheck -enable-var-scope -check-prefixes=GCN %s3 4define amdgpu_kernel void @sext_i16_to_i32_uniform(ptr addrspace(1) %out, i16 %a, i32 %b) {5; GCN-LABEL: sext_i16_to_i32_uniform:6; GCN: ; %bb.0:7; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x98; GCN-NEXT: s_waitcnt lgkmcnt(0)9; GCN-NEXT: s_mov_b64 s[4:5], s[2:3]10; GCN-NEXT: s_sext_i32_i16 s4, s411; GCN-NEXT: s_add_i32 s4, s5, s412; GCN-NEXT: s_mov_b32 s3, 0xf00013; GCN-NEXT: s_mov_b32 s2, -114; GCN-NEXT: v_mov_b32_e32 v0, s415; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 016; GCN-NEXT: s_endpgm17 %sext = sext i16 %a to i3218 %res = add i32 %b, %sext19 store i32 %res, ptr addrspace(1) %out20 ret void21}22 23 24define amdgpu_kernel void @sext_i16_to_i64_uniform(ptr addrspace(1) %out, i16 %a, i64 %b) {25; GCN-LABEL: sext_i16_to_i64_uniform:26; GCN: ; %bb.0:27; GCN-NEXT: s_load_dword s6, s[4:5], 0xb28; GCN-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0xd29; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x930; GCN-NEXT: s_mov_b32 s3, 0xf00031; GCN-NEXT: s_mov_b32 s2, -132; GCN-NEXT: s_waitcnt lgkmcnt(0)33; GCN-NEXT: s_bfe_i64 s[4:5], s[6:7], 0x10000034; GCN-NEXT: s_add_u32 s4, s8, s435; GCN-NEXT: s_addc_u32 s5, s9, s536; GCN-NEXT: v_mov_b32_e32 v0, s437; GCN-NEXT: v_mov_b32_e32 v1, s538; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 039; GCN-NEXT: s_endpgm40 %sext = sext i16 %a to i6441 %res = add i64 %b, %sext42 store i64 %res, ptr addrspace(1) %out43 ret void44}45 46define amdgpu_kernel void @sext_i16_to_i32_divergent(ptr addrspace(1) %out, i16 %a, i32 %b) {47; GCN-LABEL: sext_i16_to_i32_divergent:48; GCN: ; %bb.0:49; GCN-NEXT: s_load_dword s6, s[4:5], 0xb50; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x951; GCN-NEXT: s_mov_b32 s3, 0xf00052; GCN-NEXT: s_mov_b32 s2, -153; GCN-NEXT: s_waitcnt lgkmcnt(0)54; GCN-NEXT: v_add_i32_e32 v0, vcc, s6, v055; GCN-NEXT: v_bfe_i32 v0, v0, 0, 1656; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 057; GCN-NEXT: s_endpgm58 %tid = call i32 @llvm.amdgcn.workitem.id.x()59 %tid.truncated = trunc i32 %tid to i1660 %divergent.a = add i16 %a, %tid.truncated61 %sext = sext i16 %divergent.a to i3262 store i32 %sext, ptr addrspace(1) %out63 ret void64}65 66 67define amdgpu_kernel void @sext_i16_to_i64_divergent(ptr addrspace(1) %out, i16 %a, i64 %b) {68; GCN-LABEL: sext_i16_to_i64_divergent:69; GCN: ; %bb.0:70; GCN-NEXT: s_load_dword s6, s[4:5], 0xb71; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x972; GCN-NEXT: s_mov_b32 s3, 0xf00073; GCN-NEXT: s_mov_b32 s2, -174; GCN-NEXT: s_waitcnt lgkmcnt(0)75; GCN-NEXT: v_add_i32_e32 v0, vcc, s6, v076; GCN-NEXT: v_bfe_i32 v0, v0, 0, 1677; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v078; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 079; GCN-NEXT: s_endpgm80 %tid = call i32 @llvm.amdgcn.workitem.id.x()81 %tid.truncated = trunc i32 %tid to i1682 %divergent.a = add i16 %a, %tid.truncated83 %sext = sext i16 %divergent.a to i6484 store i64 %sext, ptr addrspace(1) %out85 ret void86}87 88define amdgpu_kernel void @sext_i32_to_i64_uniform(ptr addrspace(1) %out, i32 %a, i64 %b) {89; GCN-LABEL: sext_i32_to_i64_uniform:90; GCN: ; %bb.0:91; GCN-NEXT: s_load_dword s8, s[4:5], 0xb92; GCN-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0xd93; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x994; GCN-NEXT: s_mov_b32 s3, 0xf00095; GCN-NEXT: s_mov_b32 s2, -196; GCN-NEXT: s_waitcnt lgkmcnt(0)97; GCN-NEXT: s_ashr_i32 s5, s8, 3198; GCN-NEXT: s_add_u32 s4, s6, s899; GCN-NEXT: s_addc_u32 s5, s7, s5100; GCN-NEXT: v_mov_b32_e32 v0, s4101; GCN-NEXT: v_mov_b32_e32 v1, s5102; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0103; GCN-NEXT: s_endpgm104 %sext = sext i32 %a to i64105 %res = add i64 %b, %sext106 store i64 %res, ptr addrspace(1) %out107 ret void108}109 110define amdgpu_kernel void @sext_i32_to_i64_divergent(ptr addrspace(1) %out, i32 %a, i64 %b) {111; GCN-LABEL: sext_i32_to_i64_divergent:112; GCN: ; %bb.0:113; GCN-NEXT: s_load_dword s6, s[4:5], 0xb114; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9115; GCN-NEXT: s_mov_b32 s3, 0xf000116; GCN-NEXT: s_mov_b32 s2, -1117; GCN-NEXT: s_waitcnt lgkmcnt(0)118; GCN-NEXT: v_add_i32_e32 v0, vcc, s6, v0119; GCN-NEXT: v_ashrrev_i32_e32 v1, 31, v0120; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0121; GCN-NEXT: s_endpgm122 %tid = call i32 @llvm.amdgcn.workitem.id.x()123 %divergent.a = add i32 %a, %tid124 %sext = sext i32 %divergent.a to i64125 store i64 %sext, ptr addrspace(1) %out126 ret void127}128 129declare i32 @llvm.amdgcn.workitem.id.x() #1130 131attributes #0 = { nounwind }132attributes #1 = { nounwind readnone speculatable }133