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1; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn < %s | FileCheck -check-prefix=SI %s2; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI %s3 4; Copy VGPR -> SGPR used twice as an instruction operand, which is then5; used in an REG_SEQUENCE that also needs to be handled.6 7; SI-LABEL: {{^}}test_dup_operands:8; SI: v_add_{{[iu]}}32_e329define amdgpu_kernel void @test_dup_operands(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in) {10 %a = load <2 x i32>, ptr addrspace(1) %in11 %lo = extractelement <2 x i32> %a, i32 012 %hi = extractelement <2 x i32> %a, i32 113 %add = add i32 %lo, %lo14 %vec0 = insertelement <2 x i32> poison, i32 %add, i32 015 %vec1 = insertelement <2 x i32> %vec0, i32 %hi, i32 116 store <2 x i32> %vec1, ptr addrspace(1) %out, align 817 ret void18}19 20