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1; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx1200 < %s | FileCheck %s --check-prefixes=CHECK,PACKED162; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=tahiti < %s | FileCheck %s --check-prefixes=CHECK,SPLIT163 4@global = addrspace(1) global i32 poison, align 45 6; The hardware initializes the registers received as arguments by entry points,7; so they will be counted even if unused.8 9; Vectors of i1 are always unpacked10 11; CHECK-LABEL: vec_of_i1:12; CHECK: TotalNumSgprs: 813define amdgpu_ps void @vec_of_i1(<8 x i1> inreg %v8i1) {14 ret void15}16 17; Vectors of i8 are always unpacked18 19; CHECK-LABEL: vec_of_i8:20; CHECK: TotalNumSgprs: 421define amdgpu_ps void @vec_of_i8(<4 x i8> inreg %v4i8) {22 ret void23}24 25; Vectors of 16-bit types are packed for newer architectures and unpacked for older ones.26 27; CHECK-LABEL: vec_of_16_bit_ty:28; PACKED16: TotalNumSgprs: 329; SPLIT16: TotalNumSgprs: 630define amdgpu_ps void @vec_of_16_bit_ty(<2 x i16> inreg %v2i16, <4 x half> inreg %v4half) {31 ret void32}33 34; CHECK-LABEL: buffer_fat_ptr:35; CHECK: TotalNumSgprs: 536define amdgpu_ps void @buffer_fat_ptr(ptr addrspace(7) inreg %p) {37 ret void38}39