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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -amdgpu-spill-sgpr-to-vgpr=true -verify-machineinstrs -run-pass=si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=SGPR_SPILL %s3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -amdgpu-spill-sgpr-to-vgpr=true -verify-machineinstrs --start-before=si-lower-sgpr-spills --stop-after=prologepilog -o - %s | FileCheck -check-prefix=PEI %s4# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -amdgpu-spill-sgpr-to-vgpr=true -passes=si-lower-sgpr-spills -o - %s | FileCheck -check-prefix=SGPR_SPILL %s5 6# After handling the SGPR spill to VGPR in SILowerSGPRSpills pass, replace the dead frame index in the DBG_VALUE instruction with reg 0.7# Otherwise, the test would crash during PEI while trying to replace the dead frame index.8--- |9 define amdgpu_kernel void @test() { ret void }10 11 !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !4, producer: "llvm", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, retainedTypes: !4)12 !1 = !DILocalVariable(name: "a", scope: !2, file: !4, line: 126, type: !6)13 !2 = distinct !DISubprogram(name: "test", scope: !4, file: !4, line: 1, type: !3, isLocal: false, isDefinition: true, scopeLine: 2, flags: DIFlagPrototyped, isOptimized: true, unit: !0, retainedNodes: !5)14 !3 = !DISubroutineType(types: !4)15 !4 = !{null}16 !5 = !{!1}17 !6 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 64, align: 32)18 !7 = !DIBasicType(name: "int", size: 32, align: 32, encoding: DW_ATE_signed)19 !8 = !DIExpression()20 !9 = !DILocation(line: 10, column: 9, scope: !2)21 22...23---24name: test25tracksRegLiveness: true26frameInfo:27 maxAlignment: 428stack:29 - { id: 0, type: spill-slot, size: 4, alignment: 4, stack-id: sgpr-spill }30machineFunctionInfo:31 maxKernArgAlign: 432 isEntryFunction: true33 waveLimiter: true34 scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99'35 stackPtrOffsetReg: '$sgpr32'36 frameOffsetReg: '$sgpr33'37 hasSpilledSGPRs: true38 argumentInfo:39 privateSegmentBuffer: { reg: '$sgpr0_sgpr1_sgpr2_sgpr3' }40 dispatchPtr: { reg: '$sgpr4_sgpr5' }41 kernargSegmentPtr: { reg: '$sgpr6_sgpr7' }42 workGroupIDX: { reg: '$sgpr8' }43 privateSegmentWaveByteOffset: { reg: '$sgpr9' }44body: |45 ; SGPR_SPILL-LABEL: name: test46 ; SGPR_SPILL: bb.0:47 ; SGPR_SPILL-NEXT: successors: %bb.1(0x80000000)48 ; SGPR_SPILL-NEXT: {{ $}}49 ; SGPR_SPILL-NEXT: renamable $sgpr10 = IMPLICIT_DEF50 ; SGPR_SPILL-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF51 ; SGPR_SPILL-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = SI_SPILL_S32_TO_VGPR killed $sgpr10, 0, [[DEF]]52 ; SGPR_SPILL-NEXT: DBG_VALUE $noreg, 053 ; SGPR_SPILL-NEXT: {{ $}}54 ; SGPR_SPILL-NEXT: bb.1:55 ; SGPR_SPILL-NEXT: $sgpr10 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 056 ; SGPR_SPILL-NEXT: S_ENDPGM 057 ;58 ; PEI-LABEL: name: test59 ; PEI: bb.0:60 ; PEI-NEXT: successors: %bb.1(0x80000000)61 ; PEI-NEXT: {{ $}}62 ; PEI-NEXT: renamable $sgpr10 = IMPLICIT_DEF63 ; PEI-NEXT: $vgpr0 = IMPLICIT_DEF64 ; PEI-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr10, 0, killed $vgpr065 ; PEI-NEXT: {{ $}}66 ; PEI-NEXT: bb.1:67 ; PEI-NEXT: $sgpr10 = SI_RESTORE_S32_FROM_VGPR killed $vgpr0, 068 ; PEI-NEXT: S_ENDPGM 069 bb.0:70 renamable $sgpr10 = IMPLICIT_DEF71 SI_SPILL_S32_SAVE killed $sgpr10, %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr3272 DBG_VALUE %stack.0, 0, !1, !8, debug-location !973 74 bb.1:75 renamable $sgpr10 = SI_SPILL_S32_RESTORE %stack.0, implicit $exec, implicit $sgpr96_sgpr97_sgpr98_sgpr99, implicit $sgpr3276 S_ENDPGM 077