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1; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 < %s | FileCheck %s2 3; This tests for a bug that caused a crash in SIRegisterInfo::spillSGPR()4; which was due to incorrect book-keeping of removed dead frame indices.5 6; CHECK-LABEL: {{^}}kernel0:7define amdgpu_kernel void @kernel0(ptr addrspace(1) %out, i32 %in) #1 {8 call void asm sideeffect "", "~{v[0:7]}" () #09 call void asm sideeffect "", "~{v[8:15]}" () #010 call void asm sideeffect "", "~{v[16:19]}"() #011 call void asm sideeffect "", "~{v[20:21]}"() #012 %val0 = call <2 x i32> asm sideeffect "; def $0", "=s" () #013 %val1 = call <4 x i32> asm sideeffect "; def $0", "=s" () #014 %val2 = call <8 x i32> asm sideeffect "; def $0", "=s" () #015 %val3 = call <16 x i32> asm sideeffect "; def $0", "=s" () #016 %val4 = call <2 x i32> asm sideeffect "; def $0", "=s" () #017 %val5 = call <4 x i32> asm sideeffect "; def $0", "=s" () #018 %val6 = call <8 x i32> asm sideeffect "; def $0", "=s" () #019 %val7 = call <16 x i32> asm sideeffect "; def $0", "=s" () #020 %val8 = call <2 x i32> asm sideeffect "; def $0", "=s" () #021 %val9 = call <4 x i32> asm sideeffect "; def $0", "=s" () #022 %val10 = call <8 x i32> asm sideeffect "; def $0", "=s" () #023 %val11 = call <16 x i32> asm sideeffect "; def $0", "=s" () #024 %val12 = call <2 x i32> asm sideeffect "; def $0", "=s" () #025 %val13 = call <4 x i32> asm sideeffect "; def $0", "=s" () #026 %val14 = call <8 x i32> asm sideeffect "; def $0", "=s" () #027 %val15 = call <16 x i32> asm sideeffect "; def $0", "=s" () #028 %val16 = call <2 x i32> asm sideeffect "; def $0", "=s" () #029 %val17 = call <4 x i32> asm sideeffect "; def $0", "=s" () #030 %val18 = call <8 x i32> asm sideeffect "; def $0", "=s" () #031 %val19 = call <16 x i32> asm sideeffect "; def $0", "=s" () #032 call void asm sideeffect "; use $0", "s"(<2 x i32> %val0) #033 call void asm sideeffect "; use $0", "s"(<4 x i32> %val1) #034 call void asm sideeffect "; use $0", "s"(<8 x i32> %val2) #035 call void asm sideeffect "; use $0", "s"(<16 x i32> %val3) #036 call void asm sideeffect "; use $0", "s"(<2 x i32> %val4) #037 call void asm sideeffect "; use $0", "s"(<4 x i32> %val5) #038 call void asm sideeffect "; use $0", "s"(<8 x i32> %val6) #039 call void asm sideeffect "; use $0", "s"(<16 x i32> %val7) #040 call void asm sideeffect "; use $0", "s"(<2 x i32> %val8) #041 call void asm sideeffect "; use $0", "s"(<4 x i32> %val9) #042 call void asm sideeffect "; use $0", "s"(<8 x i32> %val10) #043 call void asm sideeffect "; use $0", "s"(<16 x i32> %val11) #044 call void asm sideeffect "; use $0", "s"(<2 x i32> %val12) #045 call void asm sideeffect "; use $0", "s"(<4 x i32> %val13) #046 call void asm sideeffect "; use $0", "s"(<8 x i32> %val14) #047 call void asm sideeffect "; use $0", "s"(<16 x i32> %val15) #048 call void asm sideeffect "; use $0", "s"(<2 x i32> %val16) #049 call void asm sideeffect "; use $0", "s"(<4 x i32> %val17) #050 call void asm sideeffect "; use $0", "s"(<8 x i32> %val18) #051 call void asm sideeffect "; use $0", "s"(<16 x i32> %val19) #052 ret void53}54 55attributes #0 = { nounwind }56attributes #1 = { nounwind "amdgpu-waves-per-eu"="10,10" }57