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1# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -stress-regalloc=3 -run-pass=greedy,virtregrewriter,stack-slot-coloring -o - %s | FileCheck -check-prefixes=SHARE,GCN %s2# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -stress-regalloc=3 -run-pass=greedy,virtregrewriter,stack-slot-coloring -no-stack-slot-sharing -o - %s | FileCheck -check-prefixes=NOSHARE,GCN %s3 4# -run-pass is used to artifically avoid using split register allocation, which would avoid stressing StackSlotColoring.5 6 7# Make sure that stack slot coloring doesn't try to merge frame8# indexes used for SGPR spilling with those that aren't.9# Even when stack slot sharing was disabled, it was still moving the10# FI ID used for an SGPR spill to a normal frame index.11 12--- |13 14 define void @sgpr_spill_wrong_stack_id(ptr addrspace(1) nocapture readnone %arg, ptr addrspace(1) noalias %arg1) {15 bb:16 %tmp = load i32, ptr addrspace(1) null, align 417 call void @func(i32 poison)18 call void @func(i32 %tmp)19 unreachable20 }21 22 declare void @func(i32)23 24...25---26 27# GCN-LABEL: name: sgpr_spill_wrong_stack_id28# SHARE: stack:29# SHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,30# SHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,31# SHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }32# SHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,33# SHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,34# SHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }35# SHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,36# SHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,37# SHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }38 39# SHARE: SI_SPILL_S32_SAVE $sgpr32, %stack.2, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.2, addrspace 5)40# SHARE: SI_SPILL_V32_SAVE killed $vgpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)41# SHARE: SI_SPILL_S64_SAVE killed renamable $sgpr4_sgpr5, %stack.1, implicit $exec, implicit $sgpr32 :: (store (s64) into %stack.1, align 4, addrspace 5)42# SHARE: renamable $sgpr4_sgpr5 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s64) from %stack.1, align 4, addrspace 5)43# SHARE: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr4_sgpr5, @func, csr_amdgpu, implicit undef $vgpr044# SHARE: $sgpr32 = SI_SPILL_S32_RESTORE %stack.2, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.2, addrspace 5)45# SHARE: $vgpr0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)46# SHARE: renamable $sgpr4_sgpr5 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s64) from %stack.1, align 4, addrspace 5)47# SHARE: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr4_sgpr5, @func, csr_amdgpu, implicit $vgpr048# SHARE: $sgpr32 = SI_SPILL_S32_RESTORE %stack.2, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.2, addrspace 5)49 50# NOSHARE: stack:51# NOSHARE: - { id: 0, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,52# NOSHARE: stack-id: default, callee-saved-register: '', callee-saved-restored: true,53# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }54# NOSHARE: - { id: 1, name: '', type: spill-slot, offset: 0, size: 8, alignment: 4,55# NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,56# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }57# NOSHARE: - { id: 2, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,58# NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,59# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }60# NOSHARE: - { id: 3, name: '', type: spill-slot, offset: 0, size: 4, alignment: 4,61# NOSHARE: stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,62# NOSHARE: debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }63 64# NOSHARE: SI_SPILL_S32_SAVE $sgpr32, %stack.2, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.2, addrspace 5)65# NOSHARE: SI_SPILL_V32_SAVE killed $vgpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)66# NOSHARE: SI_SPILL_S64_SAVE killed renamable $sgpr4_sgpr5, %stack.1, implicit $exec, implicit $sgpr32 :: (store (s64) into %stack.1, align 4, addrspace 5)67# NOSHARE: renamable $sgpr4_sgpr5 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s64) from %stack.1, align 4, addrspace 5)68# NOSHARE: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr4_sgpr5, @func, csr_amdgpu, implicit undef $vgpr069# NOSHARE: $sgpr32 = SI_SPILL_S32_RESTORE %stack.2, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.2, addrspace 5)70# NOSHARE: SI_SPILL_S32_SAVE $sgpr32, %stack.3, implicit $exec, implicit $sgpr32 :: (store (s32) into %stack.3, addrspace 5)71# NOSHARE: $vgpr0 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)72# NOSHARE: renamable $sgpr4_sgpr5 = SI_SPILL_S64_RESTORE %stack.1, implicit $exec, implicit $sgpr32 :: (load (s64) from %stack.1, align 4, addrspace 5)73# NOSHARE: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr4_sgpr5, @func, csr_amdgpu, implicit $vgpr074# NOSHARE: $sgpr32 = SI_SPILL_S32_RESTORE %stack.3, implicit $exec, implicit $sgpr32 :: (load (s32) from %stack.3, addrspace 5)75 76...77 78name: sgpr_spill_wrong_stack_id79tracksRegLiveness: true80frameInfo:81 adjustsStack: true82 hasCalls: true83machineFunctionInfo:84 scratchRSrcReg: $sgpr0_sgpr1_sgpr2_sgpr385 frameOffsetReg: $sgpr3286 stackPtrOffsetReg: $sgpr3287body: |88 bb.0:89 %0:sreg_32_xm0 = COPY $sgpr3290 %1:vreg_64 = IMPLICIT_DEF91 %2:vgpr_32 = FLAT_LOAD_DWORD %1, 0, 0, implicit $exec, implicit $flat_scr92 %3:sreg_64 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @func + 4, target-flags(amdgpu-rel32-hi) @func + 4, implicit-def dead $scc93 ADJCALLSTACKUP 0, 0, implicit-def $scc, implicit-def $sgpr32, implicit $sgpr32, implicit $sgpr3294 dead $sgpr30_sgpr31 = SI_CALL %3, @func, csr_amdgpu, implicit undef $vgpr095 $sgpr32 = COPY %096 %4:sreg_32_xm0 = COPY $sgpr3297 ADJCALLSTACKDOWN 0, 0, implicit-def $scc, implicit-def $sgpr32, implicit $sgpr32, implicit $sgpr3298 ADJCALLSTACKUP 0, 0, implicit-def $scc, implicit-def $sgpr32, implicit $sgpr32, implicit $sgpr3299 $vgpr0 = COPY %2100 dead $sgpr30_sgpr31 = SI_CALL %3, @func, csr_amdgpu, implicit killed $vgpr0101 $sgpr32 = COPY %4102 ADJCALLSTACKDOWN 0, 0, implicit-def $scc, implicit-def $sgpr32, implicit $sgpr32, implicit $sgpr32103 104...105