32 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 42# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass=si-lower-sgpr-spills -o - %s | FileCheck %s3 4# Test that the si-lower-sgpr-spills pass does not defeference a5# machine instruction iterator that is equal to end().6 7---8name: empty_prolog_block9stack:10 - { id: 0, name: '', type: spill-slot, offset: 0, size: 32, alignment: 4,11 stack-id: sgpr-spill, callee-saved-register: '', callee-saved-restored: true,12 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }13machineFunctionInfo:14 hasSpilledSGPRs: true15body: |16 ; CHECK-LABEL: name: empty_prolog_block17 ; CHECK: bb.0:18 ; CHECK-NEXT: successors: %bb.1(0x80000000)19 ; CHECK-NEXT: liveins: $sgpr020 ; CHECK-NEXT: {{ $}}21 ; CHECK-NEXT: bb.1:22 ; CHECK-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF23 ; CHECK-NEXT: $sgpr0 = SI_RESTORE_S32_FROM_VGPR [[DEF]], 024 ; CHECK-NEXT: S_ENDPGM 025 bb.0:26 liveins: $sgpr027 bb.1:28 renamable $sgpr0 = SI_SPILL_S32_RESTORE %stack.0, implicit $exec, implicit $sgpr3229 S_ENDPGM 030 31...32