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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefix=GCN %s3 4; Extract the high bit of the 1st quarter5define amdgpu_kernel void @v_uextract_bit_31_i128(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {6; GCN-LABEL: v_uextract_bit_31_i128:7; GCN: ; %bb.0:8; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x99; GCN-NEXT: s_ashr_i32 s3, s2, 3110; GCN-NEXT: s_lshl_b64 s[0:1], s[2:3], 411; GCN-NEXT: v_mov_b32_e32 v5, s112; GCN-NEXT: s_mov_b32 s11, 0xf00013; GCN-NEXT: s_mov_b32 s10, 014; GCN-NEXT: s_waitcnt lgkmcnt(0)15; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]16; GCN-NEXT: v_mov_b32_e32 v4, s017; GCN-NEXT: buffer_load_dword v0, v[4:5], s[8:11], 0 addr6418; GCN-NEXT: v_mov_b32_e32 v1, 019; GCN-NEXT: v_mov_b32_e32 v2, v120; GCN-NEXT: s_mov_b64 s[6:7], s[10:11]21; GCN-NEXT: v_mov_b32_e32 v3, v122; GCN-NEXT: s_waitcnt vmcnt(0)23; GCN-NEXT: v_lshrrev_b32_e32 v0, 31, v024; GCN-NEXT: buffer_store_dwordx4 v[0:3], v[4:5], s[4:7], 0 addr6425; GCN-NEXT: s_endpgm26 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()27 %in.gep = getelementptr i128, ptr addrspace(1) %in, i32 %id.x28 %out.gep = getelementptr i128, ptr addrspace(1) %out, i32 %id.x29 %ld.64 = load i128, ptr addrspace(1) %in.gep30 %srl = lshr i128 %ld.64, 3131 %bit = and i128 %srl, 132 store i128 %bit, ptr addrspace(1) %out.gep33 ret void34}35 36; Extract the high bit of the 2nd quarter37define amdgpu_kernel void @v_uextract_bit_63_i128(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {38; GCN-LABEL: v_uextract_bit_63_i128:39; GCN: ; %bb.0:40; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x941; GCN-NEXT: s_mov_b32 s7, 0xf00042; GCN-NEXT: s_mov_b32 s6, 043; GCN-NEXT: v_lshlrev_b32_e32 v4, 4, v044; GCN-NEXT: v_mov_b32_e32 v5, 045; GCN-NEXT: s_waitcnt lgkmcnt(0)46; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]47; GCN-NEXT: s_mov_b64 s[10:11], s[6:7]48; GCN-NEXT: buffer_load_dword v0, v[4:5], s[8:11], 0 addr64 offset:449; GCN-NEXT: v_mov_b32_e32 v1, v550; GCN-NEXT: v_mov_b32_e32 v2, v551; GCN-NEXT: s_mov_b64 s[4:5], s[0:1]52; GCN-NEXT: v_mov_b32_e32 v3, v553; GCN-NEXT: s_waitcnt vmcnt(0)54; GCN-NEXT: v_lshrrev_b32_e32 v0, 31, v055; GCN-NEXT: buffer_store_dwordx4 v[0:3], v[4:5], s[4:7], 0 addr6456; GCN-NEXT: s_endpgm57 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()58 %in.gep = getelementptr i128, ptr addrspace(1) %in, i32 %id.x59 %out.gep = getelementptr i128, ptr addrspace(1) %out, i32 %id.x60 %ld.64 = load i128, ptr addrspace(1) %in.gep61 %srl = lshr i128 %ld.64, 6362 %bit = and i128 %srl, 163 store i128 %bit, ptr addrspace(1) %out.gep64 ret void65}66 67; Extract the high bit of the 3rd quarter68define amdgpu_kernel void @v_uextract_bit_95_i128(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {69; GCN-LABEL: v_uextract_bit_95_i128:70; GCN: ; %bb.0:71; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x972; GCN-NEXT: s_ashr_i32 s3, s2, 3173; GCN-NEXT: s_lshl_b64 s[0:1], s[2:3], 474; GCN-NEXT: s_mov_b32 s3, 0xf00075; GCN-NEXT: s_mov_b32 s2, 076; GCN-NEXT: v_mov_b32_e32 v5, s177; GCN-NEXT: s_waitcnt lgkmcnt(0)78; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]79; GCN-NEXT: s_mov_b64 s[10:11], s[2:3]80; GCN-NEXT: v_mov_b32_e32 v4, s081; GCN-NEXT: buffer_load_dword v0, v[4:5], s[8:11], 0 addr64 offset:882; GCN-NEXT: v_mov_b32_e32 v1, 083; GCN-NEXT: v_mov_b32_e32 v2, v184; GCN-NEXT: s_mov_b64 s[0:1], s[4:5]85; GCN-NEXT: v_mov_b32_e32 v3, v186; GCN-NEXT: s_waitcnt vmcnt(0)87; GCN-NEXT: v_lshrrev_b32_e32 v0, 31, v088; GCN-NEXT: buffer_store_dwordx4 v[0:3], v[4:5], s[0:3], 0 addr6489; GCN-NEXT: s_endpgm90 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()91 %in.gep = getelementptr i128, ptr addrspace(1) %in, i32 %id.x92 %out.gep = getelementptr i128, ptr addrspace(1) %out, i32 %id.x93 %ld.64 = load i128, ptr addrspace(1) %in.gep94 %srl = lshr i128 %ld.64, 9595 %bit = and i128 %srl, 196 store i128 %bit, ptr addrspace(1) %out.gep97 ret void98}99 100; Extract the high bit of the 4th quarter101define amdgpu_kernel void @v_uextract_bit_127_i128(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {102; GCN-LABEL: v_uextract_bit_127_i128:103; GCN: ; %bb.0:104; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9105; GCN-NEXT: s_mov_b32 s7, 0xf000106; GCN-NEXT: s_mov_b32 s6, 0107; GCN-NEXT: v_lshlrev_b32_e32 v4, 4, v0108; GCN-NEXT: v_mov_b32_e32 v5, 0109; GCN-NEXT: s_waitcnt lgkmcnt(0)110; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]111; GCN-NEXT: s_mov_b64 s[10:11], s[6:7]112; GCN-NEXT: buffer_load_dword v0, v[4:5], s[8:11], 0 addr64 offset:12113; GCN-NEXT: v_mov_b32_e32 v1, v5114; GCN-NEXT: v_mov_b32_e32 v2, v5115; GCN-NEXT: s_mov_b64 s[4:5], s[0:1]116; GCN-NEXT: v_mov_b32_e32 v3, v5117; GCN-NEXT: s_waitcnt vmcnt(0)118; GCN-NEXT: v_lshrrev_b32_e32 v0, 31, v0119; GCN-NEXT: buffer_store_dwordx4 v[0:3], v[4:5], s[4:7], 0 addr64120; GCN-NEXT: s_endpgm121 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()122 %in.gep = getelementptr i128, ptr addrspace(1) %in, i32 %id.x123 %out.gep = getelementptr i128, ptr addrspace(1) %out, i32 %id.x124 %ld.64 = load i128, ptr addrspace(1) %in.gep125 %srl = lshr i128 %ld.64, 127126 %bit = and i128 %srl, 1127 store i128 %bit, ptr addrspace(1) %out.gep128 ret void129}130 131; Spans more than 2 dword boundaries132define amdgpu_kernel void @v_uextract_bit_34_100_i128(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {133; GCN-LABEL: v_uextract_bit_34_100_i128:134; GCN: ; %bb.0:135; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9136; GCN-NEXT: s_mov_b32 s7, 0xf000137; GCN-NEXT: s_mov_b32 s6, 0138; GCN-NEXT: v_lshlrev_b32_e32 v8, 4, v0139; GCN-NEXT: v_mov_b32_e32 v9, 0140; GCN-NEXT: s_waitcnt lgkmcnt(0)141; GCN-NEXT: s_mov_b64 s[4:5], s[2:3]142; GCN-NEXT: buffer_load_dwordx4 v[0:3], v[8:9], s[4:7], 0 addr64143; GCN-NEXT: s_mov_b64 s[2:3], s[6:7]144; GCN-NEXT: v_mov_b32_e32 v7, v9145; GCN-NEXT: s_waitcnt vmcnt(0)146; GCN-NEXT: v_lshl_b64 v[4:5], v[2:3], 30147; GCN-NEXT: v_lshrrev_b32_e32 v0, 2, v1148; GCN-NEXT: v_bfe_u32 v6, v3, 2, 2149; GCN-NEXT: v_or_b32_e32 v4, v0, v4150; GCN-NEXT: buffer_store_dwordx4 v[4:7], v[8:9], s[0:3], 0 addr64151; GCN-NEXT: s_endpgm152 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()153 %in.gep = getelementptr i128, ptr addrspace(1) %in, i32 %id.x154 %out.gep = getelementptr i128, ptr addrspace(1) %out, i32 %id.x155 %ld.64 = load i128, ptr addrspace(1) %in.gep156 %srl = lshr i128 %ld.64, 34157 %bit = and i128 %srl, 73786976294838206463158 store i128 %bit, ptr addrspace(1) %out.gep159 ret void160}161 162declare i32 @llvm.amdgcn.workitem.id.x() #0163 164declare i32 @llvm.amdgcn.workgroup.id.x() #0165 166attributes #0 = { nounwind readnone }167attributes #1 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }168