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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -enable-var-scope -check-prefix=GCN %s3; FIXME: Fails with -enable-var-scope4 5; Make sure 64-bit BFE pattern does a 32-bit BFE on the relevant half.6 7; Extract the high bit of the low half8define amdgpu_kernel void @v_uextract_bit_31_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {9; GCN-LABEL: v_uextract_bit_31_i64:10; GCN: ; %bb.0:11; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x912; GCN-NEXT: s_ashr_i32 s3, s2, 3113; GCN-NEXT: s_lshl_b64 s[0:1], s[2:3], 314; GCN-NEXT: v_mov_b32_e32 v0, s015; GCN-NEXT: s_mov_b32 s11, 0xf00016; GCN-NEXT: s_mov_b32 s10, 017; GCN-NEXT: s_waitcnt lgkmcnt(0)18; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]19; GCN-NEXT: v_mov_b32_e32 v1, s120; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr6421; GCN-NEXT: s_mov_b64 s[6:7], s[10:11]22; GCN-NEXT: v_mov_b32_e32 v3, 023; GCN-NEXT: s_waitcnt vmcnt(0)24; GCN-NEXT: v_lshrrev_b32_e32 v2, 31, v225; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr6426; GCN-NEXT: s_endpgm27 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()28 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x29 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x30 %ld.64 = load i64, ptr addrspace(1) %in.gep31 %srl = lshr i64 %ld.64, 3132 %bit = and i64 %srl, 133 store i64 %bit, ptr addrspace(1) %out.gep34 ret void35}36 37; Extract the high bit of the high half38define amdgpu_kernel void @v_uextract_bit_63_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {39; GCN-LABEL: v_uextract_bit_63_i64:40; GCN: ; %bb.0:41; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x942; GCN-NEXT: s_mov_b32 s7, 0xf00043; GCN-NEXT: s_mov_b32 s6, 044; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v045; GCN-NEXT: v_mov_b32_e32 v1, 046; GCN-NEXT: s_waitcnt lgkmcnt(0)47; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]48; GCN-NEXT: s_mov_b64 s[10:11], s[6:7]49; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 offset:450; GCN-NEXT: s_mov_b64 s[4:5], s[0:1]51; GCN-NEXT: v_mov_b32_e32 v3, v152; GCN-NEXT: s_waitcnt vmcnt(0)53; GCN-NEXT: v_lshrrev_b32_e32 v2, 31, v254; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr6455; GCN-NEXT: s_endpgm56 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()57 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x58 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x59 %ld.64 = load i64, ptr addrspace(1) %in.gep60 %srl = lshr i64 %ld.64, 6361 %bit = and i64 %srl, 162 store i64 %bit, ptr addrspace(1) %out.gep63 ret void64}65 66define amdgpu_kernel void @v_uextract_bit_1_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {67; GCN-LABEL: v_uextract_bit_1_i64:68; GCN: ; %bb.0:69; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x970; GCN-NEXT: s_ashr_i32 s3, s2, 3171; GCN-NEXT: s_lshl_b64 s[0:1], s[2:3], 372; GCN-NEXT: v_mov_b32_e32 v0, s073; GCN-NEXT: s_mov_b32 s11, 0xf00074; GCN-NEXT: s_mov_b32 s10, 075; GCN-NEXT: s_waitcnt lgkmcnt(0)76; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]77; GCN-NEXT: v_mov_b32_e32 v1, s178; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr6479; GCN-NEXT: s_mov_b64 s[6:7], s[10:11]80; GCN-NEXT: v_mov_b32_e32 v3, 081; GCN-NEXT: s_waitcnt vmcnt(0)82; GCN-NEXT: v_bfe_u32 v2, v2, 1, 183; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr6484; GCN-NEXT: s_endpgm85 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()86 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x87 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x88 %ld.64 = load i64, ptr addrspace(1) %in.gep89 %srl = lshr i64 %ld.64, 190 %bit = and i64 %srl, 191 store i64 %bit, ptr addrspace(1) %out.gep92 ret void93}94 95define amdgpu_kernel void @v_uextract_bit_20_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {96; GCN-LABEL: v_uextract_bit_20_i64:97; GCN: ; %bb.0:98; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x999; GCN-NEXT: s_ashr_i32 s3, s2, 31100; GCN-NEXT: s_lshl_b64 s[0:1], s[2:3], 3101; GCN-NEXT: v_mov_b32_e32 v0, s0102; GCN-NEXT: s_mov_b32 s11, 0xf000103; GCN-NEXT: s_mov_b32 s10, 0104; GCN-NEXT: s_waitcnt lgkmcnt(0)105; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]106; GCN-NEXT: v_mov_b32_e32 v1, s1107; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64108; GCN-NEXT: s_mov_b64 s[6:7], s[10:11]109; GCN-NEXT: v_mov_b32_e32 v3, 0110; GCN-NEXT: s_waitcnt vmcnt(0)111; GCN-NEXT: v_bfe_u32 v2, v2, 20, 1112; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64113; GCN-NEXT: s_endpgm114 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()115 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x116 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x117 %ld.64 = load i64, ptr addrspace(1) %in.gep118 %srl = lshr i64 %ld.64, 20119 %bit = and i64 %srl, 1120 store i64 %bit, ptr addrspace(1) %out.gep121 ret void122}123 124define amdgpu_kernel void @v_uextract_bit_32_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {125; GCN-LABEL: v_uextract_bit_32_i64:126; GCN: ; %bb.0:127; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9128; GCN-NEXT: s_mov_b32 s7, 0xf000129; GCN-NEXT: s_mov_b32 s6, 0130; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0131; GCN-NEXT: v_mov_b32_e32 v1, 0132; GCN-NEXT: s_waitcnt lgkmcnt(0)133; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]134; GCN-NEXT: s_mov_b64 s[10:11], s[6:7]135; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 offset:4136; GCN-NEXT: s_mov_b64 s[4:5], s[0:1]137; GCN-NEXT: v_mov_b32_e32 v3, v1138; GCN-NEXT: s_waitcnt vmcnt(0)139; GCN-NEXT: v_and_b32_e32 v2, 1, v2140; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64141; GCN-NEXT: s_endpgm142 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()143 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x144 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x145 %ld.64 = load i64, ptr addrspace(1) %in.gep146 %srl = lshr i64 %ld.64, 32147 %bit = and i64 %srl, 1148 store i64 %bit, ptr addrspace(1) %out.gep149 ret void150}151 152define amdgpu_kernel void @v_uextract_bit_33_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {153; GCN-LABEL: v_uextract_bit_33_i64:154; GCN: ; %bb.0:155; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9156; GCN-NEXT: s_mov_b32 s7, 0xf000157; GCN-NEXT: s_mov_b32 s6, 0158; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0159; GCN-NEXT: v_mov_b32_e32 v1, 0160; GCN-NEXT: s_waitcnt lgkmcnt(0)161; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]162; GCN-NEXT: s_mov_b64 s[10:11], s[6:7]163; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 offset:4164; GCN-NEXT: s_mov_b64 s[4:5], s[0:1]165; GCN-NEXT: v_mov_b32_e32 v3, v1166; GCN-NEXT: s_waitcnt vmcnt(0)167; GCN-NEXT: v_bfe_u32 v2, v2, 1, 1168; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64169; GCN-NEXT: s_endpgm170 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()171 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x172 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x173 %ld.64 = load i64, ptr addrspace(1) %in.gep174 %srl = lshr i64 %ld.64, 33175 %bit = and i64 %srl, 1176 store i64 %bit, ptr addrspace(1) %out.gep177 ret void178}179 180define amdgpu_kernel void @v_uextract_bit_20_21_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {181; GCN-LABEL: v_uextract_bit_20_21_i64:182; GCN: ; %bb.0:183; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9184; GCN-NEXT: s_ashr_i32 s3, s2, 31185; GCN-NEXT: s_lshl_b64 s[0:1], s[2:3], 3186; GCN-NEXT: v_mov_b32_e32 v0, s0187; GCN-NEXT: s_mov_b32 s11, 0xf000188; GCN-NEXT: s_mov_b32 s10, 0189; GCN-NEXT: s_waitcnt lgkmcnt(0)190; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]191; GCN-NEXT: v_mov_b32_e32 v1, s1192; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64193; GCN-NEXT: s_mov_b64 s[6:7], s[10:11]194; GCN-NEXT: v_mov_b32_e32 v3, 0195; GCN-NEXT: s_waitcnt vmcnt(0)196; GCN-NEXT: v_bfe_u32 v2, v2, 20, 2197; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64198; GCN-NEXT: s_endpgm199 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()200 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x201 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x202 %ld.64 = load i64, ptr addrspace(1) %in.gep203 %srl = lshr i64 %ld.64, 20204 %bit = and i64 %srl, 3205 store i64 %bit, ptr addrspace(1) %out.gep206 ret void207}208 209define amdgpu_kernel void @v_uextract_bit_1_30_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {210; GCN-LABEL: v_uextract_bit_1_30_i64:211; GCN: ; %bb.0:212; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9213; GCN-NEXT: s_ashr_i32 s3, s2, 31214; GCN-NEXT: s_lshl_b64 s[0:1], s[2:3], 3215; GCN-NEXT: v_mov_b32_e32 v0, s0216; GCN-NEXT: s_mov_b32 s11, 0xf000217; GCN-NEXT: s_mov_b32 s10, 0218; GCN-NEXT: s_waitcnt lgkmcnt(0)219; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]220; GCN-NEXT: v_mov_b32_e32 v1, s1221; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64222; GCN-NEXT: s_mov_b64 s[6:7], s[10:11]223; GCN-NEXT: v_mov_b32_e32 v3, 0224; GCN-NEXT: s_waitcnt vmcnt(0)225; GCN-NEXT: v_bfe_u32 v2, v2, 1, 30226; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64227; GCN-NEXT: s_endpgm228 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()229 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x230 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x231 %ld.64 = load i64, ptr addrspace(1) %in.gep232 %srl = lshr i64 %ld.64, 1233 %bit = and i64 %srl, 1073741823234 store i64 %bit, ptr addrspace(1) %out.gep235 ret void236}237 238define amdgpu_kernel void @v_uextract_bit_1_31_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {239; GCN-LABEL: v_uextract_bit_1_31_i64:240; GCN: ; %bb.0:241; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9242; GCN-NEXT: s_ashr_i32 s3, s2, 31243; GCN-NEXT: s_lshl_b64 s[0:1], s[2:3], 3244; GCN-NEXT: v_mov_b32_e32 v0, s0245; GCN-NEXT: s_mov_b32 s11, 0xf000246; GCN-NEXT: s_mov_b32 s10, 0247; GCN-NEXT: s_waitcnt lgkmcnt(0)248; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]249; GCN-NEXT: v_mov_b32_e32 v1, s1250; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64251; GCN-NEXT: s_mov_b64 s[6:7], s[10:11]252; GCN-NEXT: v_mov_b32_e32 v3, 0253; GCN-NEXT: s_waitcnt vmcnt(0)254; GCN-NEXT: v_lshrrev_b32_e32 v2, 1, v2255; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64256; GCN-NEXT: s_endpgm257 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()258 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x259 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x260 %ld.64 = load i64, ptr addrspace(1) %in.gep261 %srl = lshr i64 %ld.64, 1262 %bit = and i64 %srl, 2147483647263 store i64 %bit, ptr addrspace(1) %out.gep264 ret void265}266 267; Spans the dword boundary, so requires full shift.268; Truncated after the shift, so only low shift result is used.269define amdgpu_kernel void @v_uextract_bit_31_32_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {270; GCN-LABEL: v_uextract_bit_31_32_i64:271; GCN: ; %bb.0:272; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9273; GCN-NEXT: s_ashr_i32 s3, s2, 31274; GCN-NEXT: s_lshl_b64 s[0:1], s[2:3], 3275; GCN-NEXT: v_mov_b32_e32 v0, s0276; GCN-NEXT: s_mov_b32 s11, 0xf000277; GCN-NEXT: s_mov_b32 s10, 0278; GCN-NEXT: s_waitcnt lgkmcnt(0)279; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]280; GCN-NEXT: v_mov_b32_e32 v1, s1281; GCN-NEXT: buffer_load_dwordx2 v[2:3], v[0:1], s[8:11], 0 addr64282; GCN-NEXT: s_mov_b64 s[6:7], s[10:11]283; GCN-NEXT: s_waitcnt vmcnt(0)284; GCN-NEXT: v_lshr_b64 v[2:3], v[2:3], 31285; GCN-NEXT: v_mov_b32_e32 v3, 0286; GCN-NEXT: v_and_b32_e32 v2, 3, v2287; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64288; GCN-NEXT: s_endpgm289 %id.x = tail call i32 @llvm.amdgcn.workgroup.id.x()290 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x291 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x292 %ld.64 = load i64, ptr addrspace(1) %in.gep293 %srl = lshr i64 %ld.64, 31294 %bit = and i64 %srl, 3295 store i64 %bit, ptr addrspace(1) %out.gep296 ret void297}298 299define amdgpu_kernel void @v_uextract_bit_32_33_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {300; GCN-LABEL: v_uextract_bit_32_33_i64:301; GCN: ; %bb.0:302; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9303; GCN-NEXT: s_mov_b32 s7, 0xf000304; GCN-NEXT: s_mov_b32 s6, 0305; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0306; GCN-NEXT: v_mov_b32_e32 v1, 0307; GCN-NEXT: s_waitcnt lgkmcnt(0)308; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]309; GCN-NEXT: s_mov_b64 s[10:11], s[6:7]310; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 offset:4311; GCN-NEXT: s_mov_b64 s[4:5], s[0:1]312; GCN-NEXT: v_mov_b32_e32 v3, v1313; GCN-NEXT: s_waitcnt vmcnt(0)314; GCN-NEXT: v_bfe_u32 v2, v2, 1, 2315; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64316; GCN-NEXT: s_endpgm317 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()318 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x319 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x320 %ld.64 = load i64, ptr addrspace(1) %in.gep321 %srl = lshr i64 %ld.64, 33322 %bit = and i64 %srl, 3323 store i64 %bit, ptr addrspace(1) %out.gep324 ret void325}326 327define amdgpu_kernel void @v_uextract_bit_30_60_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {328; GCN-LABEL: v_uextract_bit_30_60_i64:329; GCN: ; %bb.0:330; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9331; GCN-NEXT: s_mov_b32 s7, 0xf000332; GCN-NEXT: s_mov_b32 s6, 0333; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0334; GCN-NEXT: v_mov_b32_e32 v1, 0335; GCN-NEXT: s_waitcnt lgkmcnt(0)336; GCN-NEXT: s_mov_b64 s[4:5], s[2:3]337; GCN-NEXT: buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64338; GCN-NEXT: s_mov_b64 s[2:3], s[6:7]339; GCN-NEXT: s_waitcnt vmcnt(0)340; GCN-NEXT: v_alignbit_b32 v2, v3, v2, 30341; GCN-NEXT: v_and_b32_e32 v2, 0x3fffffff, v2342; GCN-NEXT: v_mov_b32_e32 v3, v1343; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64344; GCN-NEXT: s_endpgm345 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()346 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x347 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x348 %ld.64 = load i64, ptr addrspace(1) %in.gep349 %srl = lshr i64 %ld.64, 30350 %bit = and i64 %srl, 1073741823351 store i64 %bit, ptr addrspace(1) %out.gep352 ret void353}354 355define amdgpu_kernel void @v_uextract_bit_33_63_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {356; GCN-LABEL: v_uextract_bit_33_63_i64:357; GCN: ; %bb.0:358; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9359; GCN-NEXT: s_mov_b32 s7, 0xf000360; GCN-NEXT: s_mov_b32 s6, 0361; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0362; GCN-NEXT: v_mov_b32_e32 v1, 0363; GCN-NEXT: s_waitcnt lgkmcnt(0)364; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]365; GCN-NEXT: s_mov_b64 s[10:11], s[6:7]366; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 offset:4367; GCN-NEXT: s_mov_b64 s[4:5], s[0:1]368; GCN-NEXT: v_mov_b32_e32 v3, v1369; GCN-NEXT: s_waitcnt vmcnt(0)370; GCN-NEXT: v_bfe_u32 v2, v2, 1, 30371; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64372; GCN-NEXT: s_endpgm373 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()374 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x375 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x376 %ld.64 = load i64, ptr addrspace(1) %in.gep377 %srl = lshr i64 %ld.64, 33378 %bit = and i64 %srl, 1073741823379 store i64 %bit, ptr addrspace(1) %out.gep380 ret void381}382 383define amdgpu_kernel void @v_uextract_bit_31_63_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {384; GCN-LABEL: v_uextract_bit_31_63_i64:385; GCN: ; %bb.0:386; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9387; GCN-NEXT: s_mov_b32 s7, 0xf000388; GCN-NEXT: s_mov_b32 s10, 0389; GCN-NEXT: s_mov_b32 s11, s7390; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0391; GCN-NEXT: s_waitcnt lgkmcnt(0)392; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]393; GCN-NEXT: v_mov_b32_e32 v1, 0394; GCN-NEXT: buffer_load_dwordx2 v[2:3], v[0:1], s[8:11], 0 addr64395; GCN-NEXT: s_mov_b32 s6, -1396; GCN-NEXT: s_mov_b32 s4, s0397; GCN-NEXT: s_mov_b32 s5, s1398; GCN-NEXT: s_waitcnt vmcnt(0)399; GCN-NEXT: v_alignbit_b32 v0, v3, v2, 31400; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0401; GCN-NEXT: s_endpgm402 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()403 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x404 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x405 %ld.64 = load i64, ptr addrspace(1) %in.gep406 %srl = lshr i64 %ld.64, 31407 %and = and i64 %srl, 4294967295408 store i64 %and, ptr addrspace(1) %out409 ret void410}411 412; trunc applied before and mask413define amdgpu_kernel void @v_uextract_bit_31_i64_trunc_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {414; GCN-LABEL: v_uextract_bit_31_i64_trunc_i32:415; GCN: ; %bb.0:416; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9417; GCN-NEXT: s_mov_b32 s7, 0xf000418; GCN-NEXT: s_mov_b32 s6, 0419; GCN-NEXT: v_lshlrev_b32_e32 v1, 3, v0420; GCN-NEXT: v_mov_b32_e32 v2, 0421; GCN-NEXT: s_waitcnt lgkmcnt(0)422; GCN-NEXT: s_mov_b64 s[4:5], s[2:3]423; GCN-NEXT: buffer_load_dword v3, v[1:2], s[4:7], 0 addr64424; GCN-NEXT: s_mov_b64 s[2:3], s[6:7]425; GCN-NEXT: v_lshlrev_b32_e32 v1, 2, v0426; GCN-NEXT: s_waitcnt vmcnt(0)427; GCN-NEXT: v_lshrrev_b32_e32 v0, 31, v3428; GCN-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64429; GCN-NEXT: s_endpgm430 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()431 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x432 %out.gep = getelementptr i32, ptr addrspace(1) %out, i32 %id.x433 %ld.64 = load i64, ptr addrspace(1) %in.gep434 %srl = lshr i64 %ld.64, 31435 %trunc = trunc i64 %srl to i32436 %bit = and i32 %trunc, 1437 store i32 %bit, ptr addrspace(1) %out.gep438 ret void439}440 441define amdgpu_kernel void @v_uextract_bit_3_i64_trunc_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {442; GCN-LABEL: v_uextract_bit_3_i64_trunc_i32:443; GCN: ; %bb.0:444; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9445; GCN-NEXT: s_mov_b32 s7, 0xf000446; GCN-NEXT: s_mov_b32 s6, 0447; GCN-NEXT: v_lshlrev_b32_e32 v1, 3, v0448; GCN-NEXT: v_mov_b32_e32 v2, 0449; GCN-NEXT: s_waitcnt lgkmcnt(0)450; GCN-NEXT: s_mov_b64 s[4:5], s[2:3]451; GCN-NEXT: buffer_load_dword v3, v[1:2], s[4:7], 0 addr64452; GCN-NEXT: s_mov_b64 s[2:3], s[6:7]453; GCN-NEXT: v_lshlrev_b32_e32 v1, 2, v0454; GCN-NEXT: s_waitcnt vmcnt(0)455; GCN-NEXT: v_bfe_u32 v0, v3, 3, 1456; GCN-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64457; GCN-NEXT: s_endpgm458 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()459 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x460 %out.gep = getelementptr i32, ptr addrspace(1) %out, i32 %id.x461 %ld.64 = load i64, ptr addrspace(1) %in.gep462 %srl = lshr i64 %ld.64, 3463 %trunc = trunc i64 %srl to i32464 %bit = and i32 %trunc, 1465 store i32 %bit, ptr addrspace(1) %out.gep466 ret void467}468 469define amdgpu_kernel void @v_uextract_bit_33_i64_trunc_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {470; GCN-LABEL: v_uextract_bit_33_i64_trunc_i32:471; GCN: ; %bb.0:472; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9473; GCN-NEXT: s_mov_b32 s7, 0xf000474; GCN-NEXT: s_mov_b32 s6, 0475; GCN-NEXT: v_lshlrev_b32_e32 v1, 3, v0476; GCN-NEXT: v_mov_b32_e32 v2, 0477; GCN-NEXT: s_waitcnt lgkmcnt(0)478; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]479; GCN-NEXT: s_mov_b64 s[10:11], s[6:7]480; GCN-NEXT: buffer_load_dword v3, v[1:2], s[8:11], 0 addr64 offset:4481; GCN-NEXT: s_mov_b64 s[4:5], s[0:1]482; GCN-NEXT: v_lshlrev_b32_e32 v1, 2, v0483; GCN-NEXT: s_waitcnt vmcnt(0)484; GCN-NEXT: v_bfe_u32 v0, v3, 1, 1485; GCN-NEXT: buffer_store_dword v0, v[1:2], s[4:7], 0 addr64486; GCN-NEXT: s_endpgm487 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()488 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x489 %out.gep = getelementptr i32, ptr addrspace(1) %out, i32 %id.x490 %ld.64 = load i64, ptr addrspace(1) %in.gep491 %srl = lshr i64 %ld.64, 33492 %trunc = trunc i64 %srl to i32493 %bit = and i32 %trunc, 1494 store i32 %bit, ptr addrspace(1) %out.gep495 ret void496}497 498define amdgpu_kernel void @v_uextract_bit_31_32_i64_trunc_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {499; GCN-LABEL: v_uextract_bit_31_32_i64_trunc_i32:500; GCN: ; %bb.0:501; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9502; GCN-NEXT: s_mov_b32 s7, 0xf000503; GCN-NEXT: s_mov_b32 s6, 0504; GCN-NEXT: v_lshlrev_b32_e32 v1, 3, v0505; GCN-NEXT: v_mov_b32_e32 v2, 0506; GCN-NEXT: s_waitcnt lgkmcnt(0)507; GCN-NEXT: s_mov_b64 s[4:5], s[2:3]508; GCN-NEXT: buffer_load_dwordx2 v[3:4], v[1:2], s[4:7], 0 addr64509; GCN-NEXT: v_lshlrev_b32_e32 v1, 2, v0510; GCN-NEXT: s_mov_b64 s[2:3], s[6:7]511; GCN-NEXT: s_waitcnt vmcnt(0)512; GCN-NEXT: v_alignbit_b32 v0, v4, v3, 31513; GCN-NEXT: v_and_b32_e32 v0, 3, v0514; GCN-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64515; GCN-NEXT: s_endpgm516 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()517 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x518 %out.gep = getelementptr i32, ptr addrspace(1) %out, i32 %id.x519 %ld.64 = load i64, ptr addrspace(1) %in.gep520 %srl = lshr i64 %ld.64, 31521 %trunc = trunc i64 %srl to i32522 %bit = and i32 %trunc, 3523 store i32 %bit, ptr addrspace(1) %out.gep524 ret void525}526 527define amdgpu_kernel void @and_not_mask_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {528; GCN-LABEL: and_not_mask_i64:529; GCN: ; %bb.0:530; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9531; GCN-NEXT: s_mov_b32 s7, 0xf000532; GCN-NEXT: s_mov_b32 s6, 0533; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0534; GCN-NEXT: v_mov_b32_e32 v1, 0535; GCN-NEXT: s_waitcnt lgkmcnt(0)536; GCN-NEXT: s_mov_b64 s[4:5], s[2:3]537; GCN-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64538; GCN-NEXT: s_mov_b64 s[2:3], s[6:7]539; GCN-NEXT: v_mov_b32_e32 v3, v1540; GCN-NEXT: s_waitcnt vmcnt(0)541; GCN-NEXT: v_lshrrev_b32_e32 v2, 20, v2542; GCN-NEXT: v_and_b32_e32 v2, 4, v2543; GCN-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64544; GCN-NEXT: s_endpgm545 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()546 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x547 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x548 %ld.64 = load i64, ptr addrspace(1) %in.gep549 %srl = lshr i64 %ld.64, 20550 %bit = and i64 %srl, 4551 store i64 %bit, ptr addrspace(1) %out.gep552 ret void553}554 555; The instruction count is the same with/without hasOneUse, but556; keeping the 32-bit and has a smaller encoding size than the bfe.557define amdgpu_kernel void @v_uextract_bit_27_29_multi_use_shift_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {558; GCN-LABEL: v_uextract_bit_27_29_multi_use_shift_i64:559; GCN: ; %bb.0:560; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9561; GCN-NEXT: s_mov_b32 s7, 0xf000562; GCN-NEXT: s_mov_b32 s10, 0563; GCN-NEXT: s_mov_b32 s11, s7564; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0565; GCN-NEXT: s_waitcnt lgkmcnt(0)566; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]567; GCN-NEXT: v_mov_b32_e32 v1, 0568; GCN-NEXT: buffer_load_dwordx2 v[2:3], v[0:1], s[8:11], 0 addr64569; GCN-NEXT: s_mov_b32 s6, -1570; GCN-NEXT: s_mov_b32 s4, s0571; GCN-NEXT: s_mov_b32 s5, s1572; GCN-NEXT: s_waitcnt vmcnt(0)573; GCN-NEXT: v_lshr_b64 v[2:3], v[2:3], 27574; GCN-NEXT: v_and_b32_e32 v0, 3, v2575; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0576; GCN-NEXT: s_waitcnt vmcnt(0)577; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0578; GCN-NEXT: s_waitcnt vmcnt(0)579; GCN-NEXT: s_endpgm580 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()581 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x582 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x583 %ld.64 = load i64, ptr addrspace(1) %in.gep584 %srl = lshr i64 %ld.64, 27585 %bit = and i64 %srl, 3586 store volatile i64 %srl, ptr addrspace(1) %out587 store volatile i64 %bit, ptr addrspace(1) %out588 ret void589}590 591define amdgpu_kernel void @v_uextract_bit_34_37_multi_use_shift_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) #1 {592; GCN-LABEL: v_uextract_bit_34_37_multi_use_shift_i64:593; GCN: ; %bb.0:594; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9595; GCN-NEXT: s_mov_b32 s7, 0xf000596; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0597; GCN-NEXT: v_mov_b32_e32 v1, 0598; GCN-NEXT: s_mov_b32 s10, 0599; GCN-NEXT: s_mov_b32 s11, s7600; GCN-NEXT: s_waitcnt lgkmcnt(0)601; GCN-NEXT: s_mov_b64 s[8:9], s[2:3]602; GCN-NEXT: buffer_load_dword v2, v[0:1], s[8:11], 0 addr64 offset:4603; GCN-NEXT: s_mov_b32 s6, -1604; GCN-NEXT: s_mov_b32 s4, s0605; GCN-NEXT: s_mov_b32 s5, s1606; GCN-NEXT: v_mov_b32_e32 v3, v1607; GCN-NEXT: s_waitcnt vmcnt(0)608; GCN-NEXT: v_lshrrev_b32_e32 v0, 2, v2609; GCN-NEXT: v_bfe_u32 v2, v2, 2, 3610; GCN-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0611; GCN-NEXT: s_waitcnt vmcnt(0)612; GCN-NEXT: buffer_store_dwordx2 v[2:3], off, s[4:7], 0613; GCN-NEXT: s_waitcnt vmcnt(0)614; GCN-NEXT: s_endpgm615 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()616 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x617 %out.gep = getelementptr i64, ptr addrspace(1) %out, i32 %id.x618 %ld.64 = load i64, ptr addrspace(1) %in.gep619 %srl = lshr i64 %ld.64, 34620 %bit = and i64 %srl, 7621 store volatile i64 %srl, ptr addrspace(1) %out622 store volatile i64 %bit, ptr addrspace(1) %out623 ret void624}625 626define amdgpu_kernel void @v_uextract_bit_33_36_use_upper_half_shift_i64(ptr addrspace(1) %out0, ptr addrspace(1) %out1, ptr addrspace(1) %in) #1 {627; GCN-LABEL: v_uextract_bit_33_36_use_upper_half_shift_i64:628; GCN: ; %bb.0:629; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd630; GCN-NEXT: s_mov_b32 s3, 0xf000631; GCN-NEXT: s_mov_b32 s2, 0632; GCN-NEXT: v_lshlrev_b32_e32 v1, 3, v0633; GCN-NEXT: v_mov_b32_e32 v2, 0634; GCN-NEXT: s_mov_b64 s[6:7], s[2:3]635; GCN-NEXT: s_waitcnt lgkmcnt(0)636; GCN-NEXT: buffer_load_dword v5, v[1:2], s[4:7], 0 addr64 offset:4637; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9638; GCN-NEXT: v_mov_b32_e32 v6, v2639; GCN-NEXT: s_mov_b64 s[10:11], s[2:3]640; GCN-NEXT: v_lshlrev_b32_e32 v3, 2, v0641; GCN-NEXT: v_mov_b32_e32 v4, v2642; GCN-NEXT: s_waitcnt lgkmcnt(0)643; GCN-NEXT: s_mov_b64 s[0:1], s[4:5]644; GCN-NEXT: s_mov_b64 s[8:9], s[6:7]645; GCN-NEXT: s_waitcnt vmcnt(0)646; GCN-NEXT: v_bfe_u32 v5, v5, 1, 3647; GCN-NEXT: buffer_store_dwordx2 v[5:6], v[1:2], s[0:3], 0 addr64648; GCN-NEXT: s_waitcnt vmcnt(0)649; GCN-NEXT: buffer_store_dword v2, v[3:4], s[8:11], 0 addr64650; GCN-NEXT: s_waitcnt vmcnt(0)651; GCN-NEXT: s_endpgm652 %id.x = tail call i32 @llvm.amdgcn.workitem.id.x()653 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %id.x654 %out0.gep = getelementptr i64, ptr addrspace(1) %out0, i32 %id.x655 %out1.gep = getelementptr i32, ptr addrspace(1) %out1, i32 %id.x656 %ld.64 = load i64, ptr addrspace(1) %in.gep657 %srl = lshr i64 %ld.64, 33658 %bit = and i64 %srl, 7659 store volatile i64 %bit, ptr addrspace(1) %out0.gep660 661 %srl.srl32 = lshr i64 %srl, 32662 %srl.hi = trunc i64 %srl.srl32 to i32663 store volatile i32 %srl.hi, ptr addrspace(1) %out1.gep664 ret void665}666 667declare i32 @llvm.amdgcn.workitem.id.x() #0668declare i32 @llvm.amdgcn.workgroup.id.x() #0669 670attributes #0 = { nounwind readnone }671attributes #1 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }672