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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 22; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -amdgpu-atomic-optimizer-strategy=None < %s | FileCheck %s -check-prefix=GCN3 4define amdgpu_cs void @should_not_hoist_set_inactive(<4 x i32> inreg %i14, i32 inreg %v, i32 %lane, i32 %f, i32 %f2) #0 {5; GCN-LABEL: should_not_hoist_set_inactive:6; GCN: ; %bb.0: ; %.entry7; GCN-NEXT: v_cmp_eq_u32_e64 s5, 0, v08; GCN-NEXT: v_cmp_ne_u32_e64 s6, 0, v29; GCN-NEXT: s_mov_b32 s7, 010; GCN-NEXT: v_cmp_gt_i32_e32 vcc_lo, 3, v111; GCN-NEXT: s_branch .LBB0_212; GCN-NEXT: .LBB0_1: ; %bb413; GCN-NEXT: ; in Loop: Header=BB0_2 Depth=114; GCN-NEXT: s_waitcnt_depctr depctr_vm_vsrc(0)15; GCN-NEXT: s_or_b32 exec_lo, exec_lo, s816; GCN-NEXT: s_and_b32 s8, exec_lo, s617; GCN-NEXT: s_or_b32 s7, s8, s718; GCN-NEXT: s_andn2_b32 exec_lo, exec_lo, s719; GCN-NEXT: s_cbranch_execz .LBB0_520; GCN-NEXT: .LBB0_2: ; %bb21; GCN-NEXT: ; =>This Inner Loop Header: Depth=122; GCN-NEXT: s_and_saveexec_b32 s8, vcc_lo23; GCN-NEXT: s_cbranch_execz .LBB0_124; GCN-NEXT: ; %bb.3: ; %bb125; GCN-NEXT: ; in Loop: Header=BB0_2 Depth=126; GCN-NEXT: s_or_saveexec_b32 s9, -127; GCN-NEXT: v_cndmask_b32_e64 v3, 0, s4, s928; GCN-NEXT: v_mov_b32_e32 v4, 029; GCN-NEXT: v_mov_b32_dpp v4, v3 row_xmask:1 row_mask:0xf bank_mask:0xf30; GCN-NEXT: s_mov_b32 exec_lo, s931; GCN-NEXT: v_mov_b32_e32 v0, v432; GCN-NEXT: s_and_b32 exec_lo, exec_lo, s533; GCN-NEXT: s_cbranch_execz .LBB0_134; GCN-NEXT: ; %bb.4: ; %bb235; GCN-NEXT: ; in Loop: Header=BB0_2 Depth=136; GCN-NEXT: buffer_atomic_add v0, off, s[0:3], 037; GCN-NEXT: s_branch .LBB0_138; GCN-NEXT: .LBB0_5: ; %bb539; GCN-NEXT: s_endpgm40.entry:41 br label %bb42 43bb:44 %i17 = icmp slt i32 %f, 345 br i1 %i17, label %bb1, label %bb446 47bb1:48 %i25 = call i32 @llvm.amdgcn.set.inactive.i32(i32 %v, i32 0)49 %i26 = call i32 @llvm.amdgcn.update.dpp.i32(i32 0, i32 %i25, i32 353, i32 15, i32 15, i1 false)50 %i38 = call i32 @llvm.amdgcn.strict.wwm.i32(i32 %i26)51 %i39 = icmp eq i32 %lane, 052 br i1 %i39, label %bb2, label %bb353 54bb2:55 %i41 = call i32 @llvm.amdgcn.raw.buffer.atomic.add.i32(i32 %i38, <4 x i32> %i14, i32 0, i32 0, i32 0)56 br label %bb357 58bb3:59 br label %bb460 61bb4:62 %exit = icmp eq i32 %f2, 063 br i1 %exit, label %bb, label %bb564 65bb5:66 ret void67}68 69declare i32 @llvm.amdgcn.set.inactive.i32(i32, i32)70declare i32 @llvm.amdgcn.update.dpp.i32(i32, i32, i32 immarg, i32 immarg, i32 immarg, i1 immarg)71declare i32 @llvm.amdgcn.strict.wwm.i32(i32)72declare i32 @llvm.amdgcn.raw.buffer.atomic.add.i32(i32, <4 x i32>, i32, i32, i32 immarg)73