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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=amdgcn -mcpu=verde | FileCheck --check-prefix=SI %s3; RUN: llc < %s -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global | FileCheck --check-prefix=FLAT %s4 5define amdgpu_ps float @uniform_kill(float %a, i32 %b, float %c) {6; SI-LABEL: uniform_kill:7; SI: ; %bb.0: ; %entry8; SI-NEXT: v_cvt_i32_f32_e32 v0, v09; SI-NEXT: s_mov_b64 s[0:1], exec10; SI-NEXT: s_mov_b64 s[2:3], -111; SI-NEXT: v_or_b32_e32 v0, v1, v012; SI-NEXT: v_and_b32_e32 v0, 1, v013; SI-NEXT: v_cmp_eq_u32_e32 vcc, 1, v014; SI-NEXT: s_and_saveexec_b64 s[4:5], vcc15; SI-NEXT: ; %bb.1: ; %if116; SI-NEXT: s_xor_b64 s[2:3], exec, -117; SI-NEXT: ; %bb.2: ; %endif118; SI-NEXT: s_or_b64 exec, exec, s[4:5]19; SI-NEXT: s_wqm_b64 s[4:5], s[2:3]20; SI-NEXT: s_andn2_b64 s[4:5], exec, s[4:5]21; SI-NEXT: s_andn2_b64 s[0:1], s[0:1], s[4:5]22; SI-NEXT: s_cbranch_scc0 .LBB0_623; SI-NEXT: ; %bb.3: ; %endif124; SI-NEXT: s_and_b64 exec, exec, s[0:1]25; SI-NEXT: v_mov_b32_e32 v0, 026; SI-NEXT: s_and_saveexec_b64 s[0:1], s[2:3]27; SI-NEXT: s_cbranch_execz .LBB0_528; SI-NEXT: ; %bb.4: ; %if229; SI-NEXT: s_mov_b32 s3, 030; SI-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x031; SI-NEXT: v_add_f32_e32 v0, 1.0, v232; SI-NEXT: v_cvt_i32_f32_e32 v0, v033; SI-NEXT: s_waitcnt lgkmcnt(0)34; SI-NEXT: s_mov_b32 s6, s435; SI-NEXT: s_mov_b32 s7, s536; SI-NEXT: buffer_atomic_swap v0, off, s[4:7], 0 offset:4 glc37; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0)38; SI-NEXT: v_cvt_f32_i32_e32 v0, v039; SI-NEXT: .LBB0_5: ; %endif240; SI-NEXT: s_or_b64 exec, exec, s[0:1]41; SI-NEXT: s_branch .LBB0_742; SI-NEXT: .LBB0_6:43; SI-NEXT: s_mov_b64 exec, 044; SI-NEXT: exp null off, off, off, off done vm45; SI-NEXT: s_endpgm46; SI-NEXT: .LBB0_7:47;48; FLAT-LABEL: uniform_kill:49; FLAT: ; %bb.0: ; %entry50; FLAT-NEXT: v_cvt_i32_f32_e32 v0, v051; FLAT-NEXT: s_mov_b64 s[0:1], exec52; FLAT-NEXT: s_mov_b64 s[2:3], -153; FLAT-NEXT: v_or_b32_e32 v0, v1, v054; FLAT-NEXT: v_and_b32_e32 v0, 1, v055; FLAT-NEXT: v_cmp_eq_u32_e32 vcc, 1, v056; FLAT-NEXT: s_and_saveexec_b64 s[4:5], vcc57; FLAT-NEXT: ; %bb.1: ; %if158; FLAT-NEXT: s_xor_b64 s[2:3], exec, -159; FLAT-NEXT: ; %bb.2: ; %endif160; FLAT-NEXT: s_or_b64 exec, exec, s[4:5]61; FLAT-NEXT: s_wqm_b64 s[4:5], s[2:3]62; FLAT-NEXT: s_andn2_b64 s[4:5], exec, s[4:5]63; FLAT-NEXT: s_andn2_b64 s[0:1], s[0:1], s[4:5]64; FLAT-NEXT: s_cbranch_scc0 .LBB0_665; FLAT-NEXT: ; %bb.3: ; %endif166; FLAT-NEXT: s_and_b64 exec, exec, s[0:1]67; FLAT-NEXT: v_mov_b32_e32 v0, 068; FLAT-NEXT: s_and_saveexec_b64 s[0:1], s[2:3]69; FLAT-NEXT: s_cbranch_execz .LBB0_570; FLAT-NEXT: ; %bb.4: ; %if271; FLAT-NEXT: s_mov_b32 s3, 072; FLAT-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x073; FLAT-NEXT: v_add_f32_e32 v0, 1.0, v274; FLAT-NEXT: v_cvt_i32_f32_e32 v0, v075; FLAT-NEXT: s_waitcnt lgkmcnt(0)76; FLAT-NEXT: s_mov_b32 s6, s477; FLAT-NEXT: s_mov_b32 s7, s578; FLAT-NEXT: buffer_atomic_swap v0, off, s[4:7], 0 offset:4 glc79; FLAT-NEXT: s_waitcnt vmcnt(0)80; FLAT-NEXT: v_cvt_f32_i32_e32 v0, v081; FLAT-NEXT: .LBB0_5: ; %endif282; FLAT-NEXT: s_or_b64 exec, exec, s[0:1]83; FLAT-NEXT: s_branch .LBB0_784; FLAT-NEXT: .LBB0_6:85; FLAT-NEXT: s_mov_b64 exec, 086; FLAT-NEXT: exp null off, off, off, off done vm87; FLAT-NEXT: s_endpgm88; FLAT-NEXT: .LBB0_7:89entry:90 %.1 = fptosi float %a to i3291 %.2 = or i32 %b, %.192 %.3 = and i32 %.2, 193 %.not = icmp eq i32 %.3, 094 br i1 %.not, label %endif1, label %if195 96if1:97 br i1 false, label %if3, label %endif198 99if3:100 br label %endif1101 102endif1:103 %.0 = phi i1 [ false, %if3 ], [ false, %if1 ], [ true, %entry ]104 %.4 = call i1 @llvm.amdgcn.wqm.vote(i1 %.0)105 ; This kill must be uniformly executed106 call void @llvm.amdgcn.kill(i1 %.4)107 %.test0 = fadd nsz arcp float %c, 1.0108 %.test1 = fptosi float %.test0 to i32109 br i1 %.0, label %if2, label %endif2110 111if2:112 %.5 = getelementptr inbounds ptr addrspace(8), ptr addrspace(6) poison, i32 31, !amdgpu.uniform !0113 %.6 = load ptr addrspace(8), ptr addrspace(6) %.5, align 16, !invariant.load !0114 %.7 = call i32 @llvm.amdgcn.raw.ptr.buffer.atomic.swap.i32(i32 %.test1, ptr addrspace(8) %.6, i32 4, i32 0, i32 0)115 %.8 = sitofp i32 %.7 to float116 br label %endif2117 118endif2:119 %.9 = phi float [ %.8, %if2 ], [ 0.0, %endif1 ]120 ret float %.9121}122 123 124declare i32 @llvm.amdgcn.raw.ptr.buffer.atomic.swap.i32(i32, ptr addrspace(8), i32, i32, i32 immarg) #2125declare i1 @llvm.amdgcn.wqm.vote(i1) #3126declare void @llvm.amdgcn.kill(i1) #4127declare float @llvm.amdgcn.wqm.f32(float) #1128 129attributes #1 = { nounwind readnone speculatable willreturn }130attributes #2 = { nounwind willreturn memory(argmem: readwrite) }131attributes #3 = { convergent nounwind readnone willreturn }132attributes #4 = { nounwind }133 134!0 = !{}135