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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: opt -mtriple=amdgcn-amd-amdhsa -p simplifycfg,amdgpu-unify-divergent-exit-nodes %s -S -o - | FileCheck %s --check-prefix=OPT3; RUN: llc -mtriple=amdgcn-amd-amdhsa %s -o - | FileCheck %s --check-prefix=ISA4 5define void @nested_inf_loop(i1 %0, i1 %1) {6; OPT-LABEL: define void @nested_inf_loop(7; OPT-SAME: i1 [[TMP0:%.*]], i1 [[TMP1:%.*]]) {8; OPT-NEXT: [[BB:.*:]]9; OPT-NEXT: br label %[[BB1:.*]]10; OPT: [[BB1]]:11; OPT-NEXT: [[BRMERGE:%.*]] = select i1 [[TMP0]], i1 true, i1 [[TMP1]]12; OPT-NEXT: br i1 [[BRMERGE]], label %[[BB1]], label %[[INFLOOP:.*]]13; OPT: [[INFLOOP]]:14; OPT-NEXT: br i1 true, label %[[INFLOOP]], label %[[DUMMYRETURNBLOCK:.*]]15; OPT: [[DUMMYRETURNBLOCK]]:16; OPT-NEXT: ret void17;18; ISA-LABEL: nested_inf_loop:19; ISA: ; %bb.0: ; %BB20; ISA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)21; ISA-NEXT: v_and_b32_e32 v1, 1, v122; ISA-NEXT: v_and_b32_e32 v0, 1, v023; ISA-NEXT: v_cmp_eq_u32_e64 s[4:5], 1, v124; ISA-NEXT: v_cmp_ne_u32_e64 s[6:7], 1, v025; ISA-NEXT: s_mov_b64 s[8:9], 026; ISA-NEXT: .LBB0_1: ; %BB127; ISA-NEXT: ; =>This Loop Header: Depth=128; ISA-NEXT: ; Child Loop BB0_3 Depth 229; ISA-NEXT: s_and_b64 s[10:11], exec, s[6:7]30; ISA-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9]31; ISA-NEXT: s_andn2_b64 exec, exec, s[8:9]32; ISA-NEXT: s_cbranch_execnz .LBB0_133; ISA-NEXT: ; %bb.2: ; %BB234; ISA-NEXT: ; in Loop: Header=BB0_1 Depth=135; ISA-NEXT: s_or_b64 exec, exec, s[8:9]36; ISA-NEXT: s_mov_b64 s[8:9], 037; ISA-NEXT: .LBB0_3: ; %BB438; ISA-NEXT: ; Parent Loop BB0_1 Depth=139; ISA-NEXT: ; => This Inner Loop Header: Depth=240; ISA-NEXT: s_and_b64 s[10:11], exec, s[4:5]41; ISA-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9]42; ISA-NEXT: s_andn2_b64 exec, exec, s[8:9]43; ISA-NEXT: s_cbranch_execnz .LBB0_344; ISA-NEXT: ; %bb.4: ; %loop.exit.guard45; ISA-NEXT: ; in Loop: Header=BB0_1 Depth=146; ISA-NEXT: s_or_b64 exec, exec, s[8:9]47; ISA-NEXT: s_mov_b64 vcc, 048; ISA-NEXT: s_mov_b64 s[8:9], 049; ISA-NEXT: s_branch .LBB0_150; ISA-NEXT: ; %bb.5: ; %DummyReturnBlock51; ISA-NEXT: s_setpc_b64 s[30:31]52BB:53 br label %BB154 55BB1:56 br i1 %0, label %BB3, label %BB257 58BB2:59 br label %BB460 61BB4:62 br i1 %1, label %BB3, label %BB463 64BB3:65 br label %BB166}67 68define void @nested_inf_loop_callbr(i32 %0, i32 %1) {69; OPT-LABEL: define void @nested_inf_loop_callbr(70; OPT-SAME: i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {71; OPT-NEXT: [[BB:.*:]]72; OPT-NEXT: callbr void asm "", ""()73; OPT-NEXT: to label %[[BB1:.*]] []74; OPT: [[BB1]]:75; OPT-NEXT: callbr void asm "", "r,!i"(i32 [[TMP0]])76; OPT-NEXT: to label %[[BB3:.*]] [label %BB2]77; OPT: [[BB2:.*:]]78; OPT-NEXT: callbr void asm "", ""()79; OPT-NEXT: to label %[[BB4:.*]] []80; OPT: [[BB4]]:81; OPT-NEXT: br i1 true, label %[[TRANSITIONBLOCK:.*]], label %[[DUMMYRETURNBLOCK:.*]]82; OPT: [[TRANSITIONBLOCK]]:83; OPT-NEXT: callbr void asm "", "r,!i"(i32 [[TMP1]])84; OPT-NEXT: to label %[[BB3]] [label %BB4]85; OPT: [[BB3]]:86; OPT-NEXT: callbr void asm "", ""()87; OPT-NEXT: to label %[[BB1]] []88; OPT: [[DUMMYRETURNBLOCK]]:89; OPT-NEXT: ret void90;91; ISA-LABEL: nested_inf_loop_callbr:92; ISA: ; %bb.0: ; %BB93; ISA-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)94; ISA-NEXT: ;;#ASMSTART95; ISA-NEXT: ;;#ASMEND96; ISA-NEXT: ; implicit-def: $sgpr6_sgpr797; ISA-NEXT: ; implicit-def: $sgpr4_sgpr598; ISA-NEXT: .LBB1_1: ; %BB199; ISA-NEXT: ; =>This Inner Loop Header: Depth=1100; ISA-NEXT: ;;#ASMSTART101; ISA-NEXT: ;;#ASMEND102; ISA-NEXT: s_andn2_b64 s[6:7], s[6:7], exec103; ISA-NEXT: s_and_b64 s[8:9], s[4:5], exec104; ISA-NEXT: s_or_b64 s[6:7], s[6:7], s[8:9]105; ISA-NEXT: .LBB1_2: ; %BB3106; ISA-NEXT: ; in Loop: Header=BB1_1 Depth=1107; ISA-NEXT: ;;#ASMSTART108; ISA-NEXT: ;;#ASMEND109; ISA-NEXT: s_andn2_b64 s[4:5], s[4:5], exec110; ISA-NEXT: s_and_b64 s[8:9], s[6:7], exec111; ISA-NEXT: s_or_b64 s[4:5], s[4:5], s[8:9]112; ISA-NEXT: s_branch .LBB1_1113; ISA-NEXT: .LBB1_3: ; Inline asm indirect target114; ISA-NEXT: ; %BB2115; ISA-NEXT: ; in Loop: Header=BB1_1 Depth=1116; ISA-NEXT: ; Label of block must be emitted117; ISA-NEXT: ;;#ASMSTART118; ISA-NEXT: ;;#ASMEND119; ISA-NEXT: s_mov_b64 s[6:7], -1120; ISA-NEXT: s_and_saveexec_b64 s[8:9], s[4:5]121; ISA-NEXT: s_cbranch_execz .LBB1_5122; ISA-NEXT: ; %bb.4: ; %TransitionBlock.target.BB3123; ISA-NEXT: ; in Loop: Header=BB1_1 Depth=1124; ISA-NEXT: s_xor_b64 s[6:7], exec, -1125; ISA-NEXT: .LBB1_5: ; %loop.exit.guard126; ISA-NEXT: ; in Loop: Header=BB1_1 Depth=1127; ISA-NEXT: s_or_b64 exec, exec, s[8:9]128; ISA-NEXT: s_and_b64 vcc, exec, s[6:7]129; ISA-NEXT: s_mov_b64 s[6:7], 0130; ISA-NEXT: s_cbranch_vccz .LBB1_2131; ISA-NEXT: ; %bb.6: ; %DummyReturnBlock132; ISA-NEXT: s_setpc_b64 s[30:31]133BB:134 callbr void asm "", ""() to label %BB1 []135 136BB1:137 callbr void asm "", "r,!i"(i32 %0) to label %BB3 [label %BB2]138 139BB2:140 callbr void asm "", ""() to label %BB4 []141 142BB4:143 callbr void asm "", "r,!i"(i32 %1) to label %BB3 [label %BB4]144 145BB3:146 callbr void asm "", ""() to label %BB1 []147}148