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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -run-pass=si-fold-operands -o - %s | FileCheck %s3# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -run-pass=si-fold-operands -o - %s | FileCheck %s4 5---6name: s_mov_b32_0_copy_vgpr_reg_sequence_128_splat_copy_to_agpr7tracksRegLiveness: true8body: |9 bb.0:10 ; CHECK-LABEL: name: s_mov_b32_0_copy_vgpr_reg_sequence_128_splat_copy_to_agpr11 ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec12 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub313 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec14 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec15 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec16 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec17 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub318 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]19 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr320 %0:sgpr_32 = S_MOV_B32 021 %1:vgpr_32 = COPY killed %022 %2:vreg_128 = REG_SEQUENCE %1, %subreg.sub0, %1, %subreg.sub1, %1, %subreg.sub2, %1, %subreg.sub323 %3:areg_128 = COPY %224 $agpr0_agpr1_agpr2_agpr3 = COPY %325 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr326 27...28 29---30name: v_mov_b32_0_vgpr_reg_sequence_128_splat_copy_to_agpr31tracksRegLiveness: true32body: |33 bb.0:34 ; CHECK-LABEL: name: v_mov_b32_0_vgpr_reg_sequence_128_splat_copy_to_agpr35 ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec36 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub337 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec38 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec39 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec40 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec41 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub342 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]43 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr344 %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec45 %1:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %0, %subreg.sub346 %2:areg_128 = COPY killed %147 $agpr0_agpr1_agpr2_agpr3 = COPY %248 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr349 50...51 52---53name: v_mov_b32_0_vgpr_reg_sequence_128_splat_copy_to_agpr_multi_use54tracksRegLiveness: true55body: |56 bb.0:57 ; CHECK-LABEL: name: v_mov_b32_0_vgpr_reg_sequence_128_splat_copy_to_agpr_multi_use58 ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec59 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub360 ; CHECK-NEXT: S_NOP 0, implicit [[REG_SEQUENCE]]61 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec62 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec63 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec64 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec65 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub366 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]67 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr368 %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec69 %1:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %0, %subreg.sub370 S_NOP 0, implicit %171 %2:areg_128 = COPY killed %172 $agpr0_agpr1_agpr2_agpr3 = COPY %273 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr374 75...76 77---78name: s_mov_b32_literal_copy_vgpr_reg_sequence_128_splat_copy_to_agpr79tracksRegLiveness: true80body: |81 bb.0:82 ; CHECK-LABEL: name: s_mov_b32_literal_copy_vgpr_reg_sequence_128_splat_copy_to_agpr83 ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 999, implicit $exec84 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub385 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub386 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]87 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr388 %0:sgpr_32 = S_MOV_B32 99989 %1:vgpr_32 = COPY %090 %2:vreg_128 = REG_SEQUENCE %1, %subreg.sub0, %1, %subreg.sub1, %1, %subreg.sub2, %1, %subreg.sub391 %3:areg_128 = COPY %292 $agpr0_agpr1_agpr2_agpr3 = COPY %393 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr394 95...96 97---98name: v_mov_b32_literal_vgpr_reg_sequence_128_splat_copy_to_agpr99tracksRegLiveness: true100body: |101 bb.0:102 ; CHECK-LABEL: name: v_mov_b32_literal_vgpr_reg_sequence_128_splat_copy_to_agpr103 ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 999, implicit $exec104 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub3105 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub3106 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]107 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3108 %0:vgpr_32 = V_MOV_B32_e32 999, implicit $exec109 %1:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %0, %subreg.sub3110 %2:areg_128 = COPY killed %1111 $agpr0_agpr1_agpr2_agpr3 = COPY %2112 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3113 114...115 116---117name: v_mov_b32_literal_vgpr_reg_sequence_128_splat_copy_to_agpr_multi_use118tracksRegLiveness: true119body: |120 bb.0:121 ; CHECK-LABEL: name: v_mov_b32_literal_vgpr_reg_sequence_128_splat_copy_to_agpr_multi_use122 ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 999, implicit $exec123 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub3124 ; CHECK-NEXT: S_NOP 0, implicit [[REG_SEQUENCE]]125 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub3126 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]127 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3128 %0:vgpr_32 = V_MOV_B32_e32 999, implicit $exec129 %1:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %0, %subreg.sub3130 S_NOP 0, implicit %1131 %2:areg_128 = COPY killed %1132 $agpr0_agpr1_agpr2_agpr3 = COPY %2133 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3134 135...136 137---138name: s_mov_b32_0_splat_sgpr_128_copy_vgpr_copy_agpr_multi_use_reg_sequence_copy139tracksRegLiveness: true140body: |141 bb.0:142 ; CHECK-LABEL: name: s_mov_b32_0_splat_sgpr_128_copy_vgpr_copy_agpr_multi_use_reg_sequence_copy143 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0144 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[S_MOV_B32_]], %subreg.sub0, killed [[S_MOV_B32_]], %subreg.sub1, killed [[S_MOV_B32_]], %subreg.sub2, killed [[S_MOV_B32_]], %subreg.sub3145 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_128 = COPY [[REG_SEQUENCE]]146 ; CHECK-NEXT: S_NOP 0, implicit [[COPY]]147 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec148 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec149 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec150 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec151 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub3152 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]153 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3154 %0:sgpr_32 = S_MOV_B32 0155 %1:sgpr_128 = REG_SEQUENCE killed %0, %subreg.sub0, killed %0, %subreg.sub1, killed %0, %subreg.sub2, killed %0, %subreg.sub3156 %2:vreg_128 = COPY killed %1157 S_NOP 0, implicit %2158 %3:areg_128 = COPY %2159 $agpr0_agpr1_agpr2_agpr3 = COPY %3160 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3161 162...163 164---165name: s_mov_b32_0_splat_sgpr_128_copy_vgpr_copy_agpr_multi_use_reg_sequence166tracksRegLiveness: true167body: |168 bb.0:169 ; CHECK-LABEL: name: s_mov_b32_0_splat_sgpr_128_copy_vgpr_copy_agpr_multi_use_reg_sequence170 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0171 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub1, [[S_MOV_B32_]], %subreg.sub2, [[S_MOV_B32_]], %subreg.sub3172 ; CHECK-NEXT: S_NOP 0, implicit [[REG_SEQUENCE]]173 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec174 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec175 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec176 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec177 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub3178 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]179 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3180 %0:sgpr_32 = S_MOV_B32 0181 %1:sgpr_128 = REG_SEQUENCE %0, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %0, %subreg.sub3182 S_NOP 0, implicit %1183 %2:vreg_128 = COPY %1184 %3:areg_128 = COPY %2185 $agpr0_agpr1_agpr2_agpr3 = COPY %3186 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3187 188...189 190---191name: s_mov_b32_0_splat_sgpr_128_copy_vgpr_copy_agpr192tracksRegLiveness: true193body: |194 bb.0:195 ; CHECK-LABEL: name: s_mov_b32_0_splat_sgpr_128_copy_vgpr_copy_agpr196 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0197 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec198 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec199 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec200 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec201 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub3202 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE]]203 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3204 %0:sgpr_32 = S_MOV_B32 0205 %1:sgpr_128 = REG_SEQUENCE killed %0, %subreg.sub0, killed %0, %subreg.sub1, killed %0, %subreg.sub2, killed %0, %subreg.sub3206 %2:vreg_128 = COPY %1207 %3:areg_128 = COPY %2208 $agpr0_agpr1_agpr2_agpr3 = COPY %3209 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3210 211...212 213---214name: s_mov_b32_999_splat_sgpr_128_copy_vgpr_copy_agpr215tracksRegLiveness: true216body: |217 bb.0:218 ; CHECK-LABEL: name: s_mov_b32_999_splat_sgpr_128_copy_vgpr_copy_agpr219 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 999220 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub1, [[S_MOV_B32_]], %subreg.sub2, [[S_MOV_B32_]], %subreg.sub3221 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE]]222 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3223 %0:sgpr_32 = S_MOV_B32 999224 %1:sgpr_128 = REG_SEQUENCE %0, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %0, %subreg.sub3225 %2:vreg_128 = COPY %1226 %3:areg_128 = COPY %2227 $agpr0_agpr1_agpr2_agpr3 = COPY %3228 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3229 230...231 232---233name: s_mov_b32_mixed_imm_literal_inputs_splat_sgpr_128_copy_vgpr_copy_agpr234tracksRegLiveness: true235body: |236 bb.0:237 ; CHECK-LABEL: name: s_mov_b32_mixed_imm_literal_inputs_splat_sgpr_128_copy_vgpr_copy_agpr238 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 999239 ; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sgpr_32 = S_MOV_B32 1240 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec241 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec242 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub1, [[S_MOV_B32_]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub3243 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE]]244 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3245 %0:sgpr_32 = S_MOV_B32 999246 %1:sgpr_32 = S_MOV_B32 1247 %2:sgpr_128 = REG_SEQUENCE %1, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %1, %subreg.sub3248 %3:vreg_128 = COPY %2249 %4:areg_128 = COPY %3250 $agpr0_agpr1_agpr2_agpr3 = COPY %4251 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3252 253...254 255---256name: s_mov_b32_0_splat_sgpr_128_copy_agpr257tracksRegLiveness: true258body: |259 bb.0:260 ; CHECK-LABEL: name: s_mov_b32_0_splat_sgpr_128_copy_agpr261 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0262 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub1, [[S_MOV_B32_]], %subreg.sub2, [[S_MOV_B32_]], %subreg.sub3263 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec264 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec265 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec266 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec267 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub3268 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]269 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3270 %0:sgpr_32 = S_MOV_B32 0271 %1:sgpr_128 = REG_SEQUENCE %0, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %0, %subreg.sub3272 %2:areg_128 = COPY %1273 $agpr0_agpr1_agpr2_agpr3 = COPY %2274 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3275 276...277 278---279name: v_mov_b32_mixed_literal_imm_inputs_vgpr_reg_sequence_128_splat_copy_to_agpr280tracksRegLiveness: true281body: |282 bb.0:283 ; CHECK-LABEL: name: v_mov_b32_mixed_literal_imm_inputs_vgpr_reg_sequence_128_splat_copy_to_agpr284 ; CHECK: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec285 ; CHECK-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 999, implicit $exec286 ; CHECK-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 8, implicit $exec287 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1, [[V_MOV_B32_e32_2]], %subreg.sub2, [[V_MOV_B32_e32_1]], %subreg.sub3288 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec289 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 8, implicit $exec290 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_MOV_B32_e32_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub2, [[V_MOV_B32_e32_1]], %subreg.sub3291 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]292 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3293 %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec294 %1:vgpr_32 = V_MOV_B32_e32 999, implicit $exec295 %2:vgpr_32 = V_MOV_B32_e32 8, implicit $exec296 %3:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %1, %subreg.sub3297 %4:areg_128 = COPY killed %3298 $agpr0_agpr1_agpr2_agpr3 = COPY %4299 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3300 301...302 303---304name: s_mov_b64_0_copy_vgpr_reg_sequence_128_splat_copy_to_agpr_elt64305tracksRegLiveness: true306body: |307 bb.0:308 ; CHECK-LABEL: name: s_mov_b64_0_copy_vgpr_reg_sequence_128_splat_copy_to_agpr_elt64309 ; CHECK: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec310 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B]], %subreg.sub0_sub1, [[V_MOV_B]], %subreg.sub2_sub3311 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_MOV_B]], %subreg.sub0_sub1, [[V_MOV_B]], %subreg.sub2_sub3312 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]313 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3314 %0:sreg_64 = S_MOV_B64 0315 %1:vreg_64_align2 = COPY killed %0316 %2:vreg_128 = REG_SEQUENCE %1, %subreg.sub0_sub1, %1, %subreg.sub2_sub3317 %3:areg_128 = COPY %2318 $agpr0_agpr1_agpr2_agpr3 = COPY %3319 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3320 321...322 323---324name: s_mov_b64_0_copy_vgpr_reg_sequence_128_splat_copy_to_agpr_subreg_elt32325tracksRegLiveness: true326body: |327 bb.0:328 ; CHECK-LABEL: name: s_mov_b64_0_copy_vgpr_reg_sequence_128_splat_copy_to_agpr_subreg_elt32329 ; CHECK: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec330 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B]].sub0, %subreg.sub0, [[V_MOV_B]].sub1, %subreg.sub1, [[V_MOV_B]], %subreg.sub1_sub2331 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_MOV_B]].sub0, %subreg.sub0, [[V_MOV_B]].sub1, %subreg.sub1, [[V_MOV_B]], %subreg.sub1_sub2332 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]333 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3334 %0:sreg_64 = S_MOV_B64 0335 %1:vreg_64_align2 = COPY killed %0336 %2:vreg_128 = REG_SEQUENCE %1.sub0, %subreg.sub0, %1.sub1, %subreg.sub1, %1, %subreg.sub1_sub2337 %3:areg_128 = COPY %2338 $agpr0_agpr1_agpr2_agpr3 = COPY %3339 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3340 341...342 343---344name: s_mov_b64_plus_unfoldable_copy_vgpr_reg_sequence_128_splat_copy_to_agpr_elt64345tracksRegLiveness: true346body: |347 bb.0:348 liveins: $vgpr0_vgpr1349 ; CHECK-LABEL: name: s_mov_b64_plus_unfoldable_copy_vgpr_reg_sequence_128_splat_copy_to_agpr_elt64350 ; CHECK: liveins: $vgpr0_vgpr1351 ; CHECK-NEXT: {{ $}}352 ; CHECK-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec353 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1354 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B]], %subreg.sub0_sub1, [[COPY]], %subreg.sub2_sub3355 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_MOV_B]], %subreg.sub0_sub1, [[COPY]], %subreg.sub2_sub3356 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]357 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3358 %0:sreg_64 = S_MOV_B64 0359 %1:vreg_64_align2 = COPY killed %0360 %2:vreg_64_align2 = COPY $vgpr0_vgpr1361 %3:vreg_128 = REG_SEQUENCE %1, %subreg.sub0_sub1, %2, %subreg.sub2_sub3362 %4:areg_128 = COPY %3363 $agpr0_agpr1_agpr2_agpr3 = COPY %4364 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3365 366...367 368---369name: sgpr_source_copy_vgpr_reg_sequence_128_splat_copy_to_agpr_elt64370tracksRegLiveness: true371body: |372 bb.0:373 liveins: $sgpr8_sgpr9374 ; CHECK-LABEL: name: sgpr_source_copy_vgpr_reg_sequence_128_splat_copy_to_agpr_elt64375 ; CHECK: liveins: $sgpr8_sgpr9376 ; CHECK-NEXT: {{ $}}377 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr8_sgpr9378 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64_align2 = COPY killed [[COPY]]379 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0_sub1, [[COPY1]], %subreg.sub2_sub3380 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[COPY1]], %subreg.sub0_sub1, [[COPY1]], %subreg.sub2_sub3381 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]382 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3383 %0:sreg_64 = COPY $sgpr8_sgpr9384 %1:vreg_64_align2 = COPY killed %0385 %2:vreg_128 = REG_SEQUENCE %1, %subreg.sub0_sub1, %1, %subreg.sub2_sub3386 %3:areg_128 = COPY %2387 $agpr0_agpr1_agpr2_agpr3 = COPY %3388 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3389 390...391 392---393name: sgpr_source_copy_vgpr_reg_sequence_192_repeated_uses_elt64394tracksRegLiveness: true395body: |396 bb.0:397 liveins: $sgpr8_sgpr9, $sgpr10_sgpr11398 399 ; CHECK-LABEL: name: sgpr_source_copy_vgpr_reg_sequence_192_repeated_uses_elt64400 ; CHECK: liveins: $sgpr8_sgpr9, $sgpr10_sgpr11401 ; CHECK-NEXT: {{ $}}402 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr8_sgpr9403 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr10_sgpr11404 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_192 = REG_SEQUENCE [[COPY1]], %subreg.sub0_sub1, [[REG_SEQUENCE]], %subreg.sub2_sub3, [[COPY1]], %subreg.sub4_sub5405 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vreg_64 = COPY [[COPY1]]406 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[REG_SEQUENCE]]407 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_192 = REG_SEQUENCE [[COPY2]], %subreg.sub0_sub1, [[COPY3]], %subreg.sub2_sub3, [[COPY2]], %subreg.sub4_sub5408 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = COPY [[REG_SEQUENCE1]]409 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5410 %0:sreg_64 = COPY $sgpr8_sgpr9411 %1:sreg_64 = COPY $sgpr10_sgpr11412 %2:vreg_192 = REG_SEQUENCE %1, %subreg.sub0_sub1, %2, %subreg.sub2_sub3, %1, %subreg.sub4_sub5413 %3:areg_192 = COPY %2414 $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = COPY %3415 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5416 417...418 419---420name: sgpr_source_copy_vgpr_reg_sequence_192_mixed_subreg_size_uses421tracksRegLiveness: true422body: |423 bb.0:424 liveins: $sgpr8_sgpr9, $sgpr10_sgpr11425 426 ; CHECK-LABEL: name: sgpr_source_copy_vgpr_reg_sequence_192_mixed_subreg_size_uses427 ; CHECK: liveins: $sgpr8_sgpr9, $sgpr10_sgpr11428 ; CHECK-NEXT: {{ $}}429 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr8_sgpr9430 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr10431 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr11432 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_192 = REG_SEQUENCE [[COPY1]], %subreg.sub0_sub1, [[COPY2]], %subreg.sub2_sub3, [[COPY2]], %subreg.sub4, [[COPY2]], %subreg.sub5433 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vreg_64 = COPY [[COPY1]]434 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vreg_64 = COPY [[COPY2]]435 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_192 = REG_SEQUENCE [[COPY3]], %subreg.sub0_sub1, [[COPY4]], %subreg.sub2_sub3, [[COPY4]], %subreg.sub4, [[COPY4]], %subreg.sub5436 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = COPY [[REG_SEQUENCE1]]437 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5438 %0:sreg_64 = COPY $sgpr8_sgpr9439 %1:sreg_32 = COPY $sgpr10440 %2:sreg_32 = COPY $sgpr11441 %3:vreg_192 = REG_SEQUENCE %1, %subreg.sub0_sub1, %2, %subreg.sub2_sub3, %2, %subreg.sub4, %2, %subreg.sub5442 %4:areg_192 = COPY %3443 $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = COPY %4444 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5445 446...447 448---449name: sgpr_source_copy_vgpr_reg_sequence_128_subreg_uses450tracksRegLiveness: true451body: |452 bb.0:453 liveins: $sgpr8_sgpr9, $sgpr10_sgpr11454 455 ; CHECK-LABEL: name: sgpr_source_copy_vgpr_reg_sequence_128_subreg_uses456 ; CHECK: liveins: $sgpr8_sgpr9, $sgpr10_sgpr11457 ; CHECK-NEXT: {{ $}}458 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr8_sgpr9459 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $sgpr10_sgpr11460 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]].sub1, %subreg.sub0, [[COPY1]].sub1, %subreg.sub1, [[COPY]].sub0, %subreg.sub2, [[COPY1]].sub0, %subreg.sub3461 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:areg_192 = COPY [[REG_SEQUENCE]]462 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[COPY2]]463 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3464 %0:sreg_64 = COPY $sgpr8_sgpr9465 %1:sreg_64 = COPY $sgpr10_sgpr11466 %2:vreg_128 = REG_SEQUENCE %0.sub1, %subreg.sub0, %1.sub1, %subreg.sub1, %0.sub0, %subreg.sub2, %1.sub0, %subreg.sub3467 %3:areg_192 = COPY %2468 $agpr0_agpr1_agpr2_agpr3 = COPY %3469 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3470 471...472 473---474name: s_mov_b64_copy_vgpr_reg_sequence_128_subreg_uses475tracksRegLiveness: true476body: |477 bb.0:478 ; CHECK-LABEL: name: s_mov_b64_copy_vgpr_reg_sequence_128_subreg_uses479 ; CHECK: [[S_MOV_B64_:%[0-9]+]]:sreg_64 = S_MOV_B64 0480 ; CHECK-NEXT: [[S_MOV_B64_1:%[0-9]+]]:sreg_64 = S_MOV_B64 64481 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[S_MOV_B64_]].sub1, %subreg.sub0, [[S_MOV_B64_1]].sub1, %subreg.sub1, [[S_MOV_B64_]].sub0, %subreg.sub2, [[S_MOV_B64_1]].sub0, %subreg.sub3482 ; CHECK-NEXT: [[COPY:%[0-9]+]]:areg_192 = COPY [[REG_SEQUENCE]]483 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[COPY]]484 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3485 %0:sreg_64 = S_MOV_B64 0486 %1:sreg_64 = S_MOV_B64 64487 %2:vreg_128 = REG_SEQUENCE %0.sub1, %subreg.sub0, %1.sub1, %subreg.sub1, %0.sub0, %subreg.sub2, %1.sub0, %subreg.sub3488 %3:areg_192 = COPY %2489 $agpr0_agpr1_agpr2_agpr3 = COPY %3490 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3491 492...493 494---495name: sgpr_source_copy_vgpr_reg_sequence_128_elt_32496tracksRegLiveness: true497body: |498 bb.0:499 liveins: $sgpr8, $sgpr9, $sgpr10, $sgpr11500 501 ; CHECK-LABEL: name: sgpr_source_copy_vgpr_reg_sequence_128_elt_32502 ; CHECK: liveins: $sgpr8, $sgpr9, $sgpr10, $sgpr11503 ; CHECK-NEXT: {{ $}}504 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr8505 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr9506 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr10507 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr11508 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_192 = REG_SEQUENCE [[COPY]], %subreg.sub3, [[COPY1]], %subreg.sub2, [[COPY2]], %subreg.sub0, [[COPY2]], %subreg.sub1509 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]]510 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]511 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[COPY2]]512 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_192 = REG_SEQUENCE [[COPY4]], %subreg.sub3, [[COPY5]], %subreg.sub2, [[COPY6]], %subreg.sub0, [[COPY6]], %subreg.sub1513 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]514 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3515 %0:sreg_32 = COPY $sgpr8516 %1:sreg_32 = COPY $sgpr9517 %2:sreg_32 = COPY $sgpr10518 %3:sreg_32 = COPY $sgpr11519 %4:vreg_192 = REG_SEQUENCE %0, %subreg.sub3, %1, %subreg.sub2, %2, %subreg.sub0, %2, %subreg.sub1520 %5:areg_192 = COPY %4521 $agpr0_agpr1_agpr2_agpr3 = COPY %5522 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3523 524...525 526---527name: sgpr_source_copy_vgpr_reg_sequence_128_elt_32_repeated_uses528tracksRegLiveness: true529body: |530 bb.0:531 liveins: $sgpr8, $sgpr9532 533 ; CHECK-LABEL: name: sgpr_source_copy_vgpr_reg_sequence_128_elt_32_repeated_uses534 ; CHECK: liveins: $sgpr8, $sgpr9535 ; CHECK-NEXT: {{ $}}536 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr8537 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr9538 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_192 = REG_SEQUENCE [[COPY]], %subreg.sub3, [[COPY1]], %subreg.sub2, [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1539 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]]540 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]541 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_192 = REG_SEQUENCE [[COPY2]], %subreg.sub3, [[COPY3]], %subreg.sub2, [[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1542 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]543 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3544 %0:sreg_32 = COPY $sgpr8545 %1:sreg_32 = COPY $sgpr9546 %2:vreg_192 = REG_SEQUENCE %0, %subreg.sub3, %1, %subreg.sub2, %0, %subreg.sub0, %1, %subreg.sub1547 %3:areg_192 = COPY %2548 $agpr0_agpr1_agpr2_agpr3 = COPY %3549 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3550 551...552 553---554name: sgpr_source_copy_vgpr_reg_sequence_128_elt_32_other_uses555tracksRegLiveness: true556body: |557 bb.0:558 liveins: $sgpr8, $sgpr9559 560 ; CHECK-LABEL: name: sgpr_source_copy_vgpr_reg_sequence_128_elt_32_other_uses561 ; CHECK: liveins: $sgpr8, $sgpr9562 ; CHECK-NEXT: {{ $}}563 ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr8564 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr9565 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_192 = REG_SEQUENCE [[COPY]], %subreg.sub3, [[COPY1]], %subreg.sub2, [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1566 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[COPY]]567 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]568 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_192 = REG_SEQUENCE [[COPY2]], %subreg.sub3, [[COPY3]], %subreg.sub2, [[COPY2]], %subreg.sub0, [[COPY3]], %subreg.sub1569 ; CHECK-NEXT: S_NOP 0, implicit [[COPY]]570 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]571 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3572 %0:sreg_32 = COPY $sgpr8573 %1:sreg_32 = COPY $sgpr9574 %2:vreg_192 = REG_SEQUENCE %0, %subreg.sub3, %1, %subreg.sub2, %0, %subreg.sub0, %1, %subreg.sub1575 %3:areg_192 = COPY %2576 S_NOP 0, implicit %0577 $agpr0_agpr1_agpr2_agpr3 = COPY %3578 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3579 580...581 582---583name: vreg_128_mixed_sgpr_vgpr_copy_sources_0584tracksRegLiveness: true585body: |586 bb.0:587 liveins: $vgpr0, $vgpr1, $sgpr8, $sgpr9588 589 ; CHECK-LABEL: name: vreg_128_mixed_sgpr_vgpr_copy_sources_0590 ; CHECK: liveins: $vgpr0, $vgpr1, $sgpr8, $sgpr9591 ; CHECK-NEXT: {{ $}}592 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0593 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1594 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr8595 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr9596 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3597 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY2]]598 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY3]]599 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY4]], %subreg.sub2, [[COPY5]], %subreg.sub3600 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]601 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3602 %0:vgpr_32 = COPY $vgpr0603 %1:vgpr_32 = COPY $vgpr1604 %2:sreg_32 = COPY $sgpr8605 %3:sreg_32 = COPY $sgpr9606 %4:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3607 %5:areg_128 = COPY %4608 $agpr0_agpr1_agpr2_agpr3 = COPY %5609 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3610 611...612 613---614name: vreg_128_mixed_sgpr_vgpr_copy_sources_1615tracksRegLiveness: true616body: |617 bb.0:618 liveins: $vgpr0, $sgpr8, $sgpr9, $sgpr10619 620 ; CHECK-LABEL: name: vreg_128_mixed_sgpr_vgpr_copy_sources_1621 ; CHECK: liveins: $vgpr0, $sgpr8, $sgpr9, $sgpr10622 ; CHECK-NEXT: {{ $}}623 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0624 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr8625 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr9626 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr10627 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3628 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY1]]629 ; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY2]]630 ; CHECK-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[COPY3]]631 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY4]], %subreg.sub1, [[COPY5]], %subreg.sub2, [[COPY6]], %subreg.sub3632 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]633 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3634 %0:vgpr_32 = COPY $vgpr0635 %1:sreg_32 = COPY $sgpr8636 %2:sreg_32 = COPY $sgpr9637 %3:sreg_32 = COPY $sgpr10638 %4:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3639 %5:areg_128 = COPY %4640 $agpr0_agpr1_agpr2_agpr3 = COPY %5641 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3642 643...644 645---646name: vreg_128_mixed_sgpr_vgpr_copy_sources_2647tracksRegLiveness: true648body: |649 bb.0:650 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr8651 652 ; CHECK-LABEL: name: vreg_128_mixed_sgpr_vgpr_copy_sources_2653 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $sgpr8654 ; CHECK-NEXT: {{ $}}655 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0656 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1657 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2658 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $sgpr8659 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY3]], %subreg.sub3660 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY3]]661 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.sub1, [[COPY2]], %subreg.sub2, [[COPY4]], %subreg.sub3662 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]663 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3664 %0:vgpr_32 = COPY $vgpr0665 %1:vgpr_32 = COPY $vgpr1666 %2:vgpr_32 = COPY $vgpr2667 %3:sreg_32 = COPY $sgpr8668 %4:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3669 %5:areg_128 = COPY %4670 $agpr0_agpr1_agpr2_agpr3 = COPY %5671 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3672 673...674 675---676name: vreg_128_mixed_sgpr_vgpr_imm_sources_0677tracksRegLiveness: true678body: |679 bb.0:680 ; CHECK-LABEL: name: vreg_128_mixed_sgpr_vgpr_imm_sources_0681 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 0682 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec683 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[S_MOV_B32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub3684 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec685 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec686 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_2:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec687 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_3:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec688 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub1, [[V_ACCVGPR_WRITE_B32_e64_2]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_3]], %subreg.sub3689 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]690 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3691 %0:sgpr_32 = S_MOV_B32 0692 %1:vgpr_32 = V_MOV_B32_e32 1, implicit $exec693 %2:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %0, %subreg.sub2, %1, %subreg.sub3694 %3:areg_128 = COPY %2695 $agpr0_agpr1_agpr2_agpr3 = COPY %3696 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3697 698...699 700---701name: vreg_128_mixed_sgpr_vgpr_imm_sources_1702tracksRegLiveness: true703body: |704 bb.0:705 ; CHECK-LABEL: name: vreg_128_mixed_sgpr_vgpr_imm_sources_1706 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 999707 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec708 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[S_MOV_B32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[S_MOV_B32_]], %subreg.sub2, [[V_MOV_B32_e32_]], %subreg.sub3709 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]710 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec711 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_1:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec712 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub1, [[COPY]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_1]], %subreg.sub3713 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]714 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3715 %0:sgpr_32 = S_MOV_B32 999716 %1:vgpr_32 = V_MOV_B32_e32 1, implicit $exec717 %2:vreg_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %0, %subreg.sub2, %1, %subreg.sub3718 %3:areg_128 = COPY %2719 $agpr0_agpr1_agpr2_agpr3 = COPY %3720 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3721 722...723 724---725name: vreg_128_mixed_sgpr_vgpr_imm_sources_2726tracksRegLiveness: true727body: |728 bb.0:729 ; CHECK-LABEL: name: vreg_128_mixed_sgpr_vgpr_imm_sources_2730 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 999731 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec732 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub1, [[S_MOV_B32_]], %subreg.sub2, [[S_MOV_B32_]], %subreg.sub3733 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec734 ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]735 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub0, [[COPY]], %subreg.sub1, [[COPY]], %subreg.sub2, [[COPY]], %subreg.sub3736 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]737 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3738 %0:sgpr_32 = S_MOV_B32 999739 %1:vgpr_32 = V_MOV_B32_e32 1, implicit $exec740 %2:vreg_128 = REG_SEQUENCE %1, %subreg.sub0, %0, %subreg.sub1, %0, %subreg.sub2, %0, %subreg.sub3741 %3:areg_128 = COPY %2742 $agpr0_agpr1_agpr2_agpr3 = COPY %3743 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3744 745...746 747---748name: vreg_128_mixed_sgpr_vgpr_imm_sources_3749tracksRegLiveness: true750body: |751 bb.0:752 ; CHECK-LABEL: name: vreg_128_mixed_sgpr_vgpr_imm_sources_3753 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sgpr_32 = S_MOV_B32 8754 ; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 123, implicit $exec755 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[S_MOV_B32_]], %subreg.sub3756 ; CHECK-NEXT: [[V_ACCVGPR_WRITE_B32_e64_:%[0-9]+]]:agpr_32 = V_ACCVGPR_WRITE_B32_e64 8, implicit $exec757 ; CHECK-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:areg_128 = REG_SEQUENCE [[V_MOV_B32_e32_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1, [[V_MOV_B32_e32_]], %subreg.sub2, [[V_ACCVGPR_WRITE_B32_e64_]], %subreg.sub3758 ; CHECK-NEXT: $agpr0_agpr1_agpr2_agpr3 = COPY [[REG_SEQUENCE1]]759 ; CHECK-NEXT: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3760 %0:sgpr_32 = S_MOV_B32 8761 %1:vgpr_32 = V_MOV_B32_e32 123, implicit $exec762 %2:vreg_128 = REG_SEQUENCE %1, %subreg.sub0, %1, %subreg.sub1, %1, %subreg.sub2, %0, %subreg.sub3763 %3:areg_128 = COPY %2764 $agpr0_agpr1_agpr2_agpr3 = COPY %3765 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3766 767...768