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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=si-fold-operands -verify-machineinstrs -o - %s | FileCheck %s3 4# Check that we don't hang on this.5---6name: fold_reg_sequence7body: |8 bb.0:9 liveins: $vgpr0_vgpr1, $vgpr210 11 ; CHECK-LABEL: name: fold_reg_sequence12 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr213 ; CHECK-NEXT: {{ $}}14 ; CHECK-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 015 ; CHECK-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 42916 ; CHECK-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE killed [[S_MOV_B32_1]], %subreg.sub0, [[S_MOV_B32_]], %subreg.sub117 ; CHECK-NEXT: [[V_MUL_HI_U32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 $vgpr2, [[REG_SEQUENCE]].sub0, implicit $exec18 ; CHECK-NEXT: [[GLOBAL_LOAD_DWORD:%[0-9]+]]:vgpr_32 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec :: (load (s32), addrspace 1)19 ; CHECK-NEXT: [[V_MUL_HI_U32_e64_1:%[0-9]+]]:vgpr_32 = V_MUL_HI_U32_e64 [[GLOBAL_LOAD_DWORD]], [[REG_SEQUENCE]].sub0, implicit $exec20 ; CHECK-NEXT: S_ENDPGM 021 %0:sreg_32 = S_MOV_B32 022 %1:sreg_32 = S_MOV_B32 42923 %2:sreg_64 = REG_SEQUENCE killed %1, %subreg.sub0, %0, %subreg.sub124 %3:vgpr_32 = V_MUL_HI_U32_e64 $vgpr2, %2.sub0, implicit $exec25 %4:vgpr_32 = GLOBAL_LOAD_DWORD $vgpr0_vgpr1, 0, 0, implicit $exec :: (load (s32), addrspace 1)26 %5:vgpr_32 = V_MUL_HI_U32_e64 %4, %2.sub0, implicit $exec27 S_ENDPGM 028...29 30# Fold through a COPY of REG_SEQUENCE.31---32name: fold_through_copy33body: |34 bb.0:35 ; CHECK-LABEL: name: fold_through_copy36 ; CHECK: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 037 ; CHECK-NEXT: [[DEF:%[0-9]+]]:sreg_64_xexec = IMPLICIT_DEF38 ; CHECK-NEXT: [[V_PK_ADD_F32_:%[0-9]+]]:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, [[DEF]], 8, 0, 0, 0, 0, 0, 0, implicit $mode, implicit $exec39 %0:sreg_32 = S_MOV_B32 040 %1:sreg_64 = REG_SEQUENCE %0:sreg_32, %subreg.sub0, %0:sreg_32, %subreg.sub141 %2:sreg_64_xexec = IMPLICIT_DEF42 %3:vreg_64_align2 = COPY %1:sreg_6443 %4:vreg_64_align2 = nofpexcept V_PK_ADD_F32 8, %2:sreg_64_xexec, 8, %3:vreg_64_align2, 0, 0, 0, 0, 0, implicit $mode, implicit $exec44...45