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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=bonaire -enable-amdgpu-aa=0 -enable-misched -enable-aa-sched-mi < %s | FileCheck -enable-var-scope -check-prefix=CI %s3; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn -mcpu=gfx900 -enable-amdgpu-aa=0 -enable-misched -enable-aa-sched-mi < %s | FileCheck -enable-var-scope -check-prefix=GFX9 %s4 5%struct.lds = type { [64 x ptr], [16 x i8] }6@stored_lds_struct = addrspace(3) global %struct.lds poison, align 167@stored_lds_ptr = addrspace(3) global ptr addrspace(3) poison, align 48@stored_constant_ptr = addrspace(3) global ptr addrspace(4) poison, align 89@stored_global_ptr = addrspace(3) global ptr addrspace(1) poison, align 810 11define amdgpu_kernel void @no_reorder_flat_load_local_store_local_load(ptr addrspace(3) %out, ptr %fptr) #0 {12; CI-LABEL: no_reorder_flat_load_local_store_local_load:13; CI: ; %bb.0:14; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xb15; CI-NEXT: v_mov_b32_e32 v4, 016; CI-NEXT: s_mov_b32 m0, -117; CI-NEXT: s_waitcnt lgkmcnt(0)18; CI-NEXT: v_mov_b32_e32 v0, s019; CI-NEXT: v_mov_b32_e32 v1, s120; CI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]21; CI-NEXT: s_load_dword s0, s[4:5], 0x922; CI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)23; CI-NEXT: ds_write_b128 v4, v[0:3] offset:51224; CI-NEXT: ds_read2_b32 v[0:1], v4 offset0:129 offset1:13025; CI-NEXT: v_mov_b32_e32 v2, s026; CI-NEXT: s_waitcnt lgkmcnt(0)27; CI-NEXT: ds_write2_b32 v2, v0, v1 offset1:128; CI-NEXT: s_endpgm29;30; GFX9-LABEL: no_reorder_flat_load_local_store_local_load:31; GFX9: ; %bb.0:32; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2c33; GFX9-NEXT: v_mov_b32_e32 v4, 034; GFX9-NEXT: s_waitcnt lgkmcnt(0)35; GFX9-NEXT: v_mov_b32_e32 v0, s036; GFX9-NEXT: v_mov_b32_e32 v1, s137; GFX9-NEXT: flat_load_dwordx4 v[0:3], v[0:1]38; GFX9-NEXT: s_load_dword s0, s[4:5], 0x2439; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)40; GFX9-NEXT: ds_write_b128 v4, v[0:3] offset:51241; GFX9-NEXT: ds_read2_b32 v[0:1], v4 offset0:129 offset1:13042; GFX9-NEXT: v_mov_b32_e32 v2, s043; GFX9-NEXT: s_waitcnt lgkmcnt(0)44; GFX9-NEXT: ds_write2_b32 v2, v0, v1 offset1:145; GFX9-NEXT: s_endpgm46 %ptr1 = getelementptr %struct.lds, ptr addrspace(3) @stored_lds_struct, i32 0, i32 147 %ptr2 = getelementptr %struct.lds, ptr addrspace(3) @stored_lds_struct, i32 0, i32 1, i32 448 call void @llvm.memcpy.p3.p0(ptr addrspace(3) align 16 %ptr1, ptr align 8 %fptr, i64 16, i1 false)49 %vector_load = load <2 x i32>, ptr addrspace(3) %ptr2, align 450 store <2 x i32> %vector_load, ptr addrspace(3) %out, align 451 ret void52}53 54define amdgpu_kernel void @reorder_local_load_global_store_local_load(ptr addrspace(1) %out, ptr addrspace(1) %gptr) #0 {55; CI-LABEL: reorder_local_load_global_store_local_load:56; CI: ; %bb.0:57; CI-NEXT: v_mov_b32_e32 v0, 058; CI-NEXT: s_mov_b32 m0, -159; CI-NEXT: ds_read_b32 v0, v060; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x961; CI-NEXT: s_mov_b32 s7, 0xf00062; CI-NEXT: s_mov_b32 s6, -163; CI-NEXT: v_mov_b32_e32 v2, 0x6364; CI-NEXT: s_waitcnt lgkmcnt(0)65; CI-NEXT: ds_read2_b32 v[0:1], v0 offset0:1 offset1:366; CI-NEXT: s_mov_b32 s4, s067; CI-NEXT: s_mov_b32 s5, s168; CI-NEXT: s_mov_b32 s0, s269; CI-NEXT: s_mov_b32 s1, s370; CI-NEXT: s_mov_b32 s2, s671; CI-NEXT: s_mov_b32 s3, s772; CI-NEXT: s_waitcnt lgkmcnt(0)73; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v174; CI-NEXT: buffer_store_dword v2, off, s[0:3], 075; CI-NEXT: buffer_store_dword v0, off, s[4:7], 076; CI-NEXT: s_endpgm77;78; GFX9-LABEL: reorder_local_load_global_store_local_load:79; GFX9: ; %bb.0:80; GFX9-NEXT: v_mov_b32_e32 v2, 081; GFX9-NEXT: ds_read_b32 v0, v282; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2483; GFX9-NEXT: v_mov_b32_e32 v3, 0x6384; GFX9-NEXT: s_waitcnt lgkmcnt(0)85; GFX9-NEXT: ds_read2_b32 v[0:1], v0 offset0:1 offset1:386; GFX9-NEXT: global_store_dword v2, v3, s[2:3]87; GFX9-NEXT: s_waitcnt lgkmcnt(0)88; GFX9-NEXT: v_add_u32_e32 v0, v0, v189; GFX9-NEXT: global_store_dword v2, v0, s[0:1]90; GFX9-NEXT: s_endpgm91 %ptr0 = load ptr addrspace(3), ptr addrspace(3) @stored_lds_ptr, align 492 93 %ptr1 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 194 %ptr2 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 395 96 %tmp1 = load i32, ptr addrspace(3) %ptr1, align 497 store i32 99, ptr addrspace(1) %gptr, align 498 %tmp2 = load i32, ptr addrspace(3) %ptr2, align 499 100 %add = add nsw i32 %tmp1, %tmp2101 102 store i32 %add, ptr addrspace(1) %out, align 4103 ret void104}105 106define amdgpu_kernel void @no_reorder_local_load_volatile_global_store_local_load(ptr addrspace(1) %out, ptr addrspace(1) %gptr) #0 {107; CI-LABEL: no_reorder_local_load_volatile_global_store_local_load:108; CI: ; %bb.0:109; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9110; CI-NEXT: v_mov_b32_e32 v0, 0111; CI-NEXT: s_mov_b32 m0, -1112; CI-NEXT: ds_read_b32 v0, v0113; CI-NEXT: s_mov_b32 s7, 0xf000114; CI-NEXT: s_mov_b32 s6, -1115; CI-NEXT: s_waitcnt lgkmcnt(0)116; CI-NEXT: s_mov_b32 s8, s2117; CI-NEXT: s_mov_b32 s9, s3118; CI-NEXT: s_mov_b32 s10, s6119; CI-NEXT: s_mov_b32 s11, s7120; CI-NEXT: v_mov_b32_e32 v2, 0x63121; CI-NEXT: ds_read_b32 v1, v0 offset:4122; CI-NEXT: buffer_store_dword v2, off, s[8:11], 0123; CI-NEXT: s_waitcnt vmcnt(0)124; CI-NEXT: ds_read_b32 v0, v0 offset:12125; CI-NEXT: s_mov_b32 s4, s0126; CI-NEXT: s_mov_b32 s5, s1127; CI-NEXT: s_waitcnt lgkmcnt(0)128; CI-NEXT: v_add_i32_e32 v0, vcc, v1, v0129; CI-NEXT: buffer_store_dword v0, off, s[4:7], 0130; CI-NEXT: s_endpgm131;132; GFX9-LABEL: no_reorder_local_load_volatile_global_store_local_load:133; GFX9: ; %bb.0:134; GFX9-NEXT: v_mov_b32_e32 v0, 0135; GFX9-NEXT: ds_read_b32 v1, v0136; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24137; GFX9-NEXT: v_mov_b32_e32 v2, 0x63138; GFX9-NEXT: s_waitcnt lgkmcnt(0)139; GFX9-NEXT: ds_read_b32 v3, v1 offset:4140; GFX9-NEXT: global_store_dword v0, v2, s[2:3]141; GFX9-NEXT: s_waitcnt vmcnt(0)142; GFX9-NEXT: ds_read_b32 v1, v1 offset:12143; GFX9-NEXT: s_waitcnt lgkmcnt(0)144; GFX9-NEXT: v_add_u32_e32 v1, v3, v1145; GFX9-NEXT: global_store_dword v0, v1, s[0:1]146; GFX9-NEXT: s_endpgm147 %ptr0 = load ptr addrspace(3), ptr addrspace(3) @stored_lds_ptr, align 4148 149 %ptr1 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 1150 %ptr2 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 3151 152 %tmp1 = load i32, ptr addrspace(3) %ptr1, align 4153 store volatile i32 99, ptr addrspace(1) %gptr, align 4154 %tmp2 = load i32, ptr addrspace(3) %ptr2, align 4155 156 %add = add nsw i32 %tmp1, %tmp2157 158 store i32 %add, ptr addrspace(1) %out, align 4159 ret void160}161 162define amdgpu_kernel void @no_reorder_barrier_local_load_global_store_local_load(ptr addrspace(1) %out, ptr addrspace(1) %gptr) #0 {163; CI-LABEL: no_reorder_barrier_local_load_global_store_local_load:164; CI: ; %bb.0:165; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9166; CI-NEXT: v_mov_b32_e32 v0, 0167; CI-NEXT: s_mov_b32 m0, -1168; CI-NEXT: ds_read_b32 v0, v0169; CI-NEXT: s_mov_b32 s7, 0xf000170; CI-NEXT: s_mov_b32 s6, -1171; CI-NEXT: s_waitcnt lgkmcnt(0)172; CI-NEXT: s_mov_b32 s8, s2173; CI-NEXT: s_mov_b32 s9, s3174; CI-NEXT: s_mov_b32 s10, s6175; CI-NEXT: s_mov_b32 s11, s7176; CI-NEXT: v_mov_b32_e32 v2, 0x63177; CI-NEXT: ds_read_b32 v1, v0 offset:4178; CI-NEXT: buffer_store_dword v2, off, s[8:11], 0179; CI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)180; CI-NEXT: s_barrier181; CI-NEXT: ds_read_b32 v0, v0 offset:12182; CI-NEXT: s_mov_b32 s4, s0183; CI-NEXT: s_mov_b32 s5, s1184; CI-NEXT: s_waitcnt lgkmcnt(0)185; CI-NEXT: v_add_i32_e32 v0, vcc, v1, v0186; CI-NEXT: buffer_store_dword v0, off, s[4:7], 0187; CI-NEXT: s_endpgm188;189; GFX9-LABEL: no_reorder_barrier_local_load_global_store_local_load:190; GFX9: ; %bb.0:191; GFX9-NEXT: v_mov_b32_e32 v0, 0192; GFX9-NEXT: ds_read_b32 v1, v0193; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24194; GFX9-NEXT: v_mov_b32_e32 v2, 0x63195; GFX9-NEXT: s_waitcnt lgkmcnt(0)196; GFX9-NEXT: ds_read_b32 v3, v1 offset:4197; GFX9-NEXT: global_store_dword v0, v2, s[2:3]198; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)199; GFX9-NEXT: s_barrier200; GFX9-NEXT: ds_read_b32 v1, v1 offset:12201; GFX9-NEXT: s_waitcnt lgkmcnt(0)202; GFX9-NEXT: v_add_u32_e32 v1, v3, v1203; GFX9-NEXT: global_store_dword v0, v1, s[0:1]204; GFX9-NEXT: s_endpgm205 %ptr0 = load ptr addrspace(3), ptr addrspace(3) @stored_lds_ptr, align 4206 207 %ptr1 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 1208 %ptr2 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 3209 210 %tmp1 = load i32, ptr addrspace(3) %ptr1, align 4211 store i32 99, ptr addrspace(1) %gptr, align 4212 call void @llvm.amdgcn.s.barrier() #1213 %tmp2 = load i32, ptr addrspace(3) %ptr2, align 4214 215 %add = add nsw i32 %tmp1, %tmp2216 217 store i32 %add, ptr addrspace(1) %out, align 4218 ret void219}220 221define amdgpu_kernel void @reorder_constant_load_global_store_constant_load(ptr addrspace(1) %out, ptr addrspace(1) %gptr) #0 {222; CI-LABEL: reorder_constant_load_global_store_constant_load:223; CI: ; %bb.0:224; CI-NEXT: v_mov_b32_e32 v0, 0225; CI-NEXT: s_mov_b32 m0, -1226; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9227; CI-NEXT: ds_read_b64 v[0:1], v0228; CI-NEXT: s_mov_b32 s7, 0xf000229; CI-NEXT: s_mov_b32 s6, -1230; CI-NEXT: s_mov_b32 s10, s6231; CI-NEXT: s_waitcnt lgkmcnt(0)232; CI-NEXT: s_mov_b32 s8, s2233; CI-NEXT: s_mov_b32 s9, s3234; CI-NEXT: s_mov_b32 s11, s7235; CI-NEXT: v_readfirstlane_b32 s2, v0236; CI-NEXT: v_readfirstlane_b32 s3, v1237; CI-NEXT: v_mov_b32_e32 v0, 0x63238; CI-NEXT: s_load_dword s12, s[2:3], 0x1239; CI-NEXT: buffer_store_dword v0, off, s[8:11], 0240; CI-NEXT: s_load_dword s2, s[2:3], 0x3241; CI-NEXT: s_mov_b32 s4, s0242; CI-NEXT: s_mov_b32 s5, s1243; CI-NEXT: s_waitcnt lgkmcnt(0)244; CI-NEXT: s_add_i32 s0, s12, s2245; CI-NEXT: v_mov_b32_e32 v0, s0246; CI-NEXT: buffer_store_dword v0, off, s[4:7], 0247; CI-NEXT: s_endpgm248;249; GFX9-LABEL: reorder_constant_load_global_store_constant_load:250; GFX9: ; %bb.0:251; GFX9-NEXT: v_mov_b32_e32 v2, 0252; GFX9-NEXT: ds_read_b64 v[0:1], v2253; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24254; GFX9-NEXT: v_mov_b32_e32 v3, 0x63255; GFX9-NEXT: s_waitcnt lgkmcnt(0)256; GFX9-NEXT: v_readfirstlane_b32 s4, v0257; GFX9-NEXT: v_readfirstlane_b32 s5, v1258; GFX9-NEXT: s_load_dword s6, s[4:5], 0x4259; GFX9-NEXT: global_store_dword v2, v3, s[2:3]260; GFX9-NEXT: s_load_dword s2, s[4:5], 0xc261; GFX9-NEXT: s_waitcnt lgkmcnt(0)262; GFX9-NEXT: s_add_i32 s2, s6, s2263; GFX9-NEXT: v_mov_b32_e32 v0, s2264; GFX9-NEXT: global_store_dword v2, v0, s[0:1]265; GFX9-NEXT: s_endpgm266 %ptr0 = load ptr addrspace(4), ptr addrspace(3) @stored_constant_ptr, align 8267 268 %ptr1 = getelementptr inbounds i32, ptr addrspace(4) %ptr0, i64 1269 %ptr2 = getelementptr inbounds i32, ptr addrspace(4) %ptr0, i64 3270 271 %tmp1 = load i32, ptr addrspace(4) %ptr1, align 4272 store i32 99, ptr addrspace(1) %gptr, align 4273 %tmp2 = load i32, ptr addrspace(4) %ptr2, align 4274 275 %add = add nsw i32 %tmp1, %tmp2276 277 store i32 %add, ptr addrspace(1) %out, align 4278 ret void279}280 281define amdgpu_kernel void @reorder_constant_load_local_store_constant_load(ptr addrspace(1) %out, ptr addrspace(3) %lptr) #0 {282; CI-LABEL: reorder_constant_load_local_store_constant_load:283; CI: ; %bb.0:284; CI-NEXT: v_mov_b32_e32 v0, 0285; CI-NEXT: s_mov_b32 m0, -1286; CI-NEXT: ds_read_b64 v[0:1], v0287; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9288; CI-NEXT: s_load_dword s6, s[4:5], 0xb289; CI-NEXT: s_mov_b32 s3, 0xf000290; CI-NEXT: s_mov_b32 s2, -1291; CI-NEXT: s_waitcnt lgkmcnt(0)292; CI-NEXT: v_readfirstlane_b32 s4, v0293; CI-NEXT: v_readfirstlane_b32 s5, v1294; CI-NEXT: s_load_dword s7, s[4:5], 0x1295; CI-NEXT: s_load_dword s4, s[4:5], 0x3296; CI-NEXT: v_mov_b32_e32 v0, 0x63297; CI-NEXT: v_mov_b32_e32 v1, s6298; CI-NEXT: ds_write_b32 v1, v0299; CI-NEXT: s_waitcnt lgkmcnt(0)300; CI-NEXT: s_add_i32 s4, s7, s4301; CI-NEXT: v_mov_b32_e32 v0, s4302; CI-NEXT: buffer_store_dword v0, off, s[0:3], 0303; CI-NEXT: s_endpgm304;305; GFX9-LABEL: reorder_constant_load_local_store_constant_load:306; GFX9: ; %bb.0:307; GFX9-NEXT: v_mov_b32_e32 v2, 0308; GFX9-NEXT: ds_read_b64 v[0:1], v2309; GFX9-NEXT: s_load_dword s6, s[4:5], 0x2c310; GFX9-NEXT: s_waitcnt lgkmcnt(0)311; GFX9-NEXT: v_readfirstlane_b32 s0, v0312; GFX9-NEXT: v_readfirstlane_b32 s1, v1313; GFX9-NEXT: s_load_dword s7, s[0:1], 0x4314; GFX9-NEXT: s_load_dword s8, s[0:1], 0xc315; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24316; GFX9-NEXT: v_mov_b32_e32 v0, 0x63317; GFX9-NEXT: v_mov_b32_e32 v1, s6318; GFX9-NEXT: ds_write_b32 v1, v0319; GFX9-NEXT: s_waitcnt lgkmcnt(0)320; GFX9-NEXT: s_add_i32 s0, s7, s8321; GFX9-NEXT: v_mov_b32_e32 v0, s0322; GFX9-NEXT: global_store_dword v2, v0, s[2:3]323; GFX9-NEXT: s_endpgm324 %ptr0 = load ptr addrspace(4), ptr addrspace(3) @stored_constant_ptr, align 8325 326 %ptr1 = getelementptr inbounds i32, ptr addrspace(4) %ptr0, i64 1327 %ptr2 = getelementptr inbounds i32, ptr addrspace(4) %ptr0, i64 3328 329 %tmp1 = load i32, ptr addrspace(4) %ptr1, align 4330 store i32 99, ptr addrspace(3) %lptr, align 4331 %tmp2 = load i32, ptr addrspace(4) %ptr2, align 4332 333 %add = add nsw i32 %tmp1, %tmp2334 335 store i32 %add, ptr addrspace(1) %out, align 4336 ret void337}338 339define amdgpu_kernel void @reorder_smrd_load_local_store_smrd_load(ptr addrspace(1) %out, ptr addrspace(3) noalias %lptr, ptr addrspace(4) %ptr0) #0 {340; CI-LABEL: reorder_smrd_load_local_store_smrd_load:341; CI: ; %bb.0:342; CI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0xd343; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9344; CI-NEXT: s_load_dword s8, s[4:5], 0xb345; CI-NEXT: v_mov_b32_e32 v0, 0x63346; CI-NEXT: s_mov_b32 m0, -1347; CI-NEXT: s_waitcnt lgkmcnt(0)348; CI-NEXT: s_load_dwordx2 s[4:5], s[6:7], 0x1349; CI-NEXT: s_mov_b32 s3, 0xf000350; CI-NEXT: v_mov_b32_e32 v1, s8351; CI-NEXT: s_mov_b32 s2, -1352; CI-NEXT: ds_write_b32 v1, v0353; CI-NEXT: s_waitcnt lgkmcnt(0)354; CI-NEXT: s_add_i32 s4, s4, s5355; CI-NEXT: v_mov_b32_e32 v0, s4356; CI-NEXT: buffer_store_dword v0, off, s[0:3], 0357; CI-NEXT: s_endpgm358;359; GFX9-LABEL: reorder_smrd_load_local_store_smrd_load:360; GFX9: ; %bb.0:361; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34362; GFX9-NEXT: s_load_dword s6, s[4:5], 0x2c363; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24364; GFX9-NEXT: v_mov_b32_e32 v1, 0x63365; GFX9-NEXT: v_mov_b32_e32 v0, 0366; GFX9-NEXT: s_waitcnt lgkmcnt(0)367; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x4368; GFX9-NEXT: v_mov_b32_e32 v2, s6369; GFX9-NEXT: ds_write_b32 v2, v1370; GFX9-NEXT: s_waitcnt lgkmcnt(0)371; GFX9-NEXT: s_add_i32 s0, s4, s5372; GFX9-NEXT: v_mov_b32_e32 v1, s0373; GFX9-NEXT: global_store_dword v0, v1, s[2:3]374; GFX9-NEXT: s_endpgm375 %ptr1 = getelementptr inbounds i32, ptr addrspace(4) %ptr0, i64 1376 %ptr2 = getelementptr inbounds i32, ptr addrspace(4) %ptr0, i64 2377 378 %tmp1 = load i32, ptr addrspace(4) %ptr1, align 4379 store i32 99, ptr addrspace(3) %lptr, align 4380 %tmp2 = load i32, ptr addrspace(4) %ptr2, align 4381 382 %add = add nsw i32 %tmp1, %tmp2383 384 store i32 %add, ptr addrspace(1) %out, align 4385 ret void386}387 388define amdgpu_kernel void @reorder_global_load_local_store_global_load(ptr addrspace(1) %out, ptr addrspace(3) %lptr, ptr addrspace(1) %ptr0) #0 {389; CI-LABEL: reorder_global_load_local_store_global_load:390; CI: ; %bb.0:391; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xd392; CI-NEXT: s_mov_b32 s7, 0xf000393; CI-NEXT: s_mov_b32 s6, -1394; CI-NEXT: s_mov_b32 s2, s6395; CI-NEXT: s_mov_b32 s3, s7396; CI-NEXT: s_waitcnt lgkmcnt(0)397; CI-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:4398; CI-NEXT: buffer_load_dword v1, off, s[0:3], 0 offset:12399; CI-NEXT: s_load_dword s0, s[4:5], 0xb400; CI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9401; CI-NEXT: v_mov_b32_e32 v2, 0x63402; CI-NEXT: s_mov_b32 m0, -1403; CI-NEXT: s_waitcnt lgkmcnt(0)404; CI-NEXT: v_mov_b32_e32 v3, s0405; CI-NEXT: ds_write_b32 v3, v2406; CI-NEXT: s_waitcnt vmcnt(0)407; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v1408; CI-NEXT: buffer_store_dword v0, off, s[4:7], 0409; CI-NEXT: s_endpgm410;411; GFX9-LABEL: reorder_global_load_local_store_global_load:412; GFX9: ; %bb.0:413; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34414; GFX9-NEXT: v_mov_b32_e32 v0, 0415; GFX9-NEXT: v_mov_b32_e32 v3, 0x63416; GFX9-NEXT: s_waitcnt lgkmcnt(0)417; GFX9-NEXT: global_load_dword v1, v0, s[0:1] offset:4418; GFX9-NEXT: global_load_dword v2, v0, s[0:1] offset:12419; GFX9-NEXT: s_load_dword s2, s[4:5], 0x2c420; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24421; GFX9-NEXT: s_waitcnt lgkmcnt(0)422; GFX9-NEXT: v_mov_b32_e32 v4, s2423; GFX9-NEXT: ds_write_b32 v4, v3424; GFX9-NEXT: s_waitcnt vmcnt(0)425; GFX9-NEXT: v_add_u32_e32 v1, v1, v2426; GFX9-NEXT: global_store_dword v0, v1, s[0:1]427; GFX9-NEXT: s_endpgm428 %ptr1 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i64 1429 %ptr2 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i64 3430 431 %tmp1 = load i32, ptr addrspace(1) %ptr1, align 4432 store i32 99, ptr addrspace(3) %lptr, align 4433 %tmp2 = load i32, ptr addrspace(1) %ptr2, align 4434 435 %add = add nsw i32 %tmp1, %tmp2436 437 store i32 %add, ptr addrspace(1) %out, align 4438 ret void439}440 441define amdgpu_kernel void @reorder_local_offsets(ptr addrspace(1) nocapture %out, ptr addrspace(1) noalias nocapture readnone %gptr, ptr addrspace(3) noalias nocapture %ptr0) #0 {442; CI-LABEL: reorder_local_offsets:443; CI: ; %bb.0:444; CI-NEXT: s_load_dword s6, s[4:5], 0xd445; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9446; CI-NEXT: s_mov_b32 m0, -1447; CI-NEXT: v_mov_b32_e32 v2, 0x7b448; CI-NEXT: s_mov_b32 s3, 0xf000449; CI-NEXT: s_waitcnt lgkmcnt(0)450; CI-NEXT: v_mov_b32_e32 v3, s6451; CI-NEXT: ds_read2_b32 v[0:1], v3 offset0:100 offset1:102452; CI-NEXT: s_mov_b32 s2, -1453; CI-NEXT: ds_write2_b32 v3, v2, v2 offset0:3 offset1:100454; CI-NEXT: v_mov_b32_e32 v2, 0x315455; CI-NEXT: ds_write_b32 v3, v2 offset:408456; CI-NEXT: s_waitcnt lgkmcnt(2)457; CI-NEXT: v_add_i32_e32 v0, vcc, v1, v0458; CI-NEXT: v_add_i32_e32 v0, vcc, 0x7b, v0459; CI-NEXT: buffer_store_dword v0, off, s[0:3], 0460; CI-NEXT: s_endpgm461;462; GFX9-LABEL: reorder_local_offsets:463; GFX9: ; %bb.0:464; GFX9-NEXT: s_load_dword s2, s[4:5], 0x34465; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24466; GFX9-NEXT: v_mov_b32_e32 v4, 0x7b467; GFX9-NEXT: v_mov_b32_e32 v2, 0468; GFX9-NEXT: s_waitcnt lgkmcnt(0)469; GFX9-NEXT: v_mov_b32_e32 v3, s2470; GFX9-NEXT: ds_read2_b32 v[0:1], v3 offset0:100 offset1:102471; GFX9-NEXT: ds_write2_b32 v3, v4, v4 offset0:3 offset1:100472; GFX9-NEXT: v_mov_b32_e32 v4, 0x315473; GFX9-NEXT: ds_write_b32 v3, v4 offset:408474; GFX9-NEXT: s_waitcnt lgkmcnt(2)475; GFX9-NEXT: v_add_u32_e32 v0, v1, v0476; GFX9-NEXT: v_add_u32_e32 v0, 0x7b, v0477; GFX9-NEXT: global_store_dword v2, v0, s[0:1]478; GFX9-NEXT: s_endpgm479 %ptr1 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 3480 %ptr2 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 100481 %ptr3 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 102482 483 store i32 123, ptr addrspace(3) %ptr1, align 4484 %tmp1 = load i32, ptr addrspace(3) %ptr2, align 4485 %tmp2 = load i32, ptr addrspace(3) %ptr3, align 4486 store i32 123, ptr addrspace(3) %ptr2, align 4487 %tmp3 = load i32, ptr addrspace(3) %ptr1, align 4488 store i32 789, ptr addrspace(3) %ptr3, align 4489 490 %add.0 = add nsw i32 %tmp2, %tmp1491 %add.1 = add nsw i32 %add.0, %tmp3492 store i32 %add.1, ptr addrspace(1) %out, align 4493 ret void494}495 496define amdgpu_kernel void @reorder_global_offsets(ptr addrspace(1) nocapture %out, ptr addrspace(1) noalias nocapture readnone %gptr, ptr addrspace(1) noalias nocapture %ptr0) #0 {497; CI-LABEL: reorder_global_offsets:498; CI: ; %bb.0:499; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0xd500; CI-NEXT: s_mov_b32 s7, 0xf000501; CI-NEXT: s_mov_b32 s6, -1502; CI-NEXT: s_mov_b32 s2, s6503; CI-NEXT: s_mov_b32 s3, s7504; CI-NEXT: s_waitcnt lgkmcnt(0)505; CI-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:400506; CI-NEXT: buffer_load_dword v1, off, s[0:3], 0 offset:408507; CI-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x9508; CI-NEXT: v_mov_b32_e32 v2, 0x7b509; CI-NEXT: v_mov_b32_e32 v3, 0x315510; CI-NEXT: buffer_store_dword v2, off, s[0:3], 0 offset:12511; CI-NEXT: buffer_store_dword v2, off, s[0:3], 0 offset:400512; CI-NEXT: buffer_store_dword v3, off, s[0:3], 0 offset:408513; CI-NEXT: s_waitcnt vmcnt(3)514; CI-NEXT: v_add_i32_e32 v0, vcc, v1, v0515; CI-NEXT: v_add_i32_e32 v0, vcc, 0x7b, v0516; CI-NEXT: s_waitcnt lgkmcnt(0)517; CI-NEXT: buffer_store_dword v0, off, s[4:7], 0518; CI-NEXT: s_endpgm519;520; GFX9-LABEL: reorder_global_offsets:521; GFX9: ; %bb.0:522; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x34523; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24524; GFX9-NEXT: v_mov_b32_e32 v0, 0525; GFX9-NEXT: v_mov_b32_e32 v3, 0x7b526; GFX9-NEXT: s_waitcnt lgkmcnt(0)527; GFX9-NEXT: global_load_dword v1, v0, s[0:1] offset:400528; GFX9-NEXT: global_load_dword v2, v0, s[0:1] offset:408529; GFX9-NEXT: s_nop 0530; GFX9-NEXT: global_store_dword v0, v3, s[0:1] offset:12531; GFX9-NEXT: global_store_dword v0, v3, s[0:1] offset:400532; GFX9-NEXT: v_mov_b32_e32 v3, 0x315533; GFX9-NEXT: global_store_dword v0, v3, s[0:1] offset:408534; GFX9-NEXT: s_waitcnt vmcnt(3)535; GFX9-NEXT: v_add_u32_e32 v1, v2, v1536; GFX9-NEXT: v_add_u32_e32 v1, 0x7b, v1537; GFX9-NEXT: global_store_dword v0, v1, s[2:3]538; GFX9-NEXT: s_endpgm539 %ptr1 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i32 3540 %ptr2 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i32 100541 %ptr3 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i32 102542 543 store i32 123, ptr addrspace(1) %ptr1, align 4544 %tmp1 = load i32, ptr addrspace(1) %ptr2, align 4545 %tmp2 = load i32, ptr addrspace(1) %ptr3, align 4546 store i32 123, ptr addrspace(1) %ptr2, align 4547 %tmp3 = load i32, ptr addrspace(1) %ptr1, align 4548 store i32 789, ptr addrspace(1) %ptr3, align 4549 550 %add.0 = add nsw i32 %tmp2, %tmp1551 %add.1 = add nsw i32 %add.0, %tmp3552 store i32 %add.1, ptr addrspace(1) %out, align 4553 ret void554}555 556define amdgpu_kernel void @reorder_global_offsets_addr64_soffset0(ptr addrspace(1) noalias nocapture %ptr.base) #0 {557; CI-LABEL: reorder_global_offsets_addr64_soffset0:558; CI: ; %bb.0:559; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9560; CI-NEXT: s_mov_b32 s3, 0xf000561; CI-NEXT: s_mov_b32 s2, 0562; CI-NEXT: v_lshlrev_b32_e32 v0, 2, v0563; CI-NEXT: v_mov_b32_e32 v1, 0564; CI-NEXT: s_waitcnt lgkmcnt(0)565; CI-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 offset:12566; CI-NEXT: buffer_load_dword v3, v[0:1], s[0:3], 0 addr64 offset:28567; CI-NEXT: buffer_load_dword v4, v[0:1], s[0:3], 0 addr64 offset:44568; CI-NEXT: v_mov_b32_e32 v5, 0x315569; CI-NEXT: v_mov_b32_e32 v6, 0x7b570; CI-NEXT: buffer_store_dword v5, v[0:1], s[0:3], 0 addr64571; CI-NEXT: buffer_store_dword v6, v[0:1], s[0:3], 0 addr64 offset:20572; CI-NEXT: s_waitcnt vmcnt(3)573; CI-NEXT: v_add_i32_e32 v2, vcc, v2, v3574; CI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:36575; CI-NEXT: s_waitcnt vmcnt(3)576; CI-NEXT: v_add_i32_e32 v2, vcc, v2, v4577; CI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 offset:52578; CI-NEXT: s_endpgm579;580; GFX9-LABEL: reorder_global_offsets_addr64_soffset0:581; GFX9: ; %bb.0:582; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24583; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0584; GFX9-NEXT: v_mov_b32_e32 v4, 0x315585; GFX9-NEXT: v_mov_b32_e32 v5, 0x7b586; GFX9-NEXT: s_waitcnt lgkmcnt(0)587; GFX9-NEXT: global_load_dword v1, v0, s[0:1] offset:12588; GFX9-NEXT: global_load_dword v2, v0, s[0:1] offset:28589; GFX9-NEXT: global_load_dword v3, v0, s[0:1] offset:44590; GFX9-NEXT: s_nop 0591; GFX9-NEXT: global_store_dword v0, v4, s[0:1]592; GFX9-NEXT: global_store_dword v0, v5, s[0:1] offset:20593; GFX9-NEXT: s_waitcnt vmcnt(3)594; GFX9-NEXT: v_add_u32_e32 v1, v1, v2595; GFX9-NEXT: global_store_dword v0, v1, s[0:1] offset:36596; GFX9-NEXT: s_waitcnt vmcnt(3)597; GFX9-NEXT: v_add_u32_e32 v1, v1, v3598; GFX9-NEXT: global_store_dword v0, v1, s[0:1] offset:52599; GFX9-NEXT: s_endpgm600 %id = call i32 @llvm.amdgcn.workitem.id.x()601 %id.ext = sext i32 %id to i64602 603 %ptr0 = getelementptr inbounds i32, ptr addrspace(1) %ptr.base, i64 %id.ext604 %ptr1 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i32 3605 %ptr2 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i32 5606 %ptr3 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i32 7607 %ptr4 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i32 9608 %ptr5 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i32 11609 %ptr6 = getelementptr inbounds i32, ptr addrspace(1) %ptr0, i32 13610 611 store i32 789, ptr addrspace(1) %ptr0, align 4612 %tmp1 = load i32, ptr addrspace(1) %ptr1, align 4613 store i32 123, ptr addrspace(1) %ptr2, align 4614 %tmp2 = load i32, ptr addrspace(1) %ptr3, align 4615 %add.0 = add nsw i32 %tmp1, %tmp2616 store i32 %add.0, ptr addrspace(1) %ptr4, align 4617 %tmp3 = load i32, ptr addrspace(1) %ptr5, align 4618 %add.1 = add nsw i32 %add.0, %tmp3619 store i32 %add.1, ptr addrspace(1) %ptr6, align 4620 ret void621}622 623define amdgpu_vs void @reorder_local_load_tbuffer_store_local_load(ptr addrspace(1) %out, i32 %a1, i32 %vaddr) #0 {624; CI-LABEL: reorder_local_load_tbuffer_store_local_load:625; CI: ; %bb.0:626; CI-NEXT: v_mov_b32_e32 v4, stored_lds_ptr@abs32@lo627; CI-NEXT: s_mov_b32 m0, -1628; CI-NEXT: ds_read_b32 v4, v4629; CI-NEXT: s_mov_b32 s2, 0630; CI-NEXT: s_mov_b32 s3, 0xf000631; CI-NEXT: s_mov_b32 s0, s2632; CI-NEXT: s_mov_b32 s1, s2633; CI-NEXT: s_waitcnt lgkmcnt(0)634; CI-NEXT: ds_read2_b32 v[4:5], v4 offset0:1 offset1:2635; CI-NEXT: v_add_i32_e32 v3, vcc, 32, v3636; CI-NEXT: s_waitcnt lgkmcnt(0)637; CI-NEXT: tbuffer_store_format_xyzw v[2:5], v3, s[0:3], 0 format:[BUF_DATA_FORMAT_32,BUF_NUM_FORMAT_SNORM_OGL] idxen glc slc638; CI-NEXT: s_nop 0639; CI-NEXT: v_add_i32_e32 v2, vcc, v4, v5640; CI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64641; CI-NEXT: s_endpgm642;643; GFX9-LABEL: reorder_local_load_tbuffer_store_local_load:644; GFX9: ; %bb.0:645; GFX9-NEXT: v_mov_b32_e32 v4, stored_lds_ptr@abs32@lo646; GFX9-NEXT: ds_read_b32 v4, v4647; GFX9-NEXT: v_add_u32_e32 v3, 32, v3648; GFX9-NEXT: s_waitcnt lgkmcnt(0)649; GFX9-NEXT: ds_read2_b32 v[4:5], v4 offset0:1 offset1:2650; GFX9-NEXT: s_waitcnt lgkmcnt(0)651; GFX9-NEXT: tbuffer_store_format_xyzw v[2:5], v3, s[0:3], 0 format:[BUF_DATA_FORMAT_32,BUF_NUM_FORMAT_RESERVED_6] idxen glc slc652; GFX9-NEXT: s_nop 0653; GFX9-NEXT: v_add_u32_e32 v2, v4, v5654; GFX9-NEXT: global_store_dword v[0:1], v2, off655; GFX9-NEXT: s_endpgm656 %ptr0 = load ptr addrspace(3), ptr addrspace(3) @stored_lds_ptr, align 4657 658 %ptr1 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 1659 %ptr2 = getelementptr inbounds i32, ptr addrspace(3) %ptr0, i32 2660 661 %tmp1 = load i32, ptr addrspace(3) %ptr1, align 4662 663 %vdata = insertelement <4 x i32> poison, i32 %a1, i32 0664 %vaddr.add = add i32 %vaddr, 32665 call void @llvm.amdgcn.struct.ptr.tbuffer.store.v4i32(<4 x i32> %vdata, ptr addrspace(8) poison, i32 %vaddr.add, i32 0, i32 0, i32 228, i32 3)666 667 %tmp2 = load i32, ptr addrspace(3) %ptr2, align 4668 669 %add = add nsw i32 %tmp1, %tmp2670 store i32 %add, ptr addrspace(1) %out, align 4671 ret void672}673 674declare void @llvm.memcpy.p3.p0(ptr addrspace(3), ptr, i64, i1)675declare void @llvm.amdgcn.s.barrier() #1676declare i32 @llvm.amdgcn.workitem.id.x() #2677declare void @llvm.amdgcn.struct.ptr.tbuffer.store.v4i32(<4 x i32>, ptr addrspace(8), i32, i32, i32, i32 immarg, i32 immarg) #3678 679attributes #0 = { nounwind }680attributes #1 = { convergent nounwind willreturn }681attributes #2 = { nounwind readnone speculatable willreturn }682attributes #3 = { nounwind willreturn writeonly }683