156 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=amdgcn < %s | FileCheck %s3 4; Check we can compile this bugpoint-reduced test without an5; infinite loop in TLI.SimplifyDemandedBits() due to failure6; to use return value of TLO.DAG.UpdateNodeOperands()7 8; Check that code was generated; we know there will be9; a s_endpgm, so check for it.10 11@0 = external unnamed_addr addrspace(3) global [462 x float], align 412 13declare i32 @llvm.amdgcn.workitem.id.y() #014declare i32 @llvm.amdgcn.workitem.id.x() #015declare float @llvm.fmuladd.f32(float, float, float) #016 17define amdgpu_kernel void @foo(ptr addrspace(1) noalias nocapture readonly %arg, ptr addrspace(1) noalias nocapture readonly %arg1, ptr addrspace(1) noalias nocapture %arg2, float %arg3, i1 %c0, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) local_unnamed_addr !reqd_work_group_size !0 {18; CHECK-LABEL: foo:19; CHECK: ; %bb.0: ; %bb20; CHECK-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x1021; CHECK-NEXT: v_lshlrev_b32_e32 v2, 2, v022; CHECK-NEXT: s_movk_i32 s0, 0x5423; CHECK-NEXT: v_mov_b32_e32 v0, 024; CHECK-NEXT: v_mad_u32_u24 v1, v1, s0, v225; CHECK-NEXT: s_waitcnt lgkmcnt(0)26; CHECK-NEXT: s_bitcmp1_b32 s2, 827; CHECK-NEXT: s_cselect_b64 s[0:1], -1, 028; CHECK-NEXT: s_bitcmp1_b32 s2, 1629; CHECK-NEXT: v_cndmask_b32_e64 v2, 0, 1, s[0:1]30; CHECK-NEXT: s_cselect_b64 s[4:5], -1, 031; CHECK-NEXT: v_cmp_ne_u32_e64 s[0:1], 1, v232; CHECK-NEXT: s_xor_b64 s[4:5], s[4:5], -133; CHECK-NEXT: s_bitcmp1_b32 s2, 2434; CHECK-NEXT: s_cselect_b64 s[6:7], -1, 035; CHECK-NEXT: s_xor_b64 s[6:7], s[6:7], -136; CHECK-NEXT: s_bitcmp1_b32 s3, 037; CHECK-NEXT: s_cselect_b64 s[8:9], -1, 038; CHECK-NEXT: s_bitcmp1_b32 s3, 839; CHECK-NEXT: s_cselect_b64 s[10:11], -1, 040; CHECK-NEXT: s_and_b64 s[2:3], exec, s[6:7]41; CHECK-NEXT: s_and_b64 s[4:5], exec, s[4:5]42; CHECK-NEXT: s_and_b64 s[6:7], exec, s[10:11]43; CHECK-NEXT: s_and_b64 s[8:9], exec, s[8:9]44; CHECK-NEXT: s_mov_b32 m0, -145; CHECK-NEXT: .LBB0_1: ; %.loopexit14546; CHECK-NEXT: ; =>This Loop Header: Depth=147; CHECK-NEXT: ; Child Loop BB0_3 Depth 248; CHECK-NEXT: ; Child Loop BB0_4 Depth 349; CHECK-NEXT: ; Child Loop BB0_5 Depth 250; CHECK-NEXT: v_mov_b32_e32 v2, v151; CHECK-NEXT: s_branch .LBB0_352; CHECK-NEXT: .LBB0_2: ; %.loopexit53; CHECK-NEXT: ; in Loop: Header=BB0_3 Depth=254; CHECK-NEXT: v_add_i32_e32 v2, vcc, 0x540, v255; CHECK-NEXT: s_mov_b64 vcc, s[4:5]56; CHECK-NEXT: s_cbranch_vccnz .LBB0_557; CHECK-NEXT: .LBB0_3: ; %bb1358; CHECK-NEXT: ; Parent Loop BB0_1 Depth=159; CHECK-NEXT: ; => This Loop Header: Depth=260; CHECK-NEXT: ; Child Loop BB0_4 Depth 361; CHECK-NEXT: s_and_b64 vcc, exec, s[0:1]62; CHECK-NEXT: v_mov_b32_e32 v3, v263; CHECK-NEXT: s_cbranch_vccnz .LBB0_264; CHECK-NEXT: .LBB0_4: ; %bb2165; CHECK-NEXT: ; Parent Loop BB0_1 Depth=166; CHECK-NEXT: ; Parent Loop BB0_3 Depth=267; CHECK-NEXT: ; => This Inner Loop Header: Depth=368; CHECK-NEXT: ds_write_b32 v3, v069; CHECK-NEXT: v_add_i32_e32 v3, vcc, 32, v370; CHECK-NEXT: s_mov_b64 vcc, s[2:3]71; CHECK-NEXT: s_cbranch_vccz .LBB0_472; CHECK-NEXT: s_branch .LBB0_273; CHECK-NEXT: .LBB0_5: ; %bb3174; CHECK-NEXT: ; Parent Loop BB0_1 Depth=175; CHECK-NEXT: ; => This Inner Loop Header: Depth=276; CHECK-NEXT: s_mov_b64 vcc, s[6:7]77; CHECK-NEXT: s_cbranch_vccz .LBB0_578; CHECK-NEXT: ; %bb.6: ; %bb3079; CHECK-NEXT: ; in Loop: Header=BB0_1 Depth=180; CHECK-NEXT: s_mov_b64 vcc, s[8:9]81; CHECK-NEXT: s_cbranch_vccz .LBB0_182; CHECK-NEXT: ; %bb.7: ; %bb1183; CHECK-NEXT: s_endpgm84bb:85 %tmp = tail call i32 @llvm.amdgcn.workitem.id.y()86 %tmp4 = tail call i32 @llvm.amdgcn.workitem.id.x()87 %tmp5 = and i32 %tmp, 1588 %tmp6 = mul nuw nsw i32 %tmp5, 2189 %tmp7 = sub i32 %tmp6, 090 %tmp8 = add i32 %tmp7, 091 %tmp9 = add i32 %tmp8, 092 br label %bb1293 94bb11: ; preds = %bb3095 br i1 %c0, label %bb37, label %bb3896 97bb12: ; preds = %bb30, %bb98 br i1 false, label %.preheader, label %.loopexit14599 100.loopexit145: ; preds = %.preheader, %bb12101 br label %bb13102 103bb13: ; preds = %.loopexit, %.loopexit145104 %tmp14 = phi i32 [ %tmp5, %.loopexit145 ], [ %tmp20, %.loopexit ]105 %tmp15 = add nsw i32 %tmp14, -3106 %tmp16 = mul i32 %tmp14, 21107 br i1 %c1, label %bb17, label %.loopexit108 109bb17: ; preds = %bb13110 %tmp18 = mul i32 %tmp15, 224111 %tmp19 = add i32 0, %tmp18112 br label %bb21113 114.loopexit: ; preds = %bb21, %bb13115 %tmp20 = add nuw nsw i32 %tmp14, 16116 br i1 %c2, label %bb13, label %bb26117 118bb21: ; preds = %bb21, %bb17119 %tmp22 = phi i32 [ %tmp4, %bb17 ], [ %tmp25, %bb21 ]120 %tmp23 = add i32 %tmp22, %tmp16121 %tmp24 = getelementptr inbounds float, ptr addrspace(3) @0, i32 %tmp23122 store float 0.0, ptr addrspace(3) %tmp24, align 4123 %tmp25 = add nuw i32 %tmp22, 8124 br i1 %c3, label %bb21, label %.loopexit125 126bb26: ; preds = %.loopexit127 br label %bb31128 129.preheader: ; preds = %.preheader, %bb12130 %tmp27 = phi i32 [ %tmp28, %.preheader ], [ poison, %bb12 ]131 %tmp28 = add nuw i32 %tmp27, 128132 %tmp29 = icmp ult i32 %tmp28, 1568133 br i1 %tmp29, label %.preheader, label %.loopexit145134 135bb30: ; preds = %bb31136 br i1 %c4, label %bb11, label %bb12137 138bb31: ; preds = %bb31, %bb26139 %tmp32 = phi i32 [ %tmp9, %bb26 ], [ poison, %bb31 ]140 %tmp33 = getelementptr inbounds [462 x float], ptr addrspace(3) @0, i32 0, i32 %tmp32141 %tmp34 = load float, ptr addrspace(3) %tmp33, align 4142 %tmp35 = tail call float @llvm.fmuladd.f32(float %tmp34, float poison, float poison)143 %tmp36 = tail call float @llvm.fmuladd.f32(float poison, float poison, float %tmp35)144 br i1 %c5, label %bb30, label %bb31145 146bb37: ; preds = %bb11147 br label %bb38148 149bb38: ; preds = %bb37, %bb11150 ret void151}152 153attributes #0 = { nounwind readnone speculatable }154 155!0 = !{i32 8, i32 16, i32 1}156