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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=amdgcn < %s | FileCheck --check-prefixes=GFX6 %s3; RUN: llc -mtriple=amdgcn -mcpu=tonga < %s | FileCheck --check-prefixes=GFX8 %s4; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 < %s | FileCheck --check-prefixes=GFX11,GFX11-TRUE16 %s5; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 < %s | FileCheck --check-prefixes=GFX11,GFX11-FAKE16 %s6 7; FIXME: This should be merged with sint_to_fp.ll, but s_sint_to_fp_v2i64 crashes on r6008 9define amdgpu_kernel void @s_sint_to_fp_i64_to_f16(ptr addrspace(1) %out, i64 %in) #0 {10; GFX6-LABEL: s_sint_to_fp_i64_to_f16:11; GFX6: ; %bb.0:12; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x913; GFX6-NEXT: s_mov_b32 s7, 0xf00014; GFX6-NEXT: s_mov_b32 s6, -115; GFX6-NEXT: s_waitcnt lgkmcnt(0)16; GFX6-NEXT: s_mov_b32 s4, s017; GFX6-NEXT: s_mov_b32 s5, s118; GFX6-NEXT: s_flbit_i32 s0, s319; GFX6-NEXT: s_xor_b32 s1, s2, s320; GFX6-NEXT: s_add_i32 s0, s0, -121; GFX6-NEXT: s_ashr_i32 s1, s1, 3122; GFX6-NEXT: s_add_i32 s1, s1, 3223; GFX6-NEXT: s_min_u32 s8, s0, s124; GFX6-NEXT: s_lshl_b64 s[0:1], s[2:3], s825; GFX6-NEXT: s_min_u32 s0, s0, 126; GFX6-NEXT: s_or_b32 s0, s1, s027; GFX6-NEXT: v_cvt_f32_i32_e32 v0, s028; GFX6-NEXT: s_sub_i32 s0, 32, s829; GFX6-NEXT: v_ldexp_f32_e64 v0, v0, s030; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v031; GFX6-NEXT: buffer_store_short v0, off, s[4:7], 032; GFX6-NEXT: s_endpgm33;34; GFX8-LABEL: s_sint_to_fp_i64_to_f16:35; GFX8: ; %bb.0:36; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x2437; GFX8-NEXT: s_waitcnt lgkmcnt(0)38; GFX8-NEXT: s_xor_b32 s5, s2, s339; GFX8-NEXT: s_flbit_i32 s4, s340; GFX8-NEXT: s_ashr_i32 s5, s5, 3141; GFX8-NEXT: s_add_i32 s4, s4, -142; GFX8-NEXT: s_add_i32 s5, s5, 3243; GFX8-NEXT: s_min_u32 s4, s4, s544; GFX8-NEXT: s_lshl_b64 s[2:3], s[2:3], s445; GFX8-NEXT: s_min_u32 s2, s2, 146; GFX8-NEXT: s_or_b32 s2, s3, s247; GFX8-NEXT: v_cvt_f32_i32_e32 v0, s248; GFX8-NEXT: s_sub_i32 s2, 32, s449; GFX8-NEXT: v_mov_b32_e32 v1, s150; GFX8-NEXT: v_ldexp_f32 v0, v0, s251; GFX8-NEXT: v_cvt_f16_f32_e32 v2, v052; GFX8-NEXT: v_mov_b32_e32 v0, s053; GFX8-NEXT: flat_store_short v[0:1], v254; GFX8-NEXT: s_endpgm55;56; GFX11-TRUE16-LABEL: s_sint_to_fp_i64_to_f16:57; GFX11-TRUE16: ; %bb.0:58; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x2459; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 060; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)61; GFX11-TRUE16-NEXT: s_xor_b32 s4, s2, s362; GFX11-TRUE16-NEXT: s_cls_i32 s5, s363; GFX11-TRUE16-NEXT: s_ashr_i32 s4, s4, 3164; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, -165; GFX11-TRUE16-NEXT: s_add_i32 s4, s4, 3266; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)67; GFX11-TRUE16-NEXT: s_min_u32 s4, s5, s468; GFX11-TRUE16-NEXT: s_lshl_b64 s[2:3], s[2:3], s469; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)70; GFX11-TRUE16-NEXT: s_min_u32 s2, s2, 171; GFX11-TRUE16-NEXT: s_or_b32 s2, s3, s272; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)73; GFX11-TRUE16-NEXT: v_cvt_f32_i32_e32 v0, s274; GFX11-TRUE16-NEXT: s_sub_i32 s2, 32, s475; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)76; GFX11-TRUE16-NEXT: v_ldexp_f32 v0, v0, s277; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)78; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v079; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]80; GFX11-TRUE16-NEXT: s_endpgm81;82; GFX11-FAKE16-LABEL: s_sint_to_fp_i64_to_f16:83; GFX11-FAKE16: ; %bb.0:84; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x2485; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 086; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)87; GFX11-FAKE16-NEXT: s_xor_b32 s4, s2, s388; GFX11-FAKE16-NEXT: s_cls_i32 s5, s389; GFX11-FAKE16-NEXT: s_ashr_i32 s4, s4, 3190; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, -191; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, 3292; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)93; GFX11-FAKE16-NEXT: s_min_u32 s4, s5, s494; GFX11-FAKE16-NEXT: s_lshl_b64 s[2:3], s[2:3], s495; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)96; GFX11-FAKE16-NEXT: s_min_u32 s2, s2, 197; GFX11-FAKE16-NEXT: s_or_b32 s2, s3, s298; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)99; GFX11-FAKE16-NEXT: v_cvt_f32_i32_e32 v0, s2100; GFX11-FAKE16-NEXT: s_sub_i32 s2, 32, s4101; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)102; GFX11-FAKE16-NEXT: v_ldexp_f32 v0, v0, s2103; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)104; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0105; GFX11-FAKE16-NEXT: global_store_b16 v1, v0, s[0:1]106; GFX11-FAKE16-NEXT: s_endpgm107 %result = sitofp i64 %in to half108 store half %result, ptr addrspace(1) %out109 ret void110}111 112define amdgpu_kernel void @v_sint_to_fp_i64_to_f16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {113; GFX6-LABEL: v_sint_to_fp_i64_to_f16:114; GFX6: ; %bb.0:115; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9116; GFX6-NEXT: s_mov_b32 s7, 0xf000117; GFX6-NEXT: s_mov_b32 s6, 0118; GFX6-NEXT: v_lshlrev_b32_e32 v1, 3, v0119; GFX6-NEXT: v_mov_b32_e32 v2, 0120; GFX6-NEXT: s_waitcnt lgkmcnt(0)121; GFX6-NEXT: s_mov_b64 s[4:5], s[2:3]122; GFX6-NEXT: buffer_load_dwordx2 v[3:4], v[1:2], s[4:7], 0 addr64123; GFX6-NEXT: v_lshlrev_b32_e32 v1, 1, v0124; GFX6-NEXT: s_mov_b64 s[2:3], s[6:7]125; GFX6-NEXT: s_waitcnt vmcnt(0)126; GFX6-NEXT: v_xor_b32_e32 v0, v3, v4127; GFX6-NEXT: v_ffbh_i32_e32 v5, v4128; GFX6-NEXT: v_ashrrev_i32_e32 v0, 31, v0129; GFX6-NEXT: v_add_i32_e32 v5, vcc, -1, v5130; GFX6-NEXT: v_add_i32_e32 v0, vcc, 32, v0131; GFX6-NEXT: v_min_u32_e32 v0, v5, v0132; GFX6-NEXT: v_lshl_b64 v[3:4], v[3:4], v0133; GFX6-NEXT: v_min_u32_e32 v3, 1, v3134; GFX6-NEXT: v_or_b32_e32 v3, v4, v3135; GFX6-NEXT: v_cvt_f32_i32_e32 v3, v3136; GFX6-NEXT: v_sub_i32_e32 v0, vcc, 32, v0137; GFX6-NEXT: v_ldexp_f32_e32 v0, v3, v0138; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0139; GFX6-NEXT: buffer_store_short v0, v[1:2], s[0:3], 0 addr64140; GFX6-NEXT: s_endpgm141;142; GFX8-LABEL: v_sint_to_fp_i64_to_f16:143; GFX8: ; %bb.0:144; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24145; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v0146; GFX8-NEXT: v_lshlrev_b32_e32 v0, 1, v0147; GFX8-NEXT: s_waitcnt lgkmcnt(0)148; GFX8-NEXT: v_mov_b32_e32 v2, s3149; GFX8-NEXT: v_add_u32_e32 v1, vcc, s2, v1150; GFX8-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc151; GFX8-NEXT: flat_load_dwordx2 v[1:2], v[1:2]152; GFX8-NEXT: s_waitcnt vmcnt(0)153; GFX8-NEXT: v_xor_b32_e32 v3, v1, v2154; GFX8-NEXT: v_ffbh_i32_e32 v4, v2155; GFX8-NEXT: v_ashrrev_i32_e32 v3, 31, v3156; GFX8-NEXT: v_add_u32_e32 v4, vcc, -1, v4157; GFX8-NEXT: v_add_u32_e32 v3, vcc, 32, v3158; GFX8-NEXT: v_min_u32_e32 v3, v4, v3159; GFX8-NEXT: v_lshlrev_b64 v[1:2], v3, v[1:2]160; GFX8-NEXT: v_sub_u32_e32 v3, vcc, 32, v3161; GFX8-NEXT: v_min_u32_e32 v1, 1, v1162; GFX8-NEXT: v_or_b32_e32 v1, v2, v1163; GFX8-NEXT: v_cvt_f32_i32_e32 v1, v1164; GFX8-NEXT: v_mov_b32_e32 v2, s1165; GFX8-NEXT: v_add_u32_e32 v0, vcc, s0, v0166; GFX8-NEXT: v_ldexp_f32 v1, v1, v3167; GFX8-NEXT: v_cvt_f16_f32_e32 v3, v1168; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v2, vcc169; GFX8-NEXT: flat_store_short v[0:1], v3170; GFX8-NEXT: s_endpgm171;172; GFX11-TRUE16-LABEL: v_sint_to_fp_i64_to_f16:173; GFX11-TRUE16: ; %bb.0:174; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24175; GFX11-TRUE16-NEXT: v_and_b32_e32 v2, 0x3ff, v0176; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)177; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v0, 3, v2178; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)179; GFX11-TRUE16-NEXT: global_load_b64 v[0:1], v0, s[2:3]180; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)181; GFX11-TRUE16-NEXT: v_xor_b32_e32 v3, v0, v1182; GFX11-TRUE16-NEXT: v_cls_i32_e32 v4, v1183; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)184; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v3, 31, v3185; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, -1, v4186; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)187; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 32, v3188; GFX11-TRUE16-NEXT: v_min_u32_e32 v3, v4, v3189; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)190; GFX11-TRUE16-NEXT: v_lshlrev_b64 v[0:1], v3, v[0:1]191; GFX11-TRUE16-NEXT: v_min_u32_e32 v0, 1, v0192; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)193; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v0194; GFX11-TRUE16-NEXT: v_sub_nc_u32_e32 v1, 32, v3195; GFX11-TRUE16-NEXT: v_cvt_f32_i32_e32 v0, v0196; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)197; GFX11-TRUE16-NEXT: v_ldexp_f32 v0, v0, v1198; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 1, v2199; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0200; GFX11-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]201; GFX11-TRUE16-NEXT: s_endpgm202;203; GFX11-FAKE16-LABEL: v_sint_to_fp_i64_to_f16:204; GFX11-FAKE16: ; %bb.0:205; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24206; GFX11-FAKE16-NEXT: v_and_b32_e32 v2, 0x3ff, v0207; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)208; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v0, 3, v2209; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)210; GFX11-FAKE16-NEXT: global_load_b64 v[0:1], v0, s[2:3]211; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)212; GFX11-FAKE16-NEXT: v_xor_b32_e32 v3, v0, v1213; GFX11-FAKE16-NEXT: v_cls_i32_e32 v4, v1214; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)215; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v3, 31, v3216; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, -1, v4217; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)218; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 32, v3219; GFX11-FAKE16-NEXT: v_min_u32_e32 v3, v4, v3220; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)221; GFX11-FAKE16-NEXT: v_lshlrev_b64 v[0:1], v3, v[0:1]222; GFX11-FAKE16-NEXT: v_min_u32_e32 v0, 1, v0223; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)224; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v0225; GFX11-FAKE16-NEXT: v_sub_nc_u32_e32 v1, 32, v3226; GFX11-FAKE16-NEXT: v_cvt_f32_i32_e32 v0, v0227; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)228; GFX11-FAKE16-NEXT: v_ldexp_f32 v0, v0, v1229; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 1, v2230; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0231; GFX11-FAKE16-NEXT: global_store_b16 v1, v0, s[0:1]232; GFX11-FAKE16-NEXT: s_endpgm233 %tid = call i32 @llvm.amdgcn.workitem.id.x()234 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %tid235 %out.gep = getelementptr half, ptr addrspace(1) %out, i32 %tid236 %val = load i64, ptr addrspace(1) %in.gep237 %result = sitofp i64 %val to half238 store half %result, ptr addrspace(1) %out.gep239 ret void240}241 242define amdgpu_kernel void @s_sint_to_fp_i64_to_f32(ptr addrspace(1) %out, i64 %in) #0 {243; GFX6-LABEL: s_sint_to_fp_i64_to_f32:244; GFX6: ; %bb.0:245; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9246; GFX6-NEXT: s_mov_b32 s7, 0xf000247; GFX6-NEXT: s_mov_b32 s6, -1248; GFX6-NEXT: s_waitcnt lgkmcnt(0)249; GFX6-NEXT: s_mov_b32 s4, s0250; GFX6-NEXT: s_mov_b32 s5, s1251; GFX6-NEXT: s_flbit_i32 s0, s3252; GFX6-NEXT: s_xor_b32 s1, s2, s3253; GFX6-NEXT: s_add_i32 s0, s0, -1254; GFX6-NEXT: s_ashr_i32 s1, s1, 31255; GFX6-NEXT: s_add_i32 s1, s1, 32256; GFX6-NEXT: s_min_u32 s8, s0, s1257; GFX6-NEXT: s_lshl_b64 s[0:1], s[2:3], s8258; GFX6-NEXT: s_min_u32 s0, s0, 1259; GFX6-NEXT: s_or_b32 s0, s1, s0260; GFX6-NEXT: v_cvt_f32_i32_e32 v0, s0261; GFX6-NEXT: s_sub_i32 s0, 32, s8262; GFX6-NEXT: v_ldexp_f32_e64 v0, v0, s0263; GFX6-NEXT: buffer_store_dword v0, off, s[4:7], 0264; GFX6-NEXT: s_endpgm265;266; GFX8-LABEL: s_sint_to_fp_i64_to_f32:267; GFX8: ; %bb.0:268; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24269; GFX8-NEXT: s_waitcnt lgkmcnt(0)270; GFX8-NEXT: s_xor_b32 s5, s2, s3271; GFX8-NEXT: s_flbit_i32 s4, s3272; GFX8-NEXT: s_ashr_i32 s5, s5, 31273; GFX8-NEXT: s_add_i32 s4, s4, -1274; GFX8-NEXT: s_add_i32 s5, s5, 32275; GFX8-NEXT: s_min_u32 s4, s4, s5276; GFX8-NEXT: s_lshl_b64 s[2:3], s[2:3], s4277; GFX8-NEXT: s_min_u32 s2, s2, 1278; GFX8-NEXT: s_or_b32 s2, s3, s2279; GFX8-NEXT: v_cvt_f32_i32_e32 v2, s2280; GFX8-NEXT: v_mov_b32_e32 v0, s0281; GFX8-NEXT: s_sub_i32 s0, 32, s4282; GFX8-NEXT: v_mov_b32_e32 v1, s1283; GFX8-NEXT: v_ldexp_f32 v2, v2, s0284; GFX8-NEXT: flat_store_dword v[0:1], v2285; GFX8-NEXT: s_endpgm286;287; GFX11-LABEL: s_sint_to_fp_i64_to_f32:288; GFX11: ; %bb.0:289; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24290; GFX11-NEXT: v_mov_b32_e32 v1, 0291; GFX11-NEXT: s_waitcnt lgkmcnt(0)292; GFX11-NEXT: s_xor_b32 s4, s2, s3293; GFX11-NEXT: s_cls_i32 s5, s3294; GFX11-NEXT: s_ashr_i32 s4, s4, 31295; GFX11-NEXT: s_add_i32 s5, s5, -1296; GFX11-NEXT: s_add_i32 s4, s4, 32297; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)298; GFX11-NEXT: s_min_u32 s4, s5, s4299; GFX11-NEXT: s_lshl_b64 s[2:3], s[2:3], s4300; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)301; GFX11-NEXT: s_min_u32 s2, s2, 1302; GFX11-NEXT: s_or_b32 s2, s3, s2303; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)304; GFX11-NEXT: v_cvt_f32_i32_e32 v0, s2305; GFX11-NEXT: s_sub_i32 s2, 32, s4306; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)307; GFX11-NEXT: v_ldexp_f32 v0, v0, s2308; GFX11-NEXT: global_store_b32 v1, v0, s[0:1]309; GFX11-NEXT: s_endpgm310 %result = sitofp i64 %in to float311 store float %result, ptr addrspace(1) %out312 ret void313}314 315define amdgpu_kernel void @v_sint_to_fp_i64_to_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {316; GFX6-LABEL: v_sint_to_fp_i64_to_f32:317; GFX6: ; %bb.0:318; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9319; GFX6-NEXT: s_mov_b32 s7, 0xf000320; GFX6-NEXT: s_mov_b32 s6, 0321; GFX6-NEXT: v_lshlrev_b32_e32 v1, 3, v0322; GFX6-NEXT: v_mov_b32_e32 v2, 0323; GFX6-NEXT: s_waitcnt lgkmcnt(0)324; GFX6-NEXT: s_mov_b64 s[4:5], s[2:3]325; GFX6-NEXT: buffer_load_dwordx2 v[3:4], v[1:2], s[4:7], 0 addr64326; GFX6-NEXT: v_lshlrev_b32_e32 v1, 2, v0327; GFX6-NEXT: s_mov_b64 s[2:3], s[6:7]328; GFX6-NEXT: s_waitcnt vmcnt(0)329; GFX6-NEXT: v_xor_b32_e32 v0, v3, v4330; GFX6-NEXT: v_ffbh_i32_e32 v5, v4331; GFX6-NEXT: v_ashrrev_i32_e32 v0, 31, v0332; GFX6-NEXT: v_add_i32_e32 v5, vcc, -1, v5333; GFX6-NEXT: v_add_i32_e32 v0, vcc, 32, v0334; GFX6-NEXT: v_min_u32_e32 v0, v5, v0335; GFX6-NEXT: v_lshl_b64 v[3:4], v[3:4], v0336; GFX6-NEXT: v_min_u32_e32 v3, 1, v3337; GFX6-NEXT: v_or_b32_e32 v3, v4, v3338; GFX6-NEXT: v_cvt_f32_i32_e32 v3, v3339; GFX6-NEXT: v_sub_i32_e32 v0, vcc, 32, v0340; GFX6-NEXT: v_ldexp_f32_e32 v0, v3, v0341; GFX6-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64342; GFX6-NEXT: s_endpgm343;344; GFX8-LABEL: v_sint_to_fp_i64_to_f32:345; GFX8: ; %bb.0:346; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24347; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v0348; GFX8-NEXT: v_lshlrev_b32_e32 v3, 2, v0349; GFX8-NEXT: s_waitcnt lgkmcnt(0)350; GFX8-NEXT: v_mov_b32_e32 v2, s3351; GFX8-NEXT: v_add_u32_e32 v1, vcc, s2, v1352; GFX8-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc353; GFX8-NEXT: flat_load_dwordx2 v[1:2], v[1:2]354; GFX8-NEXT: s_waitcnt vmcnt(0)355; GFX8-NEXT: v_xor_b32_e32 v0, v1, v2356; GFX8-NEXT: v_ffbh_i32_e32 v4, v2357; GFX8-NEXT: v_ashrrev_i32_e32 v0, 31, v0358; GFX8-NEXT: v_add_u32_e32 v4, vcc, -1, v4359; GFX8-NEXT: v_add_u32_e32 v0, vcc, 32, v0360; GFX8-NEXT: v_min_u32_e32 v4, v4, v0361; GFX8-NEXT: v_lshlrev_b64 v[0:1], v4, v[1:2]362; GFX8-NEXT: v_mov_b32_e32 v2, s1363; GFX8-NEXT: v_min_u32_e32 v0, 1, v0364; GFX8-NEXT: v_or_b32_e32 v0, v1, v0365; GFX8-NEXT: v_cvt_f32_i32_e32 v5, v0366; GFX8-NEXT: v_add_u32_e32 v0, vcc, s0, v3367; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v2, vcc368; GFX8-NEXT: v_sub_u32_e32 v2, vcc, 32, v4369; GFX8-NEXT: v_ldexp_f32 v2, v5, v2370; GFX8-NEXT: flat_store_dword v[0:1], v2371; GFX8-NEXT: s_endpgm372;373; GFX11-LABEL: v_sint_to_fp_i64_to_f32:374; GFX11: ; %bb.0:375; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24376; GFX11-NEXT: v_and_b32_e32 v2, 0x3ff, v0377; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)378; GFX11-NEXT: v_lshlrev_b32_e32 v0, 3, v2379; GFX11-NEXT: v_lshlrev_b32_e32 v2, 2, v2380; GFX11-NEXT: s_waitcnt lgkmcnt(0)381; GFX11-NEXT: global_load_b64 v[0:1], v0, s[2:3]382; GFX11-NEXT: s_waitcnt vmcnt(0)383; GFX11-NEXT: v_xor_b32_e32 v3, v0, v1384; GFX11-NEXT: v_cls_i32_e32 v4, v1385; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)386; GFX11-NEXT: v_ashrrev_i32_e32 v3, 31, v3387; GFX11-NEXT: v_add_nc_u32_e32 v4, -1, v4388; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)389; GFX11-NEXT: v_add_nc_u32_e32 v3, 32, v3390; GFX11-NEXT: v_min_u32_e32 v3, v4, v3391; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)392; GFX11-NEXT: v_lshlrev_b64 v[0:1], v3, v[0:1]393; GFX11-NEXT: v_min_u32_e32 v0, 1, v0394; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)395; GFX11-NEXT: v_or_b32_e32 v0, v1, v0396; GFX11-NEXT: v_sub_nc_u32_e32 v1, 32, v3397; GFX11-NEXT: v_cvt_f32_i32_e32 v0, v0398; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)399; GFX11-NEXT: v_ldexp_f32 v0, v0, v1400; GFX11-NEXT: global_store_b32 v2, v0, s[0:1]401; GFX11-NEXT: s_endpgm402 %tid = call i32 @llvm.amdgcn.workitem.id.x()403 %in.gep = getelementptr i64, ptr addrspace(1) %in, i32 %tid404 %out.gep = getelementptr float, ptr addrspace(1) %out, i32 %tid405 %val = load i64, ptr addrspace(1) %in.gep406 %result = sitofp i64 %val to float407 store float %result, ptr addrspace(1) %out.gep408 ret void409}410 411define amdgpu_kernel void @s_sint_to_fp_v2i64_to_v2f32(ptr addrspace(1) %out, <2 x i64> %in) #0{412; GFX6-LABEL: s_sint_to_fp_v2i64_to_v2f32:413; GFX6: ; %bb.0:414; GFX6-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0xd415; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9416; GFX6-NEXT: s_mov_b32 s3, 0xf000417; GFX6-NEXT: s_mov_b32 s2, -1418; GFX6-NEXT: s_waitcnt lgkmcnt(0)419; GFX6-NEXT: s_flbit_i32 s4, s11420; GFX6-NEXT: s_xor_b32 s5, s10, s11421; GFX6-NEXT: s_flbit_i32 s6, s9422; GFX6-NEXT: s_xor_b32 s7, s8, s9423; GFX6-NEXT: s_add_i32 s4, s4, -1424; GFX6-NEXT: s_ashr_i32 s5, s5, 31425; GFX6-NEXT: s_add_i32 s6, s6, -1426; GFX6-NEXT: s_ashr_i32 s7, s7, 31427; GFX6-NEXT: s_add_i32 s5, s5, 32428; GFX6-NEXT: s_add_i32 s7, s7, 32429; GFX6-NEXT: s_min_u32 s12, s4, s5430; GFX6-NEXT: s_min_u32 s13, s6, s7431; GFX6-NEXT: s_lshl_b64 s[4:5], s[10:11], s12432; GFX6-NEXT: s_sub_i32 s10, 32, s12433; GFX6-NEXT: s_lshl_b64 s[6:7], s[8:9], s13434; GFX6-NEXT: s_sub_i32 s8, 32, s13435; GFX6-NEXT: s_min_u32 s4, s4, 1436; GFX6-NEXT: s_min_u32 s6, s6, 1437; GFX6-NEXT: s_or_b32 s4, s5, s4438; GFX6-NEXT: s_or_b32 s5, s7, s6439; GFX6-NEXT: v_cvt_f32_i32_e32 v0, s4440; GFX6-NEXT: v_cvt_f32_i32_e32 v2, s5441; GFX6-NEXT: v_ldexp_f32_e64 v1, v0, s10442; GFX6-NEXT: v_ldexp_f32_e64 v0, v2, s8443; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0444; GFX6-NEXT: s_endpgm445;446; GFX8-LABEL: s_sint_to_fp_v2i64_to_v2f32:447; GFX8: ; %bb.0:448; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34449; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24450; GFX8-NEXT: s_waitcnt lgkmcnt(0)451; GFX8-NEXT: s_xor_b32 s7, s2, s3452; GFX8-NEXT: s_flbit_i32 s6, s3453; GFX8-NEXT: s_ashr_i32 s7, s7, 31454; GFX8-NEXT: s_add_i32 s6, s6, -1455; GFX8-NEXT: s_add_i32 s7, s7, 32456; GFX8-NEXT: s_min_u32 s6, s6, s7457; GFX8-NEXT: s_lshl_b64 s[2:3], s[2:3], s6458; GFX8-NEXT: s_min_u32 s2, s2, 1459; GFX8-NEXT: s_or_b32 s2, s3, s2460; GFX8-NEXT: v_cvt_f32_i32_e32 v0, s2461; GFX8-NEXT: s_xor_b32 s2, s0, s1462; GFX8-NEXT: s_flbit_i32 s8, s1463; GFX8-NEXT: s_ashr_i32 s2, s2, 31464; GFX8-NEXT: s_add_i32 s8, s8, -1465; GFX8-NEXT: s_add_i32 s2, s2, 32466; GFX8-NEXT: s_min_u32 s2, s8, s2467; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s2468; GFX8-NEXT: s_min_u32 s0, s0, 1469; GFX8-NEXT: s_or_b32 s0, s1, s0470; GFX8-NEXT: v_cvt_f32_i32_e32 v2, s0471; GFX8-NEXT: s_sub_i32 s0, 32, s6472; GFX8-NEXT: v_ldexp_f32 v1, v0, s0473; GFX8-NEXT: s_sub_i32 s0, 32, s2474; GFX8-NEXT: v_ldexp_f32 v0, v2, s0475; GFX8-NEXT: v_mov_b32_e32 v2, s4476; GFX8-NEXT: v_mov_b32_e32 v3, s5477; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]478; GFX8-NEXT: s_endpgm479;480; GFX11-LABEL: s_sint_to_fp_v2i64_to_v2f32:481; GFX11: ; %bb.0:482; GFX11-NEXT: s_clause 0x1483; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x34484; GFX11-NEXT: s_load_b64 s[4:5], s[4:5], 0x24485; GFX11-NEXT: v_mov_b32_e32 v3, 0486; GFX11-NEXT: s_waitcnt lgkmcnt(0)487; GFX11-NEXT: s_xor_b32 s7, s2, s3488; GFX11-NEXT: s_xor_b32 s9, s0, s1489; GFX11-NEXT: s_cls_i32 s6, s3490; GFX11-NEXT: s_cls_i32 s8, s1491; GFX11-NEXT: s_ashr_i32 s7, s7, 31492; GFX11-NEXT: s_ashr_i32 s9, s9, 31493; GFX11-NEXT: s_add_i32 s6, s6, -1494; GFX11-NEXT: s_add_i32 s8, s8, -1495; GFX11-NEXT: s_add_i32 s7, s7, 32496; GFX11-NEXT: s_add_i32 s9, s9, 32497; GFX11-NEXT: s_min_u32 s6, s6, s7498; GFX11-NEXT: s_min_u32 s7, s8, s9499; GFX11-NEXT: s_lshl_b64 s[2:3], s[2:3], s6500; GFX11-NEXT: s_lshl_b64 s[0:1], s[0:1], s7501; GFX11-NEXT: s_min_u32 s2, s2, 1502; GFX11-NEXT: s_min_u32 s0, s0, 1503; GFX11-NEXT: s_or_b32 s2, s3, s2504; GFX11-NEXT: s_or_b32 s0, s1, s0505; GFX11-NEXT: v_cvt_f32_i32_e32 v0, s2506; GFX11-NEXT: v_cvt_f32_i32_e32 v2, s0507; GFX11-NEXT: s_sub_i32 s0, 32, s6508; GFX11-NEXT: s_sub_i32 s1, 32, s7509; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)510; GFX11-NEXT: v_ldexp_f32 v1, v0, s0511; GFX11-NEXT: v_ldexp_f32 v0, v2, s1512; GFX11-NEXT: global_store_b64 v3, v[0:1], s[4:5]513; GFX11-NEXT: s_endpgm514 %result = sitofp <2 x i64> %in to <2 x float>515 store <2 x float> %result, ptr addrspace(1) %out516 ret void517}518 519define amdgpu_kernel void @v_sint_to_fp_v4i64_to_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {520; GFX6-LABEL: v_sint_to_fp_v4i64_to_v4f32:521; GFX6: ; %bb.0:522; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9523; GFX6-NEXT: s_mov_b32 s7, 0xf000524; GFX6-NEXT: s_mov_b32 s6, 0525; GFX6-NEXT: v_lshlrev_b32_e32 v8, 5, v0526; GFX6-NEXT: v_mov_b32_e32 v9, 0527; GFX6-NEXT: s_waitcnt lgkmcnt(0)528; GFX6-NEXT: s_mov_b64 s[4:5], s[2:3]529; GFX6-NEXT: buffer_load_dwordx4 v[1:4], v[8:9], s[4:7], 0 addr64 offset:16530; GFX6-NEXT: buffer_load_dwordx4 v[5:8], v[8:9], s[4:7], 0 addr64531; GFX6-NEXT: v_lshlrev_b32_e32 v10, 4, v0532; GFX6-NEXT: v_mov_b32_e32 v11, v9533; GFX6-NEXT: s_mov_b64 s[2:3], s[6:7]534; GFX6-NEXT: s_waitcnt vmcnt(1)535; GFX6-NEXT: v_xor_b32_e32 v0, v3, v4536; GFX6-NEXT: v_ffbh_i32_e32 v9, v4537; GFX6-NEXT: v_xor_b32_e32 v12, v1, v2538; GFX6-NEXT: v_ffbh_i32_e32 v13, v2539; GFX6-NEXT: s_waitcnt vmcnt(0)540; GFX6-NEXT: v_xor_b32_e32 v14, v7, v8541; GFX6-NEXT: v_ffbh_i32_e32 v15, v8542; GFX6-NEXT: v_xor_b32_e32 v16, v5, v6543; GFX6-NEXT: v_ffbh_i32_e32 v17, v6544; GFX6-NEXT: v_ashrrev_i32_e32 v0, 31, v0545; GFX6-NEXT: v_add_i32_e32 v9, vcc, -1, v9546; GFX6-NEXT: v_ashrrev_i32_e32 v12, 31, v12547; GFX6-NEXT: v_add_i32_e32 v13, vcc, -1, v13548; GFX6-NEXT: v_ashrrev_i32_e32 v14, 31, v14549; GFX6-NEXT: v_add_i32_e32 v15, vcc, -1, v15550; GFX6-NEXT: v_ashrrev_i32_e32 v16, 31, v16551; GFX6-NEXT: v_add_i32_e32 v17, vcc, -1, v17552; GFX6-NEXT: v_add_i32_e32 v0, vcc, 32, v0553; GFX6-NEXT: v_add_i32_e32 v12, vcc, 32, v12554; GFX6-NEXT: v_add_i32_e32 v14, vcc, 32, v14555; GFX6-NEXT: v_add_i32_e32 v16, vcc, 32, v16556; GFX6-NEXT: v_min_u32_e32 v0, v9, v0557; GFX6-NEXT: v_min_u32_e32 v9, v13, v12558; GFX6-NEXT: v_min_u32_e32 v12, v15, v14559; GFX6-NEXT: v_min_u32_e32 v13, v17, v16560; GFX6-NEXT: v_lshl_b64 v[3:4], v[3:4], v0561; GFX6-NEXT: v_sub_i32_e32 v14, vcc, 32, v0562; GFX6-NEXT: v_lshl_b64 v[0:1], v[1:2], v9563; GFX6-NEXT: v_sub_i32_e32 v2, vcc, 32, v9564; GFX6-NEXT: v_lshl_b64 v[7:8], v[7:8], v12565; GFX6-NEXT: v_sub_i32_e32 v9, vcc, 32, v12566; GFX6-NEXT: v_lshl_b64 v[5:6], v[5:6], v13567; GFX6-NEXT: v_sub_i32_e32 v12, vcc, 32, v13568; GFX6-NEXT: v_min_u32_e32 v3, 1, v3569; GFX6-NEXT: v_min_u32_e32 v0, 1, v0570; GFX6-NEXT: v_min_u32_e32 v7, 1, v7571; GFX6-NEXT: v_min_u32_e32 v5, 1, v5572; GFX6-NEXT: v_or_b32_e32 v3, v4, v3573; GFX6-NEXT: v_or_b32_e32 v0, v1, v0574; GFX6-NEXT: v_or_b32_e32 v1, v8, v7575; GFX6-NEXT: v_or_b32_e32 v4, v6, v5576; GFX6-NEXT: v_cvt_f32_i32_e32 v3, v3577; GFX6-NEXT: v_cvt_f32_i32_e32 v0, v0578; GFX6-NEXT: v_cvt_f32_i32_e32 v1, v1579; GFX6-NEXT: v_cvt_f32_i32_e32 v4, v4580; GFX6-NEXT: v_ldexp_f32_e32 v3, v3, v14581; GFX6-NEXT: v_ldexp_f32_e32 v2, v0, v2582; GFX6-NEXT: v_ldexp_f32_e32 v1, v1, v9583; GFX6-NEXT: v_ldexp_f32_e32 v0, v4, v12584; GFX6-NEXT: buffer_store_dwordx4 v[0:3], v[10:11], s[0:3], 0 addr64585; GFX6-NEXT: s_endpgm586;587; GFX8-LABEL: v_sint_to_fp_v4i64_to_v4f32:588; GFX8: ; %bb.0:589; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24590; GFX8-NEXT: v_lshlrev_b32_e32 v1, 5, v0591; GFX8-NEXT: v_lshlrev_b32_e32 v0, 4, v0592; GFX8-NEXT: s_waitcnt lgkmcnt(0)593; GFX8-NEXT: v_mov_b32_e32 v2, s3594; GFX8-NEXT: v_add_u32_e32 v5, vcc, s2, v1595; GFX8-NEXT: v_addc_u32_e32 v6, vcc, 0, v2, vcc596; GFX8-NEXT: flat_load_dwordx4 v[1:4], v[5:6]597; GFX8-NEXT: v_add_u32_e32 v5, vcc, 16, v5598; GFX8-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc599; GFX8-NEXT: flat_load_dwordx4 v[5:8], v[5:6]600; GFX8-NEXT: v_add_u32_e32 v9, vcc, s0, v0601; GFX8-NEXT: v_mov_b32_e32 v10, s1602; GFX8-NEXT: v_addc_u32_e32 v10, vcc, 0, v10, vcc603; GFX8-NEXT: s_waitcnt vmcnt(1)604; GFX8-NEXT: v_xor_b32_e32 v0, v3, v4605; GFX8-NEXT: v_xor_b32_e32 v12, v1, v2606; GFX8-NEXT: v_ffbh_i32_e32 v11, v4607; GFX8-NEXT: v_ffbh_i32_e32 v13, v2608; GFX8-NEXT: v_ashrrev_i32_e32 v0, 31, v0609; GFX8-NEXT: s_waitcnt vmcnt(0)610; GFX8-NEXT: v_xor_b32_e32 v14, v7, v8611; GFX8-NEXT: v_xor_b32_e32 v16, v5, v6612; GFX8-NEXT: v_ffbh_i32_e32 v15, v8613; GFX8-NEXT: v_ffbh_i32_e32 v17, v6614; GFX8-NEXT: v_ashrrev_i32_e32 v12, 31, v12615; GFX8-NEXT: v_ashrrev_i32_e32 v14, 31, v14616; GFX8-NEXT: v_ashrrev_i32_e32 v16, 31, v16617; GFX8-NEXT: v_add_u32_e32 v11, vcc, -1, v11618; GFX8-NEXT: v_add_u32_e32 v13, vcc, -1, v13619; GFX8-NEXT: v_add_u32_e32 v15, vcc, -1, v15620; GFX8-NEXT: v_add_u32_e32 v17, vcc, -1, v17621; GFX8-NEXT: v_add_u32_e32 v0, vcc, 32, v0622; GFX8-NEXT: v_add_u32_e32 v12, vcc, 32, v12623; GFX8-NEXT: v_add_u32_e32 v14, vcc, 32, v14624; GFX8-NEXT: v_add_u32_e32 v16, vcc, 32, v16625; GFX8-NEXT: v_min_u32_e32 v0, v11, v0626; GFX8-NEXT: v_min_u32_e32 v11, v13, v12627; GFX8-NEXT: v_min_u32_e32 v12, v15, v14628; GFX8-NEXT: v_min_u32_e32 v13, v17, v16629; GFX8-NEXT: v_lshlrev_b64 v[3:4], v0, v[3:4]630; GFX8-NEXT: v_sub_u32_e32 v14, vcc, 32, v0631; GFX8-NEXT: v_lshlrev_b64 v[0:1], v11, v[1:2]632; GFX8-NEXT: v_lshlrev_b64 v[7:8], v12, v[7:8]633; GFX8-NEXT: v_lshlrev_b64 v[5:6], v13, v[5:6]634; GFX8-NEXT: v_min_u32_e32 v3, 1, v3635; GFX8-NEXT: v_min_u32_e32 v0, 1, v0636; GFX8-NEXT: v_min_u32_e32 v7, 1, v7637; GFX8-NEXT: v_min_u32_e32 v5, 1, v5638; GFX8-NEXT: v_or_b32_e32 v3, v4, v3639; GFX8-NEXT: v_or_b32_e32 v0, v1, v0640; GFX8-NEXT: v_or_b32_e32 v1, v8, v7641; GFX8-NEXT: v_or_b32_e32 v4, v6, v5642; GFX8-NEXT: v_cvt_f32_i32_e32 v3, v3643; GFX8-NEXT: v_cvt_f32_i32_e32 v0, v0644; GFX8-NEXT: v_cvt_f32_i32_e32 v5, v1645; GFX8-NEXT: v_cvt_f32_i32_e32 v4, v4646; GFX8-NEXT: v_sub_u32_e32 v2, vcc, 32, v11647; GFX8-NEXT: v_sub_u32_e32 v11, vcc, 32, v12648; GFX8-NEXT: v_sub_u32_e32 v12, vcc, 32, v13649; GFX8-NEXT: v_ldexp_f32 v1, v3, v14650; GFX8-NEXT: v_ldexp_f32 v0, v0, v2651; GFX8-NEXT: v_ldexp_f32 v3, v5, v11652; GFX8-NEXT: v_ldexp_f32 v2, v4, v12653; GFX8-NEXT: flat_store_dwordx4 v[9:10], v[0:3]654; GFX8-NEXT: s_endpgm655;656; GFX11-LABEL: v_sint_to_fp_v4i64_to_v4f32:657; GFX11: ; %bb.0:658; GFX11-NEXT: s_load_b128 s[0:3], s[4:5], 0x24659; GFX11-NEXT: v_and_b32_e32 v8, 0x3ff, v0660; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)661; GFX11-NEXT: v_lshlrev_b32_e32 v4, 5, v8662; GFX11-NEXT: s_waitcnt lgkmcnt(0)663; GFX11-NEXT: s_clause 0x1664; GFX11-NEXT: global_load_b128 v[0:3], v4, s[2:3] offset:16665; GFX11-NEXT: global_load_b128 v[4:7], v4, s[2:3]666; GFX11-NEXT: s_waitcnt vmcnt(1)667; GFX11-NEXT: v_xor_b32_e32 v9, v2, v3668; GFX11-NEXT: v_xor_b32_e32 v11, v0, v1669; GFX11-NEXT: s_waitcnt vmcnt(0)670; GFX11-NEXT: v_xor_b32_e32 v13, v6, v7671; GFX11-NEXT: v_xor_b32_e32 v15, v4, v5672; GFX11-NEXT: v_cls_i32_e32 v10, v3673; GFX11-NEXT: v_cls_i32_e32 v12, v1674; GFX11-NEXT: v_cls_i32_e32 v14, v7675; GFX11-NEXT: v_cls_i32_e32 v16, v5676; GFX11-NEXT: v_ashrrev_i32_e32 v9, 31, v9677; GFX11-NEXT: v_ashrrev_i32_e32 v11, 31, v11678; GFX11-NEXT: v_ashrrev_i32_e32 v13, 31, v13679; GFX11-NEXT: v_ashrrev_i32_e32 v15, 31, v15680; GFX11-NEXT: v_add_nc_u32_e32 v10, -1, v10681; GFX11-NEXT: v_add_nc_u32_e32 v12, -1, v12682; GFX11-NEXT: v_add_nc_u32_e32 v14, -1, v14683; GFX11-NEXT: v_add_nc_u32_e32 v16, -1, v16684; GFX11-NEXT: v_add_nc_u32_e32 v9, 32, v9685; GFX11-NEXT: v_add_nc_u32_e32 v11, 32, v11686; GFX11-NEXT: v_add_nc_u32_e32 v13, 32, v13687; GFX11-NEXT: v_add_nc_u32_e32 v15, 32, v15688; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)689; GFX11-NEXT: v_min_u32_e32 v9, v10, v9690; GFX11-NEXT: v_min_u32_e32 v10, v12, v11691; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)692; GFX11-NEXT: v_min_u32_e32 v11, v14, v13693; GFX11-NEXT: v_min_u32_e32 v12, v16, v15694; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)695; GFX11-NEXT: v_lshlrev_b64 v[2:3], v9, v[2:3]696; GFX11-NEXT: v_lshlrev_b64 v[0:1], v10, v[0:1]697; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)698; GFX11-NEXT: v_lshlrev_b64 v[6:7], v11, v[6:7]699; GFX11-NEXT: v_lshlrev_b64 v[4:5], v12, v[4:5]700; GFX11-NEXT: v_sub_nc_u32_e32 v9, 32, v9701; GFX11-NEXT: v_sub_nc_u32_e32 v10, 32, v10702; GFX11-NEXT: v_min_u32_e32 v2, 1, v2703; GFX11-NEXT: v_min_u32_e32 v0, 1, v0704; GFX11-NEXT: v_min_u32_e32 v6, 1, v6705; GFX11-NEXT: v_min_u32_e32 v4, 1, v4706; GFX11-NEXT: v_sub_nc_u32_e32 v11, 32, v11707; GFX11-NEXT: v_or_b32_e32 v2, v3, v2708; GFX11-NEXT: v_or_b32_e32 v0, v1, v0709; GFX11-NEXT: v_or_b32_e32 v1, v7, v6710; GFX11-NEXT: v_or_b32_e32 v3, v5, v4711; GFX11-NEXT: v_sub_nc_u32_e32 v4, 32, v12712; GFX11-NEXT: v_cvt_f32_i32_e32 v2, v2713; GFX11-NEXT: v_cvt_f32_i32_e32 v0, v0714; GFX11-NEXT: v_cvt_f32_i32_e32 v1, v1715; GFX11-NEXT: v_cvt_f32_i32_e32 v5, v3716; GFX11-NEXT: v_lshlrev_b32_e32 v6, 4, v8717; GFX11-NEXT: v_ldexp_f32 v3, v2, v9718; GFX11-NEXT: v_ldexp_f32 v2, v0, v10719; GFX11-NEXT: v_ldexp_f32 v1, v1, v11720; GFX11-NEXT: v_ldexp_f32 v0, v5, v4721; GFX11-NEXT: global_store_b128 v6, v[0:3], s[0:1]722; GFX11-NEXT: s_endpgm723 %tid = call i32 @llvm.amdgcn.workitem.id.x()724 %in.gep = getelementptr <4 x i64>, ptr addrspace(1) %in, i32 %tid725 %out.gep = getelementptr <4 x float>, ptr addrspace(1) %out, i32 %tid726 %value = load <4 x i64>, ptr addrspace(1) %in.gep727 %result = sitofp <4 x i64> %value to <4 x float>728 store <4 x float> %result, ptr addrspace(1) %out.gep729 ret void730}731 732define amdgpu_kernel void @s_sint_to_fp_v2i64_to_v2f16(ptr addrspace(1) %out, <2 x i64> %in) #0{733; GFX6-LABEL: s_sint_to_fp_v2i64_to_v2f16:734; GFX6: ; %bb.0:735; GFX6-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0xd736; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x9737; GFX6-NEXT: s_mov_b32 s3, 0xf000738; GFX6-NEXT: s_mov_b32 s2, -1739; GFX6-NEXT: s_waitcnt lgkmcnt(0)740; GFX6-NEXT: s_flbit_i32 s4, s11741; GFX6-NEXT: s_xor_b32 s5, s10, s11742; GFX6-NEXT: s_flbit_i32 s6, s9743; GFX6-NEXT: s_xor_b32 s7, s8, s9744; GFX6-NEXT: s_add_i32 s4, s4, -1745; GFX6-NEXT: s_ashr_i32 s5, s5, 31746; GFX6-NEXT: s_add_i32 s6, s6, -1747; GFX6-NEXT: s_ashr_i32 s7, s7, 31748; GFX6-NEXT: s_add_i32 s5, s5, 32749; GFX6-NEXT: s_add_i32 s7, s7, 32750; GFX6-NEXT: s_min_u32 s12, s4, s5751; GFX6-NEXT: s_min_u32 s13, s6, s7752; GFX6-NEXT: s_lshl_b64 s[4:5], s[10:11], s12753; GFX6-NEXT: s_sub_i32 s10, 32, s12754; GFX6-NEXT: s_lshl_b64 s[6:7], s[8:9], s13755; GFX6-NEXT: s_sub_i32 s8, 32, s13756; GFX6-NEXT: s_min_u32 s4, s4, 1757; GFX6-NEXT: s_min_u32 s6, s6, 1758; GFX6-NEXT: s_or_b32 s4, s5, s4759; GFX6-NEXT: s_or_b32 s5, s7, s6760; GFX6-NEXT: v_cvt_f32_i32_e32 v0, s4761; GFX6-NEXT: v_cvt_f32_i32_e32 v1, s5762; GFX6-NEXT: v_ldexp_f32_e64 v0, v0, s10763; GFX6-NEXT: v_ldexp_f32_e64 v1, v1, s8764; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0765; GFX6-NEXT: v_lshlrev_b32_e32 v0, 16, v0766; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1767; GFX6-NEXT: v_or_b32_e32 v0, v1, v0768; GFX6-NEXT: buffer_store_dword v0, off, s[0:3], 0769; GFX6-NEXT: s_endpgm770;771; GFX8-LABEL: s_sint_to_fp_v2i64_to_v2f16:772; GFX8: ; %bb.0:773; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x34774; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x24775; GFX8-NEXT: s_waitcnt lgkmcnt(0)776; GFX8-NEXT: s_xor_b32 s7, s2, s3777; GFX8-NEXT: s_flbit_i32 s6, s3778; GFX8-NEXT: s_ashr_i32 s7, s7, 31779; GFX8-NEXT: s_add_i32 s6, s6, -1780; GFX8-NEXT: s_add_i32 s7, s7, 32781; GFX8-NEXT: s_min_u32 s6, s6, s7782; GFX8-NEXT: s_lshl_b64 s[2:3], s[2:3], s6783; GFX8-NEXT: s_min_u32 s2, s2, 1784; GFX8-NEXT: s_or_b32 s2, s3, s2785; GFX8-NEXT: s_xor_b32 s3, s0, s1786; GFX8-NEXT: v_cvt_f32_i32_e32 v0, s2787; GFX8-NEXT: s_flbit_i32 s2, s1788; GFX8-NEXT: s_ashr_i32 s3, s3, 31789; GFX8-NEXT: s_add_i32 s2, s2, -1790; GFX8-NEXT: s_add_i32 s3, s3, 32791; GFX8-NEXT: s_min_u32 s2, s2, s3792; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s2793; GFX8-NEXT: s_min_u32 s0, s0, 1794; GFX8-NEXT: s_or_b32 s0, s1, s0795; GFX8-NEXT: v_cvt_f32_i32_e32 v1, s0796; GFX8-NEXT: s_sub_i32 s6, 32, s6797; GFX8-NEXT: s_sub_i32 s0, 32, s2798; GFX8-NEXT: v_ldexp_f32 v0, v0, s6799; GFX8-NEXT: v_ldexp_f32 v1, v1, s0800; GFX8-NEXT: v_cvt_f16_f32_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD801; GFX8-NEXT: v_cvt_f16_f32_e32 v1, v1802; GFX8-NEXT: v_or_b32_e32 v2, v1, v0803; GFX8-NEXT: v_mov_b32_e32 v0, s4804; GFX8-NEXT: v_mov_b32_e32 v1, s5805; GFX8-NEXT: flat_store_dword v[0:1], v2806; GFX8-NEXT: s_endpgm807;808; GFX11-TRUE16-LABEL: s_sint_to_fp_v2i64_to_v2f16:809; GFX11-TRUE16: ; %bb.0:810; GFX11-TRUE16-NEXT: s_clause 0x1811; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x34812; GFX11-TRUE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x24813; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)814; GFX11-TRUE16-NEXT: s_xor_b32 s7, s2, s3815; GFX11-TRUE16-NEXT: s_xor_b32 s9, s0, s1816; GFX11-TRUE16-NEXT: s_cls_i32 s6, s3817; GFX11-TRUE16-NEXT: s_cls_i32 s8, s1818; GFX11-TRUE16-NEXT: s_ashr_i32 s7, s7, 31819; GFX11-TRUE16-NEXT: s_ashr_i32 s9, s9, 31820; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, -1821; GFX11-TRUE16-NEXT: s_add_i32 s8, s8, -1822; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, 32823; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, 32824; GFX11-TRUE16-NEXT: s_min_u32 s6, s6, s7825; GFX11-TRUE16-NEXT: s_min_u32 s7, s8, s9826; GFX11-TRUE16-NEXT: s_lshl_b64 s[2:3], s[2:3], s6827; GFX11-TRUE16-NEXT: s_lshl_b64 s[0:1], s[0:1], s7828; GFX11-TRUE16-NEXT: s_min_u32 s2, s2, 1829; GFX11-TRUE16-NEXT: s_min_u32 s0, s0, 1830; GFX11-TRUE16-NEXT: s_or_b32 s2, s3, s2831; GFX11-TRUE16-NEXT: s_or_b32 s0, s1, s0832; GFX11-TRUE16-NEXT: v_cvt_f32_i32_e32 v0, s2833; GFX11-TRUE16-NEXT: v_cvt_f32_i32_e32 v1, s0834; GFX11-TRUE16-NEXT: s_sub_i32 s0, 32, s6835; GFX11-TRUE16-NEXT: s_sub_i32 s1, 32, s7836; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)837; GFX11-TRUE16-NEXT: v_ldexp_f32 v0, v0, s0838; GFX11-TRUE16-NEXT: v_ldexp_f32 v1, v1, s1839; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)840; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v0841; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v1842; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0843; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_2)844; GFX11-TRUE16-NEXT: v_pack_b32_f16 v0, v0.h, v0.l845; GFX11-TRUE16-NEXT: global_store_b32 v1, v0, s[4:5]846; GFX11-TRUE16-NEXT: s_endpgm847;848; GFX11-FAKE16-LABEL: s_sint_to_fp_v2i64_to_v2f16:849; GFX11-FAKE16: ; %bb.0:850; GFX11-FAKE16-NEXT: s_clause 0x1851; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x34852; GFX11-FAKE16-NEXT: s_load_b64 s[4:5], s[4:5], 0x24853; GFX11-FAKE16-NEXT: v_mov_b32_e32 v2, 0854; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)855; GFX11-FAKE16-NEXT: s_xor_b32 s7, s2, s3856; GFX11-FAKE16-NEXT: s_xor_b32 s9, s0, s1857; GFX11-FAKE16-NEXT: s_cls_i32 s6, s3858; GFX11-FAKE16-NEXT: s_cls_i32 s8, s1859; GFX11-FAKE16-NEXT: s_ashr_i32 s7, s7, 31860; GFX11-FAKE16-NEXT: s_ashr_i32 s9, s9, 31861; GFX11-FAKE16-NEXT: s_add_i32 s6, s6, -1862; GFX11-FAKE16-NEXT: s_add_i32 s8, s8, -1863; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, 32864; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, 32865; GFX11-FAKE16-NEXT: s_min_u32 s6, s6, s7866; GFX11-FAKE16-NEXT: s_min_u32 s7, s8, s9867; GFX11-FAKE16-NEXT: s_lshl_b64 s[2:3], s[2:3], s6868; GFX11-FAKE16-NEXT: s_lshl_b64 s[0:1], s[0:1], s7869; GFX11-FAKE16-NEXT: s_min_u32 s2, s2, 1870; GFX11-FAKE16-NEXT: s_min_u32 s0, s0, 1871; GFX11-FAKE16-NEXT: s_or_b32 s2, s3, s2872; GFX11-FAKE16-NEXT: s_or_b32 s0, s1, s0873; GFX11-FAKE16-NEXT: v_cvt_f32_i32_e32 v0, s2874; GFX11-FAKE16-NEXT: v_cvt_f32_i32_e32 v1, s0875; GFX11-FAKE16-NEXT: s_sub_i32 s0, 32, s6876; GFX11-FAKE16-NEXT: s_sub_i32 s1, 32, s7877; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)878; GFX11-FAKE16-NEXT: v_ldexp_f32 v0, v0, s0879; GFX11-FAKE16-NEXT: v_ldexp_f32 v1, v1, s1880; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)881; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v0882; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v1, v1883; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)884; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v1, v0885; GFX11-FAKE16-NEXT: global_store_b32 v2, v0, s[4:5]886; GFX11-FAKE16-NEXT: s_endpgm887 %result = sitofp <2 x i64> %in to <2 x half>888 store <2 x half> %result, ptr addrspace(1) %out889 ret void890}891 892define amdgpu_kernel void @v_sint_to_fp_v4i64_to_v4f16(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {893; GFX6-LABEL: v_sint_to_fp_v4i64_to_v4f16:894; GFX6: ; %bb.0:895; GFX6-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x9896; GFX6-NEXT: s_mov_b32 s7, 0xf000897; GFX6-NEXT: s_mov_b32 s6, 0898; GFX6-NEXT: v_lshlrev_b32_e32 v8, 5, v0899; GFX6-NEXT: v_mov_b32_e32 v9, 0900; GFX6-NEXT: s_waitcnt lgkmcnt(0)901; GFX6-NEXT: s_mov_b64 s[4:5], s[2:3]902; GFX6-NEXT: buffer_load_dwordx4 v[1:4], v[8:9], s[4:7], 0 addr64 offset:16903; GFX6-NEXT: buffer_load_dwordx4 v[5:8], v[8:9], s[4:7], 0 addr64904; GFX6-NEXT: v_lshlrev_b32_e32 v10, 3, v0905; GFX6-NEXT: v_mov_b32_e32 v11, v9906; GFX6-NEXT: s_mov_b64 s[2:3], s[6:7]907; GFX6-NEXT: s_waitcnt vmcnt(1)908; GFX6-NEXT: v_xor_b32_e32 v0, v3, v4909; GFX6-NEXT: v_ffbh_i32_e32 v9, v4910; GFX6-NEXT: v_xor_b32_e32 v12, v1, v2911; GFX6-NEXT: v_ffbh_i32_e32 v13, v2912; GFX6-NEXT: s_waitcnt vmcnt(0)913; GFX6-NEXT: v_xor_b32_e32 v14, v7, v8914; GFX6-NEXT: v_ffbh_i32_e32 v15, v8915; GFX6-NEXT: v_xor_b32_e32 v16, v5, v6916; GFX6-NEXT: v_ffbh_i32_e32 v17, v6917; GFX6-NEXT: v_ashrrev_i32_e32 v0, 31, v0918; GFX6-NEXT: v_add_i32_e32 v9, vcc, -1, v9919; GFX6-NEXT: v_ashrrev_i32_e32 v12, 31, v12920; GFX6-NEXT: v_add_i32_e32 v13, vcc, -1, v13921; GFX6-NEXT: v_ashrrev_i32_e32 v14, 31, v14922; GFX6-NEXT: v_add_i32_e32 v15, vcc, -1, v15923; GFX6-NEXT: v_ashrrev_i32_e32 v16, 31, v16924; GFX6-NEXT: v_add_i32_e32 v17, vcc, -1, v17925; GFX6-NEXT: v_add_i32_e32 v0, vcc, 32, v0926; GFX6-NEXT: v_add_i32_e32 v12, vcc, 32, v12927; GFX6-NEXT: v_add_i32_e32 v14, vcc, 32, v14928; GFX6-NEXT: v_add_i32_e32 v16, vcc, 32, v16929; GFX6-NEXT: v_min_u32_e32 v0, v9, v0930; GFX6-NEXT: v_min_u32_e32 v9, v13, v12931; GFX6-NEXT: v_min_u32_e32 v12, v15, v14932; GFX6-NEXT: v_min_u32_e32 v13, v17, v16933; GFX6-NEXT: v_lshl_b64 v[3:4], v[3:4], v0934; GFX6-NEXT: v_sub_i32_e32 v14, vcc, 32, v0935; GFX6-NEXT: v_lshl_b64 v[0:1], v[1:2], v9936; GFX6-NEXT: v_sub_i32_e32 v2, vcc, 32, v9937; GFX6-NEXT: v_lshl_b64 v[7:8], v[7:8], v12938; GFX6-NEXT: v_sub_i32_e32 v9, vcc, 32, v12939; GFX6-NEXT: v_lshl_b64 v[5:6], v[5:6], v13940; GFX6-NEXT: v_sub_i32_e32 v12, vcc, 32, v13941; GFX6-NEXT: v_min_u32_e32 v3, 1, v3942; GFX6-NEXT: v_min_u32_e32 v0, 1, v0943; GFX6-NEXT: v_min_u32_e32 v7, 1, v7944; GFX6-NEXT: v_min_u32_e32 v5, 1, v5945; GFX6-NEXT: v_or_b32_e32 v3, v4, v3946; GFX6-NEXT: v_or_b32_e32 v0, v1, v0947; GFX6-NEXT: v_or_b32_e32 v1, v8, v7948; GFX6-NEXT: v_or_b32_e32 v4, v6, v5949; GFX6-NEXT: v_cvt_f32_i32_e32 v3, v3950; GFX6-NEXT: v_cvt_f32_i32_e32 v0, v0951; GFX6-NEXT: v_cvt_f32_i32_e32 v1, v1952; GFX6-NEXT: v_cvt_f32_i32_e32 v4, v4953; GFX6-NEXT: v_ldexp_f32_e32 v3, v3, v14954; GFX6-NEXT: v_ldexp_f32_e32 v0, v0, v2955; GFX6-NEXT: v_ldexp_f32_e32 v1, v1, v9956; GFX6-NEXT: v_ldexp_f32_e32 v2, v4, v12957; GFX6-NEXT: v_cvt_f16_f32_e32 v3, v3958; GFX6-NEXT: v_cvt_f16_f32_e32 v0, v0959; GFX6-NEXT: v_cvt_f16_f32_e32 v1, v1960; GFX6-NEXT: v_cvt_f16_f32_e32 v2, v2961; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3962; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v1963; GFX6-NEXT: v_or_b32_e32 v1, v0, v3964; GFX6-NEXT: v_or_b32_e32 v0, v2, v4965; GFX6-NEXT: buffer_store_dwordx2 v[0:1], v[10:11], s[0:3], 0 addr64966; GFX6-NEXT: s_endpgm967;968; GFX8-LABEL: v_sint_to_fp_v4i64_to_v4f16:969; GFX8: ; %bb.0:970; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24971; GFX8-NEXT: v_lshlrev_b32_e32 v1, 5, v0972; GFX8-NEXT: v_lshlrev_b32_e32 v9, 3, v0973; GFX8-NEXT: s_waitcnt lgkmcnt(0)974; GFX8-NEXT: v_mov_b32_e32 v2, s3975; GFX8-NEXT: v_add_u32_e32 v5, vcc, s2, v1976; GFX8-NEXT: v_addc_u32_e32 v6, vcc, 0, v2, vcc977; GFX8-NEXT: flat_load_dwordx4 v[1:4], v[5:6]978; GFX8-NEXT: v_add_u32_e32 v5, vcc, 16, v5979; GFX8-NEXT: v_addc_u32_e32 v6, vcc, 0, v6, vcc980; GFX8-NEXT: flat_load_dwordx4 v[5:8], v[5:6]981; GFX8-NEXT: v_mov_b32_e32 v10, s1982; GFX8-NEXT: s_waitcnt vmcnt(1)983; GFX8-NEXT: v_xor_b32_e32 v0, v3, v4984; GFX8-NEXT: v_xor_b32_e32 v12, v1, v2985; GFX8-NEXT: v_ffbh_i32_e32 v11, v4986; GFX8-NEXT: v_ffbh_i32_e32 v13, v2987; GFX8-NEXT: v_ashrrev_i32_e32 v0, 31, v0988; GFX8-NEXT: s_waitcnt vmcnt(0)989; GFX8-NEXT: v_xor_b32_e32 v14, v7, v8990; GFX8-NEXT: v_xor_b32_e32 v16, v5, v6991; GFX8-NEXT: v_ffbh_i32_e32 v15, v8992; GFX8-NEXT: v_ffbh_i32_e32 v17, v6993; GFX8-NEXT: v_ashrrev_i32_e32 v12, 31, v12994; GFX8-NEXT: v_ashrrev_i32_e32 v14, 31, v14995; GFX8-NEXT: v_ashrrev_i32_e32 v16, 31, v16996; GFX8-NEXT: v_add_u32_e32 v11, vcc, -1, v11997; GFX8-NEXT: v_add_u32_e32 v13, vcc, -1, v13998; GFX8-NEXT: v_add_u32_e32 v15, vcc, -1, v15999; GFX8-NEXT: v_add_u32_e32 v17, vcc, -1, v171000; GFX8-NEXT: v_add_u32_e32 v0, vcc, 32, v01001; GFX8-NEXT: v_add_u32_e32 v12, vcc, 32, v121002; GFX8-NEXT: v_add_u32_e32 v14, vcc, 32, v141003; GFX8-NEXT: v_add_u32_e32 v16, vcc, 32, v161004; GFX8-NEXT: v_min_u32_e32 v0, v11, v01005; GFX8-NEXT: v_min_u32_e32 v11, v13, v121006; GFX8-NEXT: v_min_u32_e32 v12, v15, v141007; GFX8-NEXT: v_min_u32_e32 v13, v17, v161008; GFX8-NEXT: v_lshlrev_b64 v[3:4], v0, v[3:4]1009; GFX8-NEXT: v_sub_u32_e32 v14, vcc, 32, v01010; GFX8-NEXT: v_lshlrev_b64 v[0:1], v11, v[1:2]1011; GFX8-NEXT: v_lshlrev_b64 v[7:8], v12, v[7:8]1012; GFX8-NEXT: v_lshlrev_b64 v[5:6], v13, v[5:6]1013; GFX8-NEXT: v_min_u32_e32 v3, 1, v31014; GFX8-NEXT: v_min_u32_e32 v0, 1, v01015; GFX8-NEXT: v_min_u32_e32 v7, 1, v71016; GFX8-NEXT: v_min_u32_e32 v5, 1, v51017; GFX8-NEXT: v_or_b32_e32 v3, v4, v31018; GFX8-NEXT: v_or_b32_e32 v0, v1, v01019; GFX8-NEXT: v_or_b32_e32 v1, v8, v71020; GFX8-NEXT: v_or_b32_e32 v4, v6, v51021; GFX8-NEXT: v_cvt_f32_i32_e32 v3, v31022; GFX8-NEXT: v_cvt_f32_i32_e32 v0, v01023; GFX8-NEXT: v_cvt_f32_i32_e32 v1, v11024; GFX8-NEXT: v_cvt_f32_i32_e32 v4, v41025; GFX8-NEXT: v_sub_u32_e32 v2, vcc, 32, v111026; GFX8-NEXT: v_sub_u32_e32 v11, vcc, 32, v121027; GFX8-NEXT: v_sub_u32_e32 v12, vcc, 32, v131028; GFX8-NEXT: v_ldexp_f32 v3, v3, v141029; GFX8-NEXT: v_ldexp_f32 v0, v0, v21030; GFX8-NEXT: v_ldexp_f32 v1, v1, v111031; GFX8-NEXT: v_ldexp_f32 v2, v4, v121032; GFX8-NEXT: v_cvt_f16_f32_sdwa v3, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1033; GFX8-NEXT: v_cvt_f16_f32_e32 v4, v01034; GFX8-NEXT: v_cvt_f16_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD1035; GFX8-NEXT: v_cvt_f16_f32_e32 v6, v21036; GFX8-NEXT: v_add_u32_e32 v0, vcc, s0, v91037; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v10, vcc1038; GFX8-NEXT: v_or_b32_e32 v2, v4, v31039; GFX8-NEXT: v_or_b32_e32 v3, v6, v51040; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]1041; GFX8-NEXT: s_endpgm1042;1043; GFX11-TRUE16-LABEL: v_sint_to_fp_v4i64_to_v4f16:1044; GFX11-TRUE16: ; %bb.0:1045; GFX11-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241046; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0x3ff, v01047; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1048; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v4, 5, v81049; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)1050; GFX11-TRUE16-NEXT: s_clause 0x11051; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v4, s[2:3] offset:161052; GFX11-TRUE16-NEXT: global_load_b128 v[4:7], v4, s[2:3]1053; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)1054; GFX11-TRUE16-NEXT: v_xor_b32_e32 v9, v2, v31055; GFX11-TRUE16-NEXT: v_xor_b32_e32 v11, v0, v11056; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)1057; GFX11-TRUE16-NEXT: v_xor_b32_e32 v13, v6, v71058; GFX11-TRUE16-NEXT: v_xor_b32_e32 v15, v4, v51059; GFX11-TRUE16-NEXT: v_cls_i32_e32 v10, v31060; GFX11-TRUE16-NEXT: v_cls_i32_e32 v12, v11061; GFX11-TRUE16-NEXT: v_cls_i32_e32 v14, v71062; GFX11-TRUE16-NEXT: v_cls_i32_e32 v16, v51063; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v9, 31, v91064; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v11, 31, v111065; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v13, 31, v131066; GFX11-TRUE16-NEXT: v_ashrrev_i32_e32 v15, 31, v151067; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v10, -1, v101068; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v12, -1, v121069; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v14, -1, v141070; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v16, -1, v161071; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, 32, v91072; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v11, 32, v111073; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v13, 32, v131074; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v15, 32, v151075; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1076; GFX11-TRUE16-NEXT: v_min_u32_e32 v9, v10, v91077; GFX11-TRUE16-NEXT: v_min_u32_e32 v10, v12, v111078; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1079; GFX11-TRUE16-NEXT: v_min_u32_e32 v11, v14, v131080; GFX11-TRUE16-NEXT: v_min_u32_e32 v12, v16, v151081; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1082; GFX11-TRUE16-NEXT: v_lshlrev_b64 v[2:3], v9, v[2:3]1083; GFX11-TRUE16-NEXT: v_lshlrev_b64 v[0:1], v10, v[0:1]1084; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1085; GFX11-TRUE16-NEXT: v_lshlrev_b64 v[6:7], v11, v[6:7]1086; GFX11-TRUE16-NEXT: v_lshlrev_b64 v[4:5], v12, v[4:5]1087; GFX11-TRUE16-NEXT: v_sub_nc_u32_e32 v9, 32, v91088; GFX11-TRUE16-NEXT: v_sub_nc_u32_e32 v10, 32, v101089; GFX11-TRUE16-NEXT: v_min_u32_e32 v2, 1, v21090; GFX11-TRUE16-NEXT: v_min_u32_e32 v0, 1, v01091; GFX11-TRUE16-NEXT: v_min_u32_e32 v6, 1, v61092; GFX11-TRUE16-NEXT: v_min_u32_e32 v4, 1, v41093; GFX11-TRUE16-NEXT: v_sub_nc_u32_e32 v11, 32, v111094; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v3, v21095; GFX11-TRUE16-NEXT: v_or_b32_e32 v0, v1, v01096; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v7, v61097; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v5, v41098; GFX11-TRUE16-NEXT: v_sub_nc_u32_e32 v4, 32, v121099; GFX11-TRUE16-NEXT: v_cvt_f32_i32_e32 v2, v21100; GFX11-TRUE16-NEXT: v_cvt_f32_i32_e32 v0, v01101; GFX11-TRUE16-NEXT: v_cvt_f32_i32_e32 v1, v11102; GFX11-TRUE16-NEXT: v_cvt_f32_i32_e32 v3, v31103; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1104; GFX11-TRUE16-NEXT: v_ldexp_f32 v2, v2, v91105; GFX11-TRUE16-NEXT: v_ldexp_f32 v5, v0, v101106; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1107; GFX11-TRUE16-NEXT: v_ldexp_f32 v1, v1, v111108; GFX11-TRUE16-NEXT: v_ldexp_f32 v3, v3, v41109; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1110; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.l, v21111; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v0.h, v51112; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1113; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v1.l, v11114; GFX11-TRUE16-NEXT: v_cvt_f16_f32_e32 v1.h, v31115; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 3, v81116; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)1117; GFX11-TRUE16-NEXT: v_pack_b32_f16 v2, v0.h, v0.l1118; GFX11-TRUE16-NEXT: v_pack_b32_f16 v1, v1.h, v1.l1119; GFX11-TRUE16-NEXT: global_store_b64 v3, v[1:2], s[0:1]1120; GFX11-TRUE16-NEXT: s_endpgm1121;1122; GFX11-FAKE16-LABEL: v_sint_to_fp_v4i64_to_v4f16:1123; GFX11-FAKE16: ; %bb.0:1124; GFX11-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x241125; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0x3ff, v01126; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)1127; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 5, v81128; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)1129; GFX11-FAKE16-NEXT: s_clause 0x11130; GFX11-FAKE16-NEXT: global_load_b128 v[0:3], v4, s[2:3] offset:161131; GFX11-FAKE16-NEXT: global_load_b128 v[4:7], v4, s[2:3]1132; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)1133; GFX11-FAKE16-NEXT: v_xor_b32_e32 v9, v2, v31134; GFX11-FAKE16-NEXT: v_xor_b32_e32 v11, v0, v11135; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)1136; GFX11-FAKE16-NEXT: v_xor_b32_e32 v13, v6, v71137; GFX11-FAKE16-NEXT: v_xor_b32_e32 v15, v4, v51138; GFX11-FAKE16-NEXT: v_cls_i32_e32 v10, v31139; GFX11-FAKE16-NEXT: v_cls_i32_e32 v12, v11140; GFX11-FAKE16-NEXT: v_cls_i32_e32 v14, v71141; GFX11-FAKE16-NEXT: v_cls_i32_e32 v16, v51142; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v9, 31, v91143; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v11, 31, v111144; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v13, 31, v131145; GFX11-FAKE16-NEXT: v_ashrrev_i32_e32 v15, 31, v151146; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v10, -1, v101147; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v12, -1, v121148; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v14, -1, v141149; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v16, -1, v161150; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, 32, v91151; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v11, 32, v111152; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v13, 32, v131153; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v15, 32, v151154; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1155; GFX11-FAKE16-NEXT: v_min_u32_e32 v9, v10, v91156; GFX11-FAKE16-NEXT: v_min_u32_e32 v10, v12, v111157; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1158; GFX11-FAKE16-NEXT: v_min_u32_e32 v11, v14, v131159; GFX11-FAKE16-NEXT: v_min_u32_e32 v12, v16, v151160; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1161; GFX11-FAKE16-NEXT: v_lshlrev_b64 v[2:3], v9, v[2:3]1162; GFX11-FAKE16-NEXT: v_lshlrev_b64 v[0:1], v10, v[0:1]1163; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1164; GFX11-FAKE16-NEXT: v_lshlrev_b64 v[6:7], v11, v[6:7]1165; GFX11-FAKE16-NEXT: v_lshlrev_b64 v[4:5], v12, v[4:5]1166; GFX11-FAKE16-NEXT: v_sub_nc_u32_e32 v9, 32, v91167; GFX11-FAKE16-NEXT: v_sub_nc_u32_e32 v10, 32, v101168; GFX11-FAKE16-NEXT: v_min_u32_e32 v2, 1, v21169; GFX11-FAKE16-NEXT: v_min_u32_e32 v0, 1, v01170; GFX11-FAKE16-NEXT: v_min_u32_e32 v6, 1, v61171; GFX11-FAKE16-NEXT: v_min_u32_e32 v4, 1, v41172; GFX11-FAKE16-NEXT: v_sub_nc_u32_e32 v11, 32, v111173; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v3, v21174; GFX11-FAKE16-NEXT: v_or_b32_e32 v0, v1, v01175; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v7, v61176; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v5, v41177; GFX11-FAKE16-NEXT: v_sub_nc_u32_e32 v4, 32, v121178; GFX11-FAKE16-NEXT: v_cvt_f32_i32_e32 v2, v21179; GFX11-FAKE16-NEXT: v_cvt_f32_i32_e32 v0, v01180; GFX11-FAKE16-NEXT: v_cvt_f32_i32_e32 v1, v11181; GFX11-FAKE16-NEXT: v_cvt_f32_i32_e32 v3, v31182; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 3, v81183; GFX11-FAKE16-NEXT: v_ldexp_f32 v2, v2, v91184; GFX11-FAKE16-NEXT: v_ldexp_f32 v0, v0, v101185; GFX11-FAKE16-NEXT: v_ldexp_f32 v1, v1, v111186; GFX11-FAKE16-NEXT: v_ldexp_f32 v3, v3, v41187; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1188; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v2, v21189; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v0, v01190; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)1191; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v4, v11192; GFX11-FAKE16-NEXT: v_cvt_f16_f32_e32 v3, v31193; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)1194; GFX11-FAKE16-NEXT: v_pack_b32_f16 v1, v0, v21195; GFX11-FAKE16-NEXT: v_pack_b32_f16 v0, v3, v41196; GFX11-FAKE16-NEXT: global_store_b64 v5, v[0:1], s[0:1]1197; GFX11-FAKE16-NEXT: s_endpgm1198 %tid = call i32 @llvm.amdgcn.workitem.id.x()1199 %in.gep = getelementptr <4 x i64>, ptr addrspace(1) %in, i32 %tid1200 %out.gep = getelementptr <4 x half>, ptr addrspace(1) %out, i32 %tid1201 %value = load <4 x i64>, ptr addrspace(1) %in.gep1202 %result = sitofp <4 x i64> %value to <4 x half>1203 store <4 x half> %result, ptr addrspace(1) %out.gep1204 ret void1205}1206 1207declare i32 @llvm.amdgcn.workitem.id.x() #11208 1209attributes #0 = { nounwind }1210attributes #1 = { nounwind readnone }1211