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1; RUN: llc -mtriple=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s2; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s3; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 -check-prefix=FUNC %s4 5; FUNC-LABEL: {{^}}s_sint_to_fp_i32_to_f32:6; SI: v_cvt_f32_i32_e32 {{v[0-9]+}}, {{s[0-9]+$}}7 8; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].Z9define amdgpu_kernel void @s_sint_to_fp_i32_to_f32(ptr addrspace(1) %out, i32 %in) #0 {10 %result = sitofp i32 %in to float11 store float %result, ptr addrspace(1) %out12 ret void13}14 15; FUNC-LABEL: {{^}}v_sint_to_fp_i32_to_f32:16; SI: v_cvt_f32_i32_e32 {{v[0-9]+}}, {{v[0-9]+$}}17 18; R600: INT_TO_FLT19define amdgpu_kernel void @v_sint_to_fp_i32_to_f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {20 %tid = call i32 @llvm.amdgcn.workitem.id.x()21 %in.gep = getelementptr i32, ptr addrspace(1) %in, i32 %tid22 %out.gep = getelementptr float, ptr addrspace(1) %out, i32 %tid23 %val = load i32, ptr addrspace(1) %in.gep24 %result = sitofp i32 %val to float25 store float %result, ptr addrspace(1) %out.gep26 ret void27}28 29; FUNC-LABEL: {{^}}s_sint_to_fp_v2i32:30; SI: v_cvt_f32_i32_e3231; SI: v_cvt_f32_i32_e3232 33; R600-DAG: INT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[2].W34; R600-DAG: INT_TO_FLT * T{{[0-9]+\.[XYZW]}}, KC0[3].X35define amdgpu_kernel void @s_sint_to_fp_v2i32(ptr addrspace(1) %out, <2 x i32> %in) #0{36 %result = sitofp <2 x i32> %in to <2 x float>37 store <2 x float> %result, ptr addrspace(1) %out38 ret void39}40 41; FUNC-LABEL: {{^}}s_sint_to_fp_v4i32_to_v4f32:42; SI: v_cvt_f32_i32_e3243; SI: v_cvt_f32_i32_e3244; SI: v_cvt_f32_i32_e3245; SI: v_cvt_f32_i32_e3246; SI: s_endpgm47 48; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}49; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}50; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}51; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}52define amdgpu_kernel void @s_sint_to_fp_v4i32_to_v4f32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {53 %value = load <4 x i32>, ptr addrspace(1) %in54 %result = sitofp <4 x i32> %value to <4 x float>55 store <4 x float> %result, ptr addrspace(1) %out56 ret void57}58 59; FUNC-LABEL: {{^}}v_sint_to_fp_v4i32:60; SI: v_cvt_f32_i32_e3261; SI: v_cvt_f32_i32_e3262; SI: v_cvt_f32_i32_e3263; SI: v_cvt_f32_i32_e3264 65; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}66; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}67; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}68; R600: INT_TO_FLT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}69define amdgpu_kernel void @v_sint_to_fp_v4i32(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {70 %tid = call i32 @llvm.amdgcn.workitem.id.x()71 %in.gep = getelementptr <4 x i32>, ptr addrspace(1) %in, i32 %tid72 %out.gep = getelementptr <4 x float>, ptr addrspace(1) %out, i32 %tid73 %value = load <4 x i32>, ptr addrspace(1) %in.gep74 %result = sitofp <4 x i32> %value to <4 x float>75 store <4 x float> %result, ptr addrspace(1) %out.gep76 ret void77}78 79; FUNC-LABEL: {{^}}s_sint_to_fp_i1_f32:80; SI: s_cmp_eq_u3281; SI: s_cselect_b64 [[CMP:s\[[0-9]+:[0-9]\]]], -1, 082; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1.0, [[CMP]]83; SI: buffer_store_dword [[RESULT]],84; SI: s_endpgm85define amdgpu_kernel void @s_sint_to_fp_i1_f32(ptr addrspace(1) %out, i32 %in) #0 {86 %cmp = icmp eq i32 %in, 087 %fp = uitofp i1 %cmp to float88 store float %fp, ptr addrspace(1) %out89 ret void90}91 92; FUNC-LABEL: {{^}}s_sint_to_fp_i1_f32_load:93; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1.094; SI: buffer_store_dword [[RESULT]],95; SI: s_endpgm96define amdgpu_kernel void @s_sint_to_fp_i1_f32_load(ptr addrspace(1) %out, i1 %in) #0 {97 %fp = sitofp i1 %in to float98 store float %fp, ptr addrspace(1) %out99 ret void100}101 102; FUNC-LABEL: {{^}}v_sint_to_fp_i1_f32_load:103; SI: {{buffer|flat}}_load_ubyte104; SI: v_and_b32_e32 {{v[0-9]+}}, 1, {{v[0-9]+}}105; SI: v_cmp_eq_u32106; SI: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, -1.0107; SI: {{buffer|flat}}_store_dword {{.*}}[[RESULT]]108; SI: s_endpgm109define amdgpu_kernel void @v_sint_to_fp_i1_f32_load(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 {110 %tid = call i32 @llvm.amdgcn.workitem.id.x()111 %in.gep = getelementptr i1, ptr addrspace(1) %in, i32 %tid112 %out.gep = getelementptr float, ptr addrspace(1) %out, i32 %tid113 %val = load i1, ptr addrspace(1) %in.gep114 %fp = sitofp i1 %val to float115 store float %fp, ptr addrspace(1) %out.gep116 ret void117}118 119declare i32 @llvm.amdgcn.workitem.id.x() #1120 121attributes #0 = { nounwind }122attributes #1 = { nounwind readnone }123