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1; RUN: llc -mtriple=amdgcn--amdhsa < %s | FileCheck -enable-var-scope -check-prefix=GCN %s2 3; FIXME: merge with trap.ll4 5; An s_cbranch_execnz is required to avoid trapping if all lanes are 06; GCN-LABEL: {{^}}trap_divergent_branch:7; GCN: s_and_saveexec_b648; GCN: s_cbranch_execnz [[TRAP:.LBB[0-9]+_[0-9]+]]9; GCN: ; %bb.{{[0-9]+}}:10; GCN-NEXT: s_endpgm11; GCN: [[TRAP]]:12; GCN: s_trap 213; GCN-NEXT: s_endpgm14define amdgpu_kernel void @trap_divergent_branch(ptr addrspace(1) nocapture readonly %arg) {15 %id = call i32 @llvm.amdgcn.workitem.id.x()16 %gep = getelementptr inbounds i32, ptr addrspace(1) %arg, i32 %id17 %divergent.val = load i32, ptr addrspace(1) %gep18 %cmp = icmp eq i32 %divergent.val, 019 br i1 %cmp, label %bb, label %end20 21bb:22 call void @llvm.trap()23 br label %end24 25end:26 ret void27}28 29; GCN-LABEL: {{^}}debugtrap_divergent_branch:30; GCN: s_and_saveexec_b6431; GCN: s_cbranch_execz [[ENDPGM:.LBB[0-9]+_[0-9]+]]32; GCN: ; %bb.{{[0-9]+}}:33; GCN: s_trap 334; GCN-NEXT: [[ENDPGM]]:35; GCN-NEXT: s_endpgm36define amdgpu_kernel void @debugtrap_divergent_branch(ptr addrspace(1) nocapture readonly %arg) {37 %id = call i32 @llvm.amdgcn.workitem.id.x()38 %gep = getelementptr inbounds i32, ptr addrspace(1) %arg, i32 %id39 %divergent.val = load i32, ptr addrspace(1) %gep40 %cmp = icmp eq i32 %divergent.val, 041 br i1 %cmp, label %bb, label %end42 43bb:44 call void @llvm.debugtrap()45 br label %end46 47end:48 ret void49}50 51declare void @llvm.trap() #052declare void @llvm.debugtrap() #153declare i32 @llvm.amdgcn.workitem.id.x() #254 55attributes #0 = { nounwind noreturn }56attributes #1 = { nounwind }57attributes #2 = { nounwind readnone speculatable }58